X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=src%2Fmem%2Fmem_object.hh;h=e12b30661b455e83afcfd56478a0950352bd6dce;hb=f49830ce0ba79c54c65c9c4b25bc3c6184aaf2a9;hp=ac547619d27897f3e3e717d4d73117a40c4e685c;hpb=3c95f5958fd1a90cf83d85e1b24fb700c07bae91;p=gem5.git

diff --git a/src/mem/mem_object.hh b/src/mem/mem_object.hh
index ac547619d..e12b30661 100644
--- a/src/mem/mem_object.hh
+++ b/src/mem/mem_object.hh
@@ -1,4 +1,16 @@
 /*
+ * Copyright (c) 2012 ARM Limited
+ * All rights reserved
+ *
+ * The license below extends only to copyright in the software and shall
+ * not be construed as granting a license to any other intellectual
+ * property including but not limited to intellectual property relating
+ * to a hardware implementation of the functionality of the software
+ * licensed hereunder.  You may use the software subject to the license
+ * terms below provided that you ensure that this notice is replicated
+ * unmodified and in its entirety in all distributions of the software,
+ * modified or unmodified, in source code or in binary form.
+ *
  * Copyright (c) 2002-2005 The Regents of The University of Michigan
  * All rights reserved.
  *
@@ -26,31 +38,59 @@
  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  *
  * Authors: Ron Dreslinski
+ *          Andreas Hansson
  */
 
 /**
  * @file
- * Base Memory Object decleration.
+ * MemObject declaration.
  */
 
 #ifndef __MEM_MEM_OBJECT_HH__
 #define __MEM_MEM_OBJECT_HH__
 
-#include "sim/sim_object.hh"
 #include "mem/port.hh"
+#include "params/MemObject.hh"
+#include "sim/clocked_object.hh"
 
 /**
- * The base MemoryObject class, allows for an accesor function to a
- * simobj that returns the Port.
+ * The MemObject class extends the ClockedObject with accessor functions
+ * to get its master and slave ports.
  */
-class MemObject : public SimObject
+class MemObject : public ClockedObject
 {
   public:
-    MemObject(const std::string &name);
+    typedef MemObjectParams Params;
+    const Params *params() const
+    { return dynamic_cast<const Params *>(_params); }
 
-  public:
-    /** Additional function to return the Port of a memory object. */
-    virtual Port *getPort(const std::string &if_name) = 0;
+    MemObject(const Params *params);
+
+    /**
+     * Get a master port with a given name and index. This is used at
+     * binding time and returns a reference to a protocol-agnostic
+     * base master port.
+     *
+     * @param if_name Port name
+     * @param idx Index in the case of a VectorPort
+     *
+     * @return A reference to the given port
+     */
+    virtual BaseMasterPort& getMasterPort(const std::string& if_name,
+                                          PortID idx = InvalidPortID);
+
+    /**
+     * Get a slave port with a given name and index. This is used at
+     * binding time and returns a reference to a protocol-agnostic
+     * base master port.
+     *
+     * @param if_name Port name
+     * @param idx Index in the case of a VectorPort
+     *
+     * @return A reference to the given port
+     */
+    virtual BaseSlavePort& getSlavePort(const std::string& if_name,
+                                        PortID idx = InvalidPortID);
 };
 
 #endif //__MEM_MEM_OBJECT_HH__