X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=src%2Fmem%2Fmem_object.hh;h=e12b30661b455e83afcfd56478a0950352bd6dce;hb=f49830ce0ba79c54c65c9c4b25bc3c6184aaf2a9;hp=b8bf4b939052b847b3064270cbbe69ce265e9fc4;hpb=9cf8ad3a17894c482968b5055e72f5434740f1f2;p=gem5.git diff --git a/src/mem/mem_object.hh b/src/mem/mem_object.hh index b8bf4b939..e12b30661 100644 --- a/src/mem/mem_object.hh +++ b/src/mem/mem_object.hh @@ -1,4 +1,16 @@ /* + * Copyright (c) 2012 ARM Limited + * All rights reserved + * + * The license below extends only to copyright in the software and shall + * not be construed as granting a license to any other intellectual + * property including but not limited to intellectual property relating + * to a hardware implementation of the functionality of the software + * licensed hereunder. You may use the software subject to the license + * terms below provided that you ensure that this notice is replicated + * unmodified and in its entirety in all distributions of the software, + * modified or unmodified, in source code or in binary form. + * * Copyright (c) 2002-2005 The Regents of The University of Michigan * All rights reserved. * @@ -26,11 +38,12 @@ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * Authors: Ron Dreslinski + * Andreas Hansson */ /** * @file - * Base Memory Object declaration. + * MemObject declaration. */ #ifndef __MEM_MEM_OBJECT_HH__ @@ -38,13 +51,13 @@ #include "mem/port.hh" #include "params/MemObject.hh" -#include "sim/sim_object.hh" +#include "sim/clocked_object.hh" /** - * The base MemoryObject class, allows for an accesor function to a - * simobj that returns the Port. + * The MemObject class extends the ClockedObject with accessor functions + * to get its master and slave ports. */ -class MemObject : public SimObject +class MemObject : public ClockedObject { public: typedef MemObjectParams Params; @@ -53,13 +66,31 @@ class MemObject : public SimObject MemObject(const Params *params); - public: - /** Additional function to return the Port of a memory object. */ - virtual Port *getPort(const std::string &if_name, int idx = -1) = 0; + /** + * Get a master port with a given name and index. This is used at + * binding time and returns a reference to a protocol-agnostic + * base master port. + * + * @param if_name Port name + * @param idx Index in the case of a VectorPort + * + * @return A reference to the given port + */ + virtual BaseMasterPort& getMasterPort(const std::string& if_name, + PortID idx = InvalidPortID); - /** Tell object that this port is about to disappear, so it should remove it - * from any structures that it's keeping it in. */ - virtual void deletePortRefs(Port *p) ; + /** + * Get a slave port with a given name and index. This is used at + * binding time and returns a reference to a protocol-agnostic + * base master port. + * + * @param if_name Port name + * @param idx Index in the case of a VectorPort + * + * @return A reference to the given port + */ + virtual BaseSlavePort& getSlavePort(const std::string& if_name, + PortID idx = InvalidPortID); }; #endif //__MEM_MEM_OBJECT_HH__