X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=src%2Fmem%2Fruby%2Fcommon%2FAddress.cc;h=b075ef3c5aabed2373f292daff8b07c29cc757c6;hb=aa86800e7a142f41a8fe957c367c133dea8d61bf;hp=e74bdb47b0e13394deaada8298e487309e275466;hpb=a0651b8f6127c8b7994a165b525e93d87c470d20;p=gem5.git diff --git a/src/mem/ruby/common/Address.cc b/src/mem/ruby/common/Address.cc index e74bdb47b..b075ef3c5 100644 --- a/src/mem/ruby/common/Address.cc +++ b/src/mem/ruby/common/Address.cc @@ -26,26 +26,98 @@ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +#include "arch/isa_traits.hh" +#include "config/the_isa.hh" #include "mem/ruby/common/Address.hh" +#include "mem/ruby/system/System.hh" + +physical_address_t +Address::getLineAddress() const +{ + return bitSelect(RubySystem::getBlockSizeBits(), ADDRESS_WIDTH); +} + +physical_address_t +Address::getOffset() const +{ + return bitSelect(0, RubySystem::getBlockSizeBits() - 1); +} void -Address::output(ostream& out) const +Address::makeLineAddress() +{ + m_address = maskLowOrderBits(RubySystem::getBlockSizeBits()); +} + +// returns the next stride address based on line address +void +Address::makeNextStrideAddress(int stride) +{ + m_address = maskLowOrderBits(RubySystem::getBlockSizeBits()) + + RubySystem::getBlockSizeBytes()*stride; +} + +Index +Address::memoryModuleIndex() const +{ + Index index = + bitSelect(RubySystem::getBlockSizeBits() + + RubySystem::getMemorySizeBits(), ADDRESS_WIDTH); + assert (index >= 0); + return index; + + // Index indexHighPortion = + // address.bitSelect(MEMORY_SIZE_BITS - 1, + // PAGE_SIZE_BITS + NUMBER_OF_MEMORY_MODULE_BITS); + // Index indexLowPortion = + // address.bitSelect(DATA_BLOCK_BITS, PAGE_SIZE_BITS - 1); + // + // Index index = indexLowPortion | + // (indexHighPortion << (PAGE_SIZE_BITS - DATA_BLOCK_BITS)); + + /* + Round-robin mapping of addresses, at page size granularity + +ADDRESS_WIDTH MEMORY_SIZE_BITS PAGE_SIZE_BITS DATA_BLOCK_BITS + | | | | + \ / \ / \ / \ / 0 + ----------------------------------------------------------------------- + | unused |xxxxxxxxxxxxxxx| |xxxxxxxxxxxxxxx| | + | |xxxxxxxxxxxxxxx| |xxxxxxxxxxxxxxx| | + ----------------------------------------------------------------------- + indexHighPortion indexLowPortion + <-------> + NUMBER_OF_MEMORY_MODULE_BITS + */ +} + +void +Address::print(std::ostream& out) const +{ + using namespace std; + out << "[" << hex << "0x" << m_address << "," << " line 0x" + << maskLowOrderBits(RubySystem::getBlockSizeBits()) << dec << "]" + << flush; +} + +void +Address::output(std::ostream& out) const { // Note: this outputs addresses in the form "ffff", not "0xffff". // This code should always be able to write out addresses in a // format that can be read in by the below input() method. Please // don't change this without talking to Milo first. - out << hex << m_address << dec; + out << std::hex << m_address << std::dec; } void -Address::input(istream& in) +Address::input(std::istream& in) { // Note: this only works with addresses in the form "ffff", not // "0xffff". This code should always be able to read in addresses // written out by the above output() method. Please don't change // this without talking to Milo first. - in >> hex >> m_address >> dec; + in >> std::hex >> m_address >> std::dec; } Address::Address(const Address& obj) @@ -64,3 +136,24 @@ Address::operator=(const Address& obj) return *this; } +void +Address::makePageAddress() +{ + m_address = maskLowOrderBits(TheISA::LogVMPageSize); +} + +Address +page_address(const Address& addr) +{ + Address temp = addr; + temp.makePageAddress(); + return temp; +} + +Address +next_stride_address(const Address& addr, int stride) +{ + Address temp = addr; + temp.makeNextStrideAddress(stride); + return temp; +}