X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=src%2Fmem%2Fslicc%2Fsymbols%2FStateMachine.py;h=8f4676c4221e76c261bf3127f6353b81fe7b3768;hb=1740c4c448a65dee8b27dcdcdccdc1a6e8b4d6b6;hp=d1be1076984c83e53f691332e46914138edbac2a;hpb=39a055645f77e0fa7bf49406635dba6bd65e361f;p=gem5.git diff --git a/src/mem/slicc/symbols/StateMachine.py b/src/mem/slicc/symbols/StateMachine.py index d1be10769..8f4676c42 100644 --- a/src/mem/slicc/symbols/StateMachine.py +++ b/src/mem/slicc/symbols/StateMachine.py @@ -39,7 +39,7 @@ python_class_map = {"int": "Int", "WireBuffer": "RubyWireBuffer", "Sequencer": "RubySequencer", "DirectoryMemory": "RubyDirectoryMemory", - "MemoryControl": "RubyMemoryControl", + "MemoryControl": "MemoryControl", "DMASequencer": "DMASequencer" } @@ -168,9 +168,6 @@ class StateMachine(Symbol): self.printProfileDumperCC(path) self.printProfileDumperHH(path) - for func in self.functions: - func.writeCodeFiles(path) - def printControllerPython(self, path): code = self.symtab.codeFormatter() ident = self.ident @@ -256,7 +253,6 @@ public: const int & getVersion() const; const std::string toString() const; const std::string getName() const; - const MachineType getMachineType() const; void stallBuffer(MessageBuffer* buf, Address addr); void wakeUpBuffers(Address addr); void wakeUpAllBuffers(); @@ -268,6 +264,8 @@ public: void clearStats(); void blockOnQueue(Address addr, MessageBuffer* port); void unblock(Address addr); + void recordCacheTrace(int cntrl, CacheRecorder* tr); + Sequencer* getSequencer() const; private: ''') @@ -326,7 +324,7 @@ MachineID m_machineID; bool m_is_blocking; std::map m_block_map; typedef std::vector MsgVecType; -typedef m5::hash_map< Address, MsgVecType* > WaitingBufType; +typedef std::map< Address, MsgVecType* > WaitingBufType; WaitingBufType m_waiting_buffers; int m_max_in_port_rank; int m_cur_in_port_rank; @@ -348,8 +346,6 @@ static int m_num_controllers; // Set and Reset for cache_entry variable void set_cache_entry(${{self.EntryType.c_ident}}*& m_cache_entry_ptr, AbstractCacheEntry* m_new_cache_entry); void unset_cache_entry(${{self.EntryType.c_ident}}*& m_cache_entry_ptr); -// Set permissions for the cache_entry -void set_permission(${{self.EntryType.c_ident}}*& m_cache_entry_ptr, AccessPermission perm); ''') if self.TBEType != None: @@ -412,11 +408,17 @@ void unset_tbe(${{self.TBEType.c_ident}}*& m_tbe_ptr); * Created by slicc definition of Module "${{self.short}}" */ +#include +#include + #include #include #include +#include "base/compiler.hh" #include "base/cprintf.hh" +#include "debug/RubyGenerated.hh" +#include "debug/RubySlicc.hh" #include "mem/protocol/${ident}_Controller.hh" #include "mem/protocol/${ident}_Event.hh" #include "mem/protocol/${ident}_State.hh" @@ -459,6 +461,7 @@ $c_ident::$c_ident(const Params *p) m_recycle_latency = p->recycle_latency; m_number_of_TBEs = p->number_of_TBEs; m_is_blocking = false; + m_name = "${ident}"; ''') # # max_port_rank is used to size vectors and thus should be one plus the @@ -499,6 +502,13 @@ $c_ident::$c_ident(const Params *p) code(''' m_${{seq}}_ptr->setController(this); ''') + + else: + for seq in sequencers: + code(''' +m_${{seq}}_ptr->setController(this); + ''') + # # For the DMA controller, pass the sequencer a pointer to the # controller. @@ -592,12 +602,13 @@ $c_ident::init() network = var["network"] ordered = var["ordered"] vnet = var["virtual_network"] + vnet_type = var["vnet_type"] assert var.machine is not None code(''' machine_type = string_to_MachineType("${{var.machine.ident}}"); base = MachineType_base_number(machine_type); -$vid = m_net_ptr->get${network}NetQueue(m_version + base, $ordered, $vnet); +$vid = m_net_ptr->get${network}NetQueue(m_version + base, $ordered, $vnet, "$vnet_type"); ''') code('assert($vid != NULL);') @@ -675,6 +686,12 @@ $vid->setDescription("[Version " + to_string(m_version) + ", ${ident}, name=${{v else: mq_ident = "NULL" + seq_ident = "NULL" + for param in self.config_parameters: + if param.name == "sequencer": + assert(param.pointer) + seq_ident = "m_%s_ptr" % param.name + code(''' int $c_ident::getNumControllers() @@ -688,6 +705,12 @@ $c_ident::getMandatoryQueue() const return $mq_ident; } +Sequencer* +$c_ident::getSequencer() const +{ + return $seq_ident; +} + const int & $c_ident::getVersion() const { @@ -706,12 +729,6 @@ $c_ident::getName() const return m_name; } -const MachineType -$c_ident::getMachineType() const -{ - return MachineType_${ident}; -} - void $c_ident::stallBuffer(MessageBuffer* buf, Address addr) { @@ -861,15 +878,6 @@ $c_ident::unset_cache_entry(${{self.EntryType.c_ident}}*& m_cache_entry_ptr) { m_cache_entry_ptr = 0; } - -void -$c_ident::set_permission(${{self.EntryType.c_ident}}*& m_cache_entry_ptr, - AccessPermission perm) -{ - if (m_cache_entry_ptr != NULL) { - m_cache_entry_ptr->changePermission(perm); - } -} ''') if self.TBEType != None: @@ -891,6 +899,23 @@ $c_ident::unset_tbe(${{self.TBEType.c_ident}}*& m_tbe_ptr) code(''' +void +$c_ident::recordCacheTrace(int cntrl, CacheRecorder* tr) +{ +''') + # + # Record cache contents for all associated caches. + # + code.indent() + for param in self.config_parameters: + if param.type_ast.type.ident == "CacheMemory": + assert(param.pointer) + code('m_${{param.ident}}_ptr->recordCacheContents(cntrl, tr);') + + code.dedent() + code(''' +} + // Actions ''') if self.TBEType != None and self.EntryType != None: @@ -953,6 +978,9 @@ $c_ident::${{action.ident}}(const Address& addr) } ''') + for func in self.functions: + code(func.generateCode()) + code.write(path, "%s.cc" % c_ident) def printCWakeup(self, path): @@ -965,9 +993,13 @@ $c_ident::${{action.ident}}(const Address& addr) // Auto generated C++ code started by $__file__:$__line__ // ${ident}: ${{self.short}} +#include +#include + #include #include "base/misc.hh" +#include "debug/RubySlicc.hh" #include "mem/protocol/${ident}_Controller.hh" #include "mem/protocol/${ident}_Event.hh" #include "mem/protocol/${ident}_State.hh" @@ -1037,6 +1069,8 @@ ${ident}_Controller::wakeup() #include "base/misc.hh" #include "base/trace.hh" +#include "debug/ProtocolTrace.hh" +#include "debug/RubyGenerated.hh" #include "mem/protocol/${ident}_Controller.hh" #include "mem/protocol/${ident}_Event.hh" #include "mem/protocol/${ident}_State.hh" @@ -1065,13 +1099,13 @@ ${ident}_Controller::doTransition(${ident}_Event event, { ''') if self.TBEType != None and self.EntryType != None: - code('${ident}_State state = ${ident}_getState(m_tbe_ptr, m_cache_entry_ptr, addr);') + code('${ident}_State state = getState(m_tbe_ptr, m_cache_entry_ptr, addr);') elif self.TBEType != None: - code('${ident}_State state = ${ident}_getState(m_tbe_ptr, addr);') + code('${ident}_State state = getState(m_tbe_ptr, addr);') elif self.EntryType != None: - code('${ident}_State state = ${ident}_getState(m_cache_entry_ptr, addr);') + code('${ident}_State state = getState(m_cache_entry_ptr, addr);') else: - code('${ident}_State state = ${ident}_getState(addr);') + code('${ident}_State state = getState(addr);') code(''' ${ident}_State next_state = state; @@ -1099,42 +1133,44 @@ ${ident}_Controller::doTransition(${ident}_Event event, DPRINTF(RubyGenerated, "next_state: %s\\n", ${ident}_State_to_string(next_state)); m_profiler.countTransition(state, event); - DPRINTFR(ProtocolTrace, "%7d %3s %10s%20s %6s>%-6s %s %s\\n", - g_eventQueue_ptr->getTime(), m_version, "${ident}", - ${ident}_Event_to_string(event), - ${ident}_State_to_string(state), - ${ident}_State_to_string(next_state), - addr, GET_TRANSITION_COMMENT()); + DPRINTFR(ProtocolTrace, "%15d %3s %10s%20s %6s>%-6s %s %s\\n", + curTick(), m_version, "${ident}", + ${ident}_Event_to_string(event), + ${ident}_State_to_string(state), + ${ident}_State_to_string(next_state), + addr, GET_TRANSITION_COMMENT()); CLEAR_TRANSITION_COMMENT(); ''') if self.TBEType != None and self.EntryType != None: - code('${ident}_setState(m_tbe_ptr, m_cache_entry_ptr, addr, next_state);') - code('set_permission(m_cache_entry_ptr, ${ident}_State_to_permission(next_state));') + code('setState(m_tbe_ptr, m_cache_entry_ptr, addr, next_state);') + code('setAccessPermission(m_cache_entry_ptr, addr, next_state);') elif self.TBEType != None: - code('${ident}_setState(m_tbe_ptr, addr, next_state);') + code('setState(m_tbe_ptr, addr, next_state);') + code('setAccessPermission(addr, next_state);') elif self.EntryType != None: - code('${ident}_setState(m_cache_entry_ptr, addr, next_state);') - code('set_permission(m_cache_entry_ptr, ${ident}_State_to_permission(next_state));') + code('setState(m_cache_entry_ptr, addr, next_state);') + code('setAccessPermission(m_cache_entry_ptr, addr, next_state);') else: - code('${ident}_setState(addr, next_state);') + code('setState(addr, next_state);') + code('setAccessPermission(addr, next_state);') code(''' } else if (result == TransitionResult_ResourceStall) { - DPRINTFR(ProtocolTrace, "%7s %3s %10s%20s %6s>%-6s %s %s\\n", - g_eventQueue_ptr->getTime(), m_version, "${ident}", - ${ident}_Event_to_string(event), - ${ident}_State_to_string(state), - ${ident}_State_to_string(next_state), - addr, "Resource Stall"); + DPRINTFR(ProtocolTrace, "%15s %3s %10s%20s %6s>%-6s %s %s\\n", + curTick(), m_version, "${ident}", + ${ident}_Event_to_string(event), + ${ident}_State_to_string(state), + ${ident}_State_to_string(next_state), + addr, "Resource Stall"); } else if (result == TransitionResult_ProtocolStall) { DPRINTF(RubyGenerated, "stalling\\n"); - DPRINTFR(ProtocolTrace, "%7s %3s %10s%20s %6s>%-6s %s %s\\n", - g_eventQueue_ptr->getTime(), m_version, "${ident}", - ${ident}_Event_to_string(event), - ${ident}_State_to_string(state), - ${ident}_State_to_string(next_state), - addr, "Protocol Stall"); + DPRINTFR(ProtocolTrace, "%15s %3s %10s%20s %6s>%-6s %s %s\\n", + curTick(), m_version, "${ident}", + ${ident}_Event_to_string(event), + ${ident}_State_to_string(state), + ${ident}_State_to_string(next_state), + addr, "Protocol Stall"); } return result; @@ -1357,7 +1393,7 @@ ${ident}_ProfileDumper::dumpStats(std::ostream& out) const #include "mem/protocol/${ident}_Event.hh" #include "mem/protocol/${ident}_State.hh" -#include "mem/ruby/common/Global.hh" +#include "mem/ruby/common/TypeDefines.hh" class ${ident}_Profiler {