X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=src%2Fmem%2Ftport.cc;h=4de495e22f6d376ea65b547437ebc95384d70a0a;hb=abd33d6fd26bb69d3bf53ceb6c2dc8f90d893e34;hp=15c7fdf9f21c2eaa2529843d00a62fab09cd2dc5;hpb=dace77dc4a9fd95650cb4fe967fe28179672d9a3;p=gem5.git diff --git a/src/mem/tport.cc b/src/mem/tport.cc index 15c7fdf9f..4de495e22 100644 --- a/src/mem/tport.cc +++ b/src/mem/tport.cc @@ -1,4 +1,16 @@ /* + * Copyright (c) 2012 ARM Limited + * All rights reserved. + * + * The license below extends only to copyright in the software and shall + * not be construed as granting a license to any other intellectual + * property including but not limited to intellectual property relating + * to a hardware implementation of the functionality of the software + * licensed hereunder. You may use the software subject to the license + * terms below provided that you ensure that this notice is replicated + * unmodified and in its entirety in all distributions of the software, + * modified or unmodified, in source code or in binary form. + * * Copyright (c) 2006 The Regents of The University of Michigan * All rights reserved. * @@ -26,53 +38,36 @@ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * Authors: Ali Saidi + * Andreas Hansson */ #include "mem/tport.hh" +#include "sim/sim_object.hh" -bool -SimpleTimingPort::checkFunctional(PacketPtr pkt) +SimpleTimingPort::SimpleTimingPort(const std::string& _name, + SimObject* _owner) : + QueuedSlavePort(_name, _owner, queueImpl), queueImpl(*_owner, *this) { - DeferredPacketIterator i = transmitList.begin(); - DeferredPacketIterator end = transmitList.end(); - - for (; i != end; ++i) { - PacketPtr target = i->pkt; - // If the target contains data, and it overlaps the - // probed request, need to update data - if (pkt->checkFunctional(target)) { - return true; - } - } - - return false; } void SimpleTimingPort::recvFunctional(PacketPtr pkt) { - if (!checkFunctional(pkt)) { - // Just do an atomic access and throw away the returned latency + if (!respQueue.trySatisfyFunctional(pkt)) { + // do an atomic access and throw away the returned latency recvAtomic(pkt); } } bool -SimpleTimingPort::recvTiming(PacketPtr pkt) +SimpleTimingPort::recvTimingReq(PacketPtr pkt) { - // If the device is only a slave, it should only be sending - // responses, which should never get nacked. There used to be - // code to hanldle nacks here, but I'm pretty sure it didn't work - // correctly with the drain code, so that would need to be fixed - // if we ever added it back. - assert(pkt->isRequest()); - - if (pkt->memInhibitAsserted()) { - // snooper will supply based on copy of packet - // still target's responsibility to delete packet - delete pkt; - return true; - } + // the SimpleTimingPort should not be used anywhere where there is + // a need to deal with snoop responses and their flow control + // requirements + if (pkt->cacheResponding()) + panic("SimpleTimingPort should never see packets with the " + "cacheResponding flag set\n"); bool needsResponse = pkt->needsResponse(); Tick latency = recvAtomic(pkt); @@ -81,108 +76,11 @@ SimpleTimingPort::recvTiming(PacketPtr pkt) // recvAtomic() should already have turned packet into // atomic response assert(pkt->isResponse()); - schedSendTiming(pkt, curTick + latency); + schedTimingResp(pkt, curTick() + latency); } else { - delete pkt; + // queue the packet for deletion + pendingDelete.reset(pkt); } return true; } - - -void -SimpleTimingPort::schedSendTiming(PacketPtr pkt, Tick when) -{ - assert(when > curTick); - assert(when < curTick + Clock::Int::ms); - - // Nothing is on the list: add it and schedule an event - if (transmitList.empty() || when < transmitList.front().tick) { - transmitList.push_front(DeferredPacket(when, pkt)); - schedSendEvent(when); - return; - } - - // list is non-empty & this belongs at the end - if (when >= transmitList.back().tick) { - transmitList.push_back(DeferredPacket(when, pkt)); - return; - } - - // this belongs in the middle somewhere - DeferredPacketIterator i = transmitList.begin(); - i++; // already checked for insertion at front - DeferredPacketIterator end = transmitList.end(); - - for (; i != end; ++i) { - if (when < i->tick) { - transmitList.insert(i, DeferredPacket(when, pkt)); - return; - } - } - assert(false); // should never get here -} - - -void -SimpleTimingPort::sendDeferredPacket() -{ - assert(deferredPacketReady()); - // take packet off list here; if recvTiming() on the other side - // calls sendTiming() back on us (like SimpleTimingCpu does), then - // we get confused by having a non-active packet on transmitList - DeferredPacket dp = transmitList.front(); - transmitList.pop_front(); - bool success = sendTiming(dp.pkt); - - if (success) { - if (!transmitList.empty() && !sendEvent->scheduled()) { - Tick time = transmitList.front().tick; - sendEvent->schedule(time <= curTick ? curTick+1 : time); - } - - if (transmitList.empty() && drainEvent) { - drainEvent->process(); - drainEvent = NULL; - } - } else { - // Unsuccessful, need to put back on transmitList. Callee - // should not have messed with it (since it didn't accept that - // packet), so we can just push it back on the front. - assert(!sendEvent->scheduled()); - transmitList.push_front(dp); - } - - waitingOnRetry = !success; - - if (waitingOnRetry) { - DPRINTF(Bus, "Send failed, waiting on retry\n"); - } -} - - -void -SimpleTimingPort::recvRetry() -{ - DPRINTF(Bus, "Received retry\n"); - assert(waitingOnRetry); - sendDeferredPacket(); -} - - -void -SimpleTimingPort::processSendEvent() -{ - assert(!waitingOnRetry); - sendDeferredPacket(); -} - - -unsigned int -SimpleTimingPort::drain(Event *de) -{ - if (transmitList.size() == 0) - return 0; - drainEvent = de; - return 1; -}