X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=src%2Fmem%2Ftport.cc;h=4de495e22f6d376ea65b547437ebc95384d70a0a;hb=abd33d6fd26bb69d3bf53ceb6c2dc8f90d893e34;hp=4408b59baf323e7d2a7940d1f1aeb2aa732dd4ba;hpb=9929e884b6fe6567c3bd2fe2dd3bba85d4e9bbd1;p=gem5.git

diff --git a/src/mem/tport.cc b/src/mem/tport.cc
index 4408b59ba..4de495e22 100644
--- a/src/mem/tport.cc
+++ b/src/mem/tport.cc
@@ -41,11 +41,11 @@
  *          Andreas Hansson
  */
 
-#include "mem/mem_object.hh"
 #include "mem/tport.hh"
+#include "sim/sim_object.hh"
 
 SimpleTimingPort::SimpleTimingPort(const std::string& _name,
-                                   MemObject* _owner) :
+                                   SimObject* _owner) :
     QueuedSlavePort(_name, _owner, queueImpl), queueImpl(*_owner, *this)
 {
 }
@@ -53,7 +53,7 @@ SimpleTimingPort::SimpleTimingPort(const std::string& _name,
 void
 SimpleTimingPort::recvFunctional(PacketPtr pkt)
 {
-    if (!queue.checkFunctional(pkt)) {
+    if (!respQueue.trySatisfyFunctional(pkt)) {
         // do an atomic access and throw away the returned latency
         recvAtomic(pkt);
     }
@@ -62,16 +62,12 @@ SimpleTimingPort::recvFunctional(PacketPtr pkt)
 bool
 SimpleTimingPort::recvTimingReq(PacketPtr pkt)
 {
-    /// @todo temporary hack to deal with memory corruption issue until
-    /// 4-phase transactions are complete. Remove me later
-    for (int x = 0; x < pendingDelete.size(); x++)
-        delete pendingDelete[x];
-    pendingDelete.clear();
-
     // the SimpleTimingPort should not be used anywhere where there is
-    // a need to deal with inhibited packets
-    if (pkt->memInhibitAsserted())
-        panic("SimpleTimingPort should never see an inhibited request\n");
+    // a need to deal with snoop responses and their flow control
+    // requirements
+    if (pkt->cacheResponding())
+        panic("SimpleTimingPort should never see packets with the "
+              "cacheResponding flag set\n");
 
     bool needsResponse = pkt->needsResponse();
     Tick latency = recvAtomic(pkt);
@@ -82,10 +78,8 @@ SimpleTimingPort::recvTimingReq(PacketPtr pkt)
         assert(pkt->isResponse());
         schedTimingResp(pkt, curTick() + latency);
     } else {
-        /// @todo nominally we should just delete the packet here.
-        /// Until 4-phase stuff we can't because the sending
-        /// cache is still relying on it
-        pendingDelete.push_back(pkt);
+        // queue the packet for deletion
+        pendingDelete.reset(pkt);
     }
 
     return true;