X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=src%2Fmesa%2Fdrivers%2Fdri%2Fi915%2Fi830_vtbl.c;h=e85b2f9b5f23c66fb1b1060a0c2fde0fd1e4001f;hb=8d15268a61fe400668495e6cb42c4d15e8b17cbb;hp=4471ca2bbbdaa0c19d321a870751a8b6a07b20f8;hpb=ae44b92f61b78c9991060a8dd7fa7327d428c138;p=mesa.git diff --git a/src/mesa/drivers/dri/i915/i830_vtbl.c b/src/mesa/drivers/dri/i915/i830_vtbl.c index 4471ca2bbbd..e85b2f9b5f2 100644 --- a/src/mesa/drivers/dri/i915/i830_vtbl.c +++ b/src/mesa/drivers/dri/i915/i830_vtbl.c @@ -25,21 +25,25 @@ * **************************************************************************/ -#include "glapi/glapi.h" - #include "i830_context.h" #include "i830_reg.h" #include "intel_batchbuffer.h" +#include "intel_mipmap_tree.h" #include "intel_regions.h" #include "intel_tris.h" #include "intel_fbo.h" +#include "intel_buffers.h" +#include "tnl/tnl.h" #include "tnl/t_context.h" #include "tnl/t_vertex.h" +#include "swrast_setup/swrast_setup.h" +#include "main/renderbuffer.h" +#include "main/framebuffer.h" #define FILE_DEBUG_FLAG DEBUG_STATE -static GLboolean i830_check_vertex_size(struct intel_context *intel, - GLuint expected); +static bool i830_check_vertex_size(struct intel_context *intel, + GLuint expected); #define SZ_TO_HW(sz) ((sz-2)&0x3) #define EMIT_SZ(sz) (EMIT_1F + (sz) - 1) @@ -71,7 +75,7 @@ i830_render_prevalidate(struct intel_context *intel) static void i830_render_start(struct intel_context *intel) { - GLcontext *ctx = &intel->ctx; + struct gl_context *ctx = &intel->ctx; struct i830_context *i830 = i830_context(ctx); TNLcontext *tnl = TNL_CONTEXT(ctx); struct vertex_buffer *VB = &tnl->vb; @@ -233,12 +237,12 @@ i830_reduced_primitive_state(struct intel_context *intel, GLenum rprim) /* Pull apart the vertex format registers and figure out how large a * vertex is supposed to be. */ -static GLboolean +static bool i830_check_vertex_size(struct intel_context *intel, GLuint expected) { struct i830_context *i830 = i830_context(&intel->ctx); - int vft0 = i830->current->Ctx[I830_CTXREG_VF]; - int vft1 = i830->current->Ctx[I830_CTXREG_VF2]; + int vft0 = i830->state.Ctx[I830_CTXREG_VF]; + int vft1 = i830->state.Ctx[I830_CTXREG_VF2]; int nrtex = (vft0 & VFT0_TEX_COUNT_MASK) >> VFT0_TEX_COUNT_SHIFT; int i, sz = 0; @@ -366,7 +370,7 @@ i830_emit_invarient_state(struct intel_context *intel) #define emit( intel, state, size ) \ - intel_batchbuffer_data(intel->batch, state, size ) + intel_batchbuffer_data(intel, state, size, false) static GLuint get_dirty(struct i830_hw_state *state) @@ -414,10 +418,10 @@ static void i830_emit_state(struct intel_context *intel) { struct i830_context *i830 = i830_context(&intel->ctx); - struct i830_hw_state *state = i830->current; + struct i830_hw_state *state = &i830->state; int i, count; GLuint dirty; - dri_bo *aper_array[3 + I830_TEX_UNITS]; + drm_intel_bo *aper_array[3 + I830_TEX_UNITS]; int aper_count; GET_CURRENT_CONTEXT(ctx); BATCH_LOCALS; @@ -430,18 +434,19 @@ i830_emit_state(struct intel_context *intel) * scheduling is allowed, rather than assume that it is whenever a * batchbuffer fills up. */ - intel_batchbuffer_require_space(intel->batch, - get_state_size(state) + INTEL_PRIM_EMIT_SIZE); + intel_batchbuffer_require_space(intel, + get_state_size(state) + INTEL_PRIM_EMIT_SIZE, + false); count = 0; again: aper_count = 0; dirty = get_dirty(state); - aper_array[aper_count++] = intel->batch->buf; + aper_array[aper_count++] = intel->batch.bo; if (dirty & I830_UPLOAD_BUFFERS) { - aper_array[aper_count++] = state->draw_region->buffer; + aper_array[aper_count++] = state->draw_region->bo; if (state->depth_region) - aper_array[aper_count++] = state->depth_region->buffer; + aper_array[aper_count++] = state->depth_region->bo; } for (i = 0; i < I830_TEX_UNITS; i++) @@ -454,7 +459,7 @@ i830_emit_state(struct intel_context *intel) if (dri_bufmgr_check_aperture_space(aper_array, aper_count)) { if (count == 0) { count++; - intel_batchbuffer_flush(intel->batch); + intel_batchbuffer_flush(intel); goto again; } else { _mesa_error(ctx, GL_OUT_OF_MEMORY, "i830 emit state"); @@ -497,16 +502,14 @@ i830_emit_state(struct intel_context *intel) BEGIN_BATCH(count); OUT_BATCH(state->Buffer[I830_DESTREG_CBUFADDR0]); OUT_BATCH(state->Buffer[I830_DESTREG_CBUFADDR1]); - OUT_RELOC(state->draw_region->buffer, - I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, - state->draw_region->draw_offset); + OUT_RELOC(state->draw_region->bo, + I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0); if (state->depth_region) { OUT_BATCH(state->Buffer[I830_DESTREG_DBUFADDR0]); OUT_BATCH(state->Buffer[I830_DESTREG_DBUFADDR1]); - OUT_RELOC(state->depth_region->buffer, - I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, - state->depth_region->draw_offset); + OUT_RELOC(state->depth_region->bo, + I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0); } OUT_BATCH(state->Buffer[I830_DESTREG_DV0]); @@ -538,18 +541,9 @@ i830_emit_state(struct intel_context *intel) BEGIN_BATCH(I830_TEX_SETUP_SIZE + 1); OUT_BATCH(state->Tex[i][I830_TEXREG_TM0LI]); - if (state->tex_buffer[i]) { - OUT_RELOC(state->tex_buffer[i], - I915_GEM_DOMAIN_SAMPLER, 0, - state->tex_offset[i]); - } - else if (state == &i830->meta) { - assert(i == 0); - OUT_BATCH(0); - } - else { - OUT_BATCH(state->tex_offset[i]); - } + OUT_RELOC(state->tex_buffer[i], + I915_GEM_DOMAIN_SAMPLER, 0, + state->tex_offset[i]); OUT_BATCH(state->Tex[i][I830_TEXREG_TM0S1]); OUT_BATCH(state->Tex[i][I830_TEXREG_TM0S2]); @@ -568,9 +562,7 @@ i830_emit_state(struct intel_context *intel) } } - intel->batch->dirty_state &= ~dirty; assert(get_dirty(state) == 0); - assert((intel->batch->dirty_state & (1<<1)) == 0); } static void @@ -581,14 +573,10 @@ i830_destroy_context(struct intel_context *intel) intel_region_release(&i830->state.draw_region); intel_region_release(&i830->state.depth_region); - intel_region_release(&i830->meta.draw_region); - intel_region_release(&i830->meta.depth_region); - intel_region_release(&i830->initial.draw_region); - intel_region_release(&i830->initial.depth_region); for (i = 0; i < I830_TEX_UNITS; i++) { if (i830->state.tex_buffer[i] != NULL) { - dri_bo_unreference(i830->state.tex_buffer[i]); + drm_intel_bo_unreference(i830->state.tex_buffer[i]); i830->state.tex_buffer[i] = NULL; } } @@ -596,27 +584,47 @@ i830_destroy_context(struct intel_context *intel) _tnl_free_vertices(&intel->ctx); } +static uint32_t i830_render_target_format_for_mesa_format[MESA_FORMAT_COUNT] = +{ + [MESA_FORMAT_ARGB8888] = DV_PF_8888, + [MESA_FORMAT_XRGB8888] = DV_PF_8888, + [MESA_FORMAT_RGB565] = DV_PF_565, + [MESA_FORMAT_ARGB1555] = DV_PF_1555, + [MESA_FORMAT_ARGB4444] = DV_PF_4444, +}; + +static bool +i830_render_target_supported(struct intel_context *intel, gl_format format) +{ + if (format == MESA_FORMAT_S8_Z24 || + format == MESA_FORMAT_X8_Z24 || + format == MESA_FORMAT_Z16) { + return true; + } + + return i830_render_target_format_for_mesa_format[format] != 0; +} -void -i830_state_draw_region(struct intel_context *intel, - struct i830_hw_state *state, - struct intel_region *color_region, - struct intel_region *depth_region) +static void +i830_set_draw_region(struct intel_context *intel, + struct intel_region *color_regions[], + struct intel_region *depth_region, + GLuint num_regions) { struct i830_context *i830 = i830_context(&intel->ctx); - GLcontext *ctx = &intel->ctx; + struct gl_context *ctx = &intel->ctx; struct gl_renderbuffer *rb = ctx->DrawBuffer->_ColorDrawBuffers[0]; struct intel_renderbuffer *irb = intel_renderbuffer(rb); + struct gl_renderbuffer *drb; + struct intel_renderbuffer *idrb = NULL; GLuint value; + struct i830_hw_state *state = &i830->state; + uint32_t draw_x, draw_y; - ASSERT(state == &i830->state || state == &i830->meta); - - if (state->draw_region != color_region) { - intel_region_release(&state->draw_region); - intel_region_reference(&state->draw_region, color_region); + if (state->draw_region != color_regions[0]) { + intel_region_reference(&state->draw_region, color_regions[0]); } if (state->depth_region != depth_region) { - intel_region_release(&state->depth_region); intel_region_reference(&state->depth_region, depth_region); } @@ -624,7 +632,7 @@ i830_state_draw_region(struct intel_context *intel, * Set stride/cpp values */ i915_set_buf_info_for_region(&state->Buffer[I830_DESTREG_CBUFADDR0], - color_region, BUF_3D_ID_COLOR_BACK); + color_regions[0], BUF_3D_ID_COLOR_BACK); i915_set_buf_info_for_region(&state->Buffer[I830_DESTREG_DBUFADDR0], depth_region, BUF_3D_ID_DEPTH); @@ -636,24 +644,7 @@ i830_state_draw_region(struct intel_context *intel, DSTORG_VERT_BIAS(0x8) | DEPTH_IS_Z); /* .5 */ if (irb != NULL) { - switch (irb->Base.Format) { - case MESA_FORMAT_ARGB8888: - case MESA_FORMAT_XRGB8888: - value |= DV_PF_8888; - break; - case MESA_FORMAT_RGB565: - value |= DV_PF_565; - break; - case MESA_FORMAT_ARGB1555: - value |= DV_PF_1555; - break; - case MESA_FORMAT_ARGB4444: - value |= DV_PF_4444; - break; - default: - _mesa_problem(ctx, "Bad renderbuffer format: %d\n", - irb->Base.Format); - } + value |= i830_render_target_format_for_mesa_format[irb->Base.Format]; } if (depth_region && depth_region->cpp == 4) { @@ -664,29 +655,199 @@ i830_state_draw_region(struct intel_context *intel, } state->Buffer[I830_DESTREG_DV1] = value; + drb = ctx->DrawBuffer->Attachment[BUFFER_DEPTH].Renderbuffer; + if (!drb) + drb = ctx->DrawBuffer->Attachment[BUFFER_STENCIL].Renderbuffer; + + if (drb) + idrb = intel_renderbuffer(drb); + + /* We set up the drawing rectangle to be offset into the color + * region's location in the miptree. If it doesn't match with + * depth's offsets, we can't render to it. + * + * (Well, not actually true -- the hw grew a bit to let depth's + * offset get forced to 0,0. We may want to use that if people are + * hitting that case. Also, some configurations may be supportable + * by tweaking the start offset of the buffers around, which we + * can't do in general due to tiling) + */ + FALLBACK(intel, I830_FALLBACK_DRAW_OFFSET, + idrb && irb && (idrb->draw_x != irb->draw_x || + idrb->draw_y != irb->draw_y)); + + if (irb) { + draw_x = irb->draw_x; + draw_y = irb->draw_y; + } else if (idrb) { + draw_x = idrb->draw_x; + draw_y = idrb->draw_y; + } else { + draw_x = 0; + draw_y = 0; + } + state->Buffer[I830_DESTREG_DRAWRECT0] = _3DSTATE_DRAWRECT_INFO; state->Buffer[I830_DESTREG_DRAWRECT1] = 0; - state->Buffer[I830_DESTREG_DRAWRECT2] = 0; /* xmin, ymin */ + state->Buffer[I830_DESTREG_DRAWRECT2] = (draw_y << 16) | draw_x; state->Buffer[I830_DESTREG_DRAWRECT3] = - (ctx->DrawBuffer->Width & 0xffff) | - (ctx->DrawBuffer->Height << 16); - state->Buffer[I830_DESTREG_DRAWRECT4] = 0; /* xoff, yoff */ - state->Buffer[I830_DESTREG_DRAWRECT5] = 0; + ((ctx->DrawBuffer->Width + draw_x) & 0xffff) | + ((ctx->DrawBuffer->Height + draw_y) << 16); + state->Buffer[I830_DESTREG_DRAWRECT4] = (draw_y << 16) | draw_x; + state->Buffer[I830_DESTREG_DRAWRECT5] = MI_NOOP; I830_STATECHANGE(i830, I830_UPLOAD_BUFFERS); - - } - +/** + * Update the hardware state for drawing into a window or framebuffer object. + * + * Called by glDrawBuffer, glBindFramebufferEXT, MakeCurrent, and other + * places within the driver. + * + * Basically, this needs to be called any time the current framebuffer + * changes, the renderbuffers change, or we need to draw into different + * color buffers. + */ static void -i830_set_draw_region(struct intel_context *intel, - struct intel_region *color_regions[], - struct intel_region *depth_region, - GLuint num_regions) +i830_update_draw_buffer(struct intel_context *intel) { - struct i830_context *i830 = i830_context(&intel->ctx); - i830_state_draw_region(intel, &i830->state, color_regions[0], depth_region); + struct gl_context *ctx = &intel->ctx; + struct gl_framebuffer *fb = ctx->DrawBuffer; + struct intel_region *colorRegions[MAX_DRAW_BUFFERS], *depthRegion = NULL; + struct intel_renderbuffer *irbDepth = NULL, *irbStencil = NULL; + + if (!fb) { + /* this can happen during the initial context initialization */ + return; + } + + irbDepth = intel_get_renderbuffer(fb, BUFFER_DEPTH); + irbStencil = intel_get_renderbuffer(fb, BUFFER_STENCIL); + + /* Do this here, not core Mesa, since this function is called from + * many places within the driver. + */ + if (ctx->NewState & _NEW_BUFFERS) { + /* this updates the DrawBuffer->_NumColorDrawBuffers fields, etc */ + _mesa_update_framebuffer(ctx); + /* this updates the DrawBuffer's Width/Height if it's a FBO */ + _mesa_update_draw_buffer_bounds(ctx); + } + + if (fb->_Status != GL_FRAMEBUFFER_COMPLETE_EXT) { + /* this may occur when we're called by glBindFrameBuffer() during + * the process of someone setting up renderbuffers, etc. + */ + /*_mesa_debug(ctx, "DrawBuffer: incomplete user FBO\n");*/ + return; + } + + /* How many color buffers are we drawing into? + * + * If there are zero buffers or the buffer is too big, don't configure any + * regions for hardware drawing. We'll fallback to software below. Not + * having regions set makes some of the software fallback paths faster. + */ + if ((fb->Width > ctx->Const.MaxRenderbufferSize) + || (fb->Height > ctx->Const.MaxRenderbufferSize) + || (fb->_NumColorDrawBuffers == 0)) { + /* writing to 0 */ + colorRegions[0] = NULL; + } + else if (fb->_NumColorDrawBuffers > 1) { + int i; + struct intel_renderbuffer *irb; + + for (i = 0; i < fb->_NumColorDrawBuffers; i++) { + irb = intel_renderbuffer(fb->_ColorDrawBuffers[i]); + colorRegions[i] = (irb && irb->mt) ? irb->mt->region : NULL; + } + } + else { + /* Get the intel_renderbuffer for the single colorbuffer we're drawing + * into. + */ + if (fb->Name == 0) { + /* drawing to window system buffer */ + if (fb->_ColorDrawBufferIndexes[0] == BUFFER_FRONT_LEFT) + colorRegions[0] = intel_get_rb_region(fb, BUFFER_FRONT_LEFT); + else + colorRegions[0] = intel_get_rb_region(fb, BUFFER_BACK_LEFT); + } + else { + /* drawing to user-created FBO */ + struct intel_renderbuffer *irb; + irb = intel_renderbuffer(fb->_ColorDrawBuffers[0]); + colorRegions[0] = (irb && irb->mt->region) ? irb->mt->region : NULL; + } + } + + if (!colorRegions[0]) { + FALLBACK(intel, INTEL_FALLBACK_DRAW_BUFFER, true); + } + else { + FALLBACK(intel, INTEL_FALLBACK_DRAW_BUFFER, false); + } + + /* Check for depth fallback. */ + if (irbDepth && irbDepth->mt) { + FALLBACK(intel, INTEL_FALLBACK_DEPTH_BUFFER, false); + depthRegion = irbDepth->mt->region; + } else if (irbDepth && !irbDepth->mt) { + FALLBACK(intel, INTEL_FALLBACK_DEPTH_BUFFER, true); + depthRegion = NULL; + } else { /* !irbDepth */ + /* No fallback is needed because there is no depth buffer. */ + FALLBACK(intel, INTEL_FALLBACK_DEPTH_BUFFER, false); + depthRegion = NULL; + } + + /* Check for stencil fallback. */ + if (irbStencil && irbStencil->mt) { + assert(irbStencil->Base.Format == MESA_FORMAT_S8_Z24); + FALLBACK(intel, INTEL_FALLBACK_STENCIL_BUFFER, false); + } else if (irbStencil && !irbStencil->mt) { + FALLBACK(intel, INTEL_FALLBACK_STENCIL_BUFFER, true); + } else { /* !irbStencil */ + /* No fallback is needed because there is no stencil buffer. */ + FALLBACK(intel, INTEL_FALLBACK_STENCIL_BUFFER, false); + } + + /* If we have a (packed) stencil buffer attached but no depth buffer, + * we still need to set up the shared depth/stencil state so we can use it. + */ + if (depthRegion == NULL && irbStencil && irbStencil->mt + && irbStencil->Base.Format == MESA_FORMAT_S8_Z24) { + depthRegion = irbStencil->mt->region; + } + + /* + * Update depth and stencil test state + */ + ctx->Driver.Enable(ctx, GL_DEPTH_TEST, + (ctx->Depth.Test && fb->Visual.depthBits > 0)); + ctx->Driver.Enable(ctx, GL_STENCIL_TEST, + (ctx->Stencil.Enabled && fb->Visual.stencilBits > 0)); + + intel->vtbl.set_draw_region(intel, colorRegions, depthRegion, + fb->_NumColorDrawBuffers); + intel->NewGLState |= _NEW_BUFFERS; + + /* update viewport since it depends on window size */ + intelCalcViewport(ctx); + + /* Set state we know depends on drawable parameters: + */ + ctx->Driver.Scissor(ctx, ctx->Scissor.X, ctx->Scissor.Y, + ctx->Scissor.Width, ctx->Scissor.Height); + + ctx->Driver.DepthRange(ctx, ctx->Viewport.Near, ctx->Viewport.Far); + + /* Update culling direction which changes depending on the + * orientation of the buffer: + */ + ctx->Driver.FrontFace(ctx, ctx->Polygon.FrontFace); } /* This isn't really handled at the moment. @@ -702,17 +863,29 @@ static void i830_assert_not_dirty( struct intel_context *intel ) { struct i830_context *i830 = i830_context(&intel->ctx); - struct i830_hw_state *state = i830->current; - assert(!get_dirty(state)); + assert(!get_dirty(&i830->state)); + (void) i830; } static void i830_invalidate_state(struct intel_context *intel, GLuint new_state) { + struct gl_context *ctx = &intel->ctx; + + _swsetup_InvalidateState(ctx, new_state); + _tnl_InvalidateState(ctx, new_state); + _tnl_invalidate_vertex_state(ctx, new_state); + if (new_state & _NEW_LIGHT) i830_update_provoking_vertex(&intel->ctx); } +static bool +i830_is_hiz_depth_format(struct intel_context *intel, gl_format format) +{ + return false; +} + void i830InitVtbl(struct i830_context *i830) { @@ -722,10 +895,13 @@ i830InitVtbl(struct i830_context *i830) i830->intel.vtbl.new_batch = i830_new_batch; i830->intel.vtbl.reduced_primitive_state = i830_reduced_primitive_state; i830->intel.vtbl.set_draw_region = i830_set_draw_region; + i830->intel.vtbl.update_draw_buffer = i830_update_draw_buffer; i830->intel.vtbl.update_texture_state = i830UpdateTextureState; i830->intel.vtbl.render_start = i830_render_start; i830->intel.vtbl.render_prevalidate = i830_render_prevalidate; i830->intel.vtbl.assert_not_dirty = i830_assert_not_dirty; i830->intel.vtbl.finish_batch = intel_finish_vb; i830->intel.vtbl.invalidate_state = i830_invalidate_state; + i830->intel.vtbl.render_target_supported = i830_render_target_supported; + i830->intel.vtbl.is_hiz_depth_format = i830_is_hiz_depth_format; }