X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=src%2Fmesa%2Fdrivers%2Fdri%2Fi915%2Fi915_tex_layout.c;h=1e3cfadddc8eba5a19eaa87444757c117290b8f3;hb=40c995c1fd7865f1b25765aa783fdadbf948b3dd;hp=702655283ba40d7c29d81ade782c9ab838048ae7;hpb=ee30e24f5f9cc2ec6c5a3edbe498e5e0334f788b;p=mesa.git

diff --git a/src/mesa/drivers/dri/i915/i915_tex_layout.c b/src/mesa/drivers/dri/i915/i915_tex_layout.c
index 702655283ba..1e3cfadddc8 100644
--- a/src/mesa/drivers/dri/i915/i915_tex_layout.c
+++ b/src/mesa/drivers/dri/i915/i915_tex_layout.c
@@ -67,7 +67,8 @@ static GLint bottom_offsets[6] = {
 
 
 /**
- * Cube texture map layout for i830M-GM915.
+ * Cube texture map layout for i830M-GM915 and
+ * non-compressed cube texture map on GM945.
  *
  * Hardware layout looks like:
  *
@@ -111,9 +112,7 @@ static GLint bottom_offsets[6] = {
  *
  */
 static void
-i915_miptree_layout_cube(struct intel_context *intel,
-			 struct intel_mipmap_tree * mt,
-			 uint32_t tiling)
+i915_miptree_layout_cube(struct intel_mipmap_tree * mt)
 {
    const GLuint dim = mt->width0;
    GLuint face;
@@ -127,10 +126,10 @@ i915_miptree_layout_cube(struct intel_context *intel,
    mt->total_height = dim * 4;
 
    for (level = mt->first_level; level <= mt->last_level; level++) {
-      intel_miptree_set_level_info(mt, level, 6,
+      intel_miptree_set_level_info(mt, level,
 				   0, 0,
 				   lvlWidth, lvlHeight,
-				   1);
+				   6);
       lvlWidth /= 2;
       lvlHeight /= 2;
    }
@@ -155,9 +154,7 @@ i915_miptree_layout_cube(struct intel_context *intel,
 }
 
 static void
-i915_miptree_layout_3d(struct intel_context *intel,
-		       struct intel_mipmap_tree * mt,
-		       uint32_t tiling)
+i915_miptree_layout_3d(struct intel_mipmap_tree * mt)
 {
    GLuint width = mt->width0;
    GLuint height = mt->height0;
@@ -170,7 +167,7 @@ i915_miptree_layout_3d(struct intel_context *intel,
 
    /* XXX: hardware expects/requires 9 levels at minimum. */
    for (level = mt->first_level; level <= MAX2(8, mt->last_level); level++) {
-      intel_miptree_set_level_info(mt, level, depth, 0, mt->total_height,
+      intel_miptree_set_level_info(mt, level, 0, mt->total_height,
 				   width, height, depth);
 
       stack_height += MAX2(2, height);
@@ -200,9 +197,7 @@ i915_miptree_layout_3d(struct intel_context *intel,
 }
 
 static void
-i915_miptree_layout_2d(struct intel_context *intel,
-		       struct intel_mipmap_tree * mt,
-		       uint32_t tiling)
+i915_miptree_layout_2d(struct intel_mipmap_tree * mt)
 {
    GLuint width = mt->width0;
    GLuint height = mt->height0;
@@ -213,14 +208,14 @@ i915_miptree_layout_2d(struct intel_context *intel,
    mt->total_height = 0;
 
    for (level = mt->first_level; level <= mt->last_level; level++) {
-      intel_miptree_set_level_info(mt, level, 1,
+      intel_miptree_set_level_info(mt, level,
 				   0, mt->total_height,
 				   width, height, 1);
 
       if (mt->compressed)
-	 img_height = MAX2(1, height / 4);
+	 img_height = ALIGN(height, 4) / 4;
       else
-	 img_height = (MAX2(2, height) + 1) & ~1;
+	 img_height = ALIGN(height, 2);
 
       mt->total_height += img_height;
 
@@ -229,21 +224,20 @@ i915_miptree_layout_2d(struct intel_context *intel,
    }
 }
 
-GLboolean
-i915_miptree_layout(struct intel_context *intel, struct intel_mipmap_tree * mt,
-		    uint32_t tiling)
+void
+i915_miptree_layout(struct intel_mipmap_tree * mt)
 {
    switch (mt->target) {
    case GL_TEXTURE_CUBE_MAP:
-      i915_miptree_layout_cube(intel, mt, tiling);
+      i915_miptree_layout_cube(mt);
       break;
    case GL_TEXTURE_3D:
-      i915_miptree_layout_3d(intel, mt, tiling);
+      i915_miptree_layout_3d(mt);
       break;
    case GL_TEXTURE_1D:
    case GL_TEXTURE_2D:
    case GL_TEXTURE_RECTANGLE_ARB:
-      i915_miptree_layout_2d(intel, mt, tiling);
+      i915_miptree_layout_2d(mt);
       break;
    default:
       _mesa_problem(NULL, "Unexpected tex target in i915_miptree_layout()");
@@ -252,13 +246,11 @@ i915_miptree_layout(struct intel_context *intel, struct intel_mipmap_tree * mt,
 
    DBG("%s: %dx%dx%d\n", __FUNCTION__,
        mt->total_width, mt->total_height, mt->cpp);
-
-   return GL_TRUE;
 }
 
 
 /**
- * Cube texture map layout for GM945 and later.
+ * Compressed cube texture map layout for GM945 and later.
  *
  * The hardware layout looks like the 830-915 layout, except for the small
  * sizes.  A zoomed in view of the layout for 945 is:
@@ -318,9 +310,7 @@ i915_miptree_layout(struct intel_context *intel, struct intel_mipmap_tree * mt,
  */
 
 static void
-i945_miptree_layout_cube(struct intel_context *intel,
-			 struct intel_mipmap_tree * mt,
-			 uint32_t tiling)
+i945_miptree_layout_cube(struct intel_mipmap_tree * mt)
 {
    const GLuint dim = mt->width0;
    GLuint face;
@@ -345,9 +335,9 @@ i945_miptree_layout_cube(struct intel_context *intel,
 
    /* Set all the levels to effectively occupy the whole rectangular region. */
    for (level = mt->first_level; level <= mt->last_level; level++) {
-      intel_miptree_set_level_info(mt, level, 6,
+      intel_miptree_set_level_info(mt, level,
 				   0, 0,
-				   lvlWidth, lvlHeight, 1);
+				   lvlWidth, lvlHeight, 6);
       lvlWidth /= 2;
       lvlHeight /= 2;
    }
@@ -410,9 +400,7 @@ i945_miptree_layout_cube(struct intel_context *intel,
 }
 
 static void
-i945_miptree_layout_3d(struct intel_context *intel,
-		       struct intel_mipmap_tree * mt,
-		       uint32_t tiling)
+i945_miptree_layout_3d(struct intel_mipmap_tree * mt)
 {
    GLuint width = mt->width0;
    GLuint height = mt->height0;
@@ -433,7 +421,7 @@ i945_miptree_layout_3d(struct intel_context *intel,
       GLint y = 0;
       GLint q, j;
 
-      intel_miptree_set_level_info(mt, level, depth,
+      intel_miptree_set_level_info(mt, level,
 				   0, mt->total_height,
 				   width, height, depth);
 
@@ -465,24 +453,23 @@ i945_miptree_layout_3d(struct intel_context *intel,
    }
 }
 
-GLboolean
-i945_miptree_layout(struct intel_context *intel, struct intel_mipmap_tree * mt,
-		    uint32_t tiling)
+void
+i945_miptree_layout(struct intel_mipmap_tree * mt)
 {
    switch (mt->target) {
    case GL_TEXTURE_CUBE_MAP:
       if (mt->compressed)
-	 i945_miptree_layout_cube(intel, mt, tiling);
+	 i945_miptree_layout_cube(mt);
       else
-	 i915_miptree_layout_cube(intel, mt, tiling);
+	 i915_miptree_layout_cube(mt);
       break;
    case GL_TEXTURE_3D:
-      i945_miptree_layout_3d(intel, mt, tiling);
+      i945_miptree_layout_3d(mt);
       break;
    case GL_TEXTURE_1D:
    case GL_TEXTURE_2D:
    case GL_TEXTURE_RECTANGLE_ARB:
-      i945_miptree_layout_2d(intel, mt, tiling);
+      i945_miptree_layout_2d(mt);
       break;
    default:
       _mesa_problem(NULL, "Unexpected tex target in i945_miptree_layout()");
@@ -491,6 +478,4 @@ i945_miptree_layout(struct intel_context *intel, struct intel_mipmap_tree * mt,
 
    DBG("%s: %dx%dx%d\n", __FUNCTION__,
        mt->total_width, mt->total_height, mt->cpp);
-
-   return GL_TRUE;
 }