X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=src%2Fmesa%2Fdrivers%2Fdri%2Fi915%2Fintel_mipmap_tree.h;h=2d11853389e9ef0b3b3c7edb9ee4c43969a5c43d;hb=f8894fab0294817481b30e3cc40f6b3ccfe9314d;hp=35cad6dfcc6dfca324bd9709dea4c0268254038e;hpb=442442026eb241f05f2b7c03da304e0be047a7da;p=mesa.git

diff --git a/src/mesa/drivers/dri/i915/intel_mipmap_tree.h b/src/mesa/drivers/dri/i915/intel_mipmap_tree.h
index 35cad6dfcc6..2d11853389e 100644
--- a/src/mesa/drivers/dri/i915/intel_mipmap_tree.h
+++ b/src/mesa/drivers/dri/i915/intel_mipmap_tree.h
@@ -1,6 +1,6 @@
 /**************************************************************************
  * 
- * Copyright 2006 Tungsten Graphics, Inc., Cedar Park, Texas.
+ * Copyright 2006 VMware, Inc.
  * All Rights Reserved.
  * 
  * Permission is hereby granted, free of charge, to any person obtaining a
@@ -18,7 +18,7 @@
  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
- * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
+ * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR
  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
@@ -34,10 +34,6 @@
 #include "intel_regions.h"
 #include "GL/internal/dri_interface.h"
 
-#ifdef __cplusplus
-extern "C" {
-#endif
-
 /* A layer on top of the intel_regions code which adds:
  *
  * - Code to size and layout a region to hold a set of mipmaps.
@@ -98,8 +94,6 @@ struct intel_mipmap_level
     *
     * The exact semantics of depth varies according to the texture target:
     *    - For GL_TEXTURE_CUBE_MAP, depth is 6.
-    *    - For GL_TEXTURE_2D_ARRAY, depth is the number of array slices. It is
-    *      identical for all miplevels in the texture.
     *    - For GL_TEXTURE_3D, it is the texture's depth at this miplevel. Its
     *      value, like width and height, varies with miplevel.
     *    - For other texture types, depth is 1.
@@ -149,7 +143,7 @@ struct intel_mipmap_tree
     * This is just the same as the gl_texture_image->TexFormat or
     * gl_renderbuffer->Format.
     */
-   gl_format format;
+   mesa_format format;
 
    /**
     * The X offset of each image in the miptree must be aligned to this. See
@@ -164,35 +158,14 @@ struct intel_mipmap_tree
    /**
     * Level zero image dimensions.  These dimensions correspond to the
     * physical layout of data in memory.  Accordingly, they account for the
-    * extra width, height, and or depth that must be allocated in order to
-    * accommodate multisample formats, and they account for the extra factor
-    * of 6 in depth that must be allocated in order to accommodate cubemap
-    * textures.
+    * extra factor of 6 in depth that must be allocated in order to
+    * accommodate cubemap textures.
     */
    GLuint physical_width0, physical_height0, physical_depth0;
 
    GLuint cpp;
    bool compressed;
 
-   /**
-    * Level zero image dimensions.  These dimensions correspond to the
-    * logical width, height, and depth of the region as seen by client code.
-    * Accordingly, they do not account for the extra width, height, and/or
-    * depth that must be allocated in order to accommodate multisample
-    * formats, nor do they account for the extra factor of 6 in depth that
-    * must be allocated in order to accommodate cubemap textures.
-    */
-   uint32_t logical_width0, logical_height0, logical_depth0;
-
-   /**
-    * For 1D array, 2D array, cube, and 2D multisampled surfaces on Gen7: true
-    * if the surface only contains LOD 0, and hence no space is for LOD's
-    * other than 0 in between array slices.
-    *
-    * Corresponds to the surface_array_spacing bit in gen7_surface_state.
-    */
-   bool array_spacing_lod0;
-
    /* Derived from the above:
     */
    GLuint total_width;
@@ -223,7 +196,7 @@ enum intel_miptree_tiling_mode {
 
 struct intel_mipmap_tree *intel_miptree_create(struct intel_context *intel,
                                                GLenum target,
-					       gl_format format,
+					       mesa_format format,
                                                GLuint first_level,
                                                GLuint last_level,
                                                GLuint width0,
@@ -235,18 +208,17 @@ struct intel_mipmap_tree *intel_miptree_create(struct intel_context *intel,
 struct intel_mipmap_tree *
 intel_miptree_create_layout(struct intel_context *intel,
                             GLenum target,
-                            gl_format format,
+                            mesa_format format,
                             GLuint first_level,
                             GLuint last_level,
                             GLuint width0,
                             GLuint height0,
-                            GLuint depth0,
-                            bool for_bo);
+                            GLuint depth0);
 
 struct intel_mipmap_tree *
 intel_miptree_create_for_bo(struct intel_context *intel,
                             drm_intel_bo *bo,
-                            gl_format format,
+                            mesa_format format,
                             uint32_t offset,
                             uint32_t width,
                             uint32_t height,
@@ -256,13 +228,13 @@ intel_miptree_create_for_bo(struct intel_context *intel,
 struct intel_mipmap_tree*
 intel_miptree_create_for_dri2_buffer(struct intel_context *intel,
                                      unsigned dri_attachment,
-                                     gl_format format,
+                                     mesa_format format,
                                      struct intel_region *region);
 
 struct intel_mipmap_tree*
 intel_miptree_create_for_image_buffer(struct intel_context *intel,
                                       enum __DRIimageBufferMask buffer_type,
-                                      gl_format format,
+                                      mesa_format format,
                                       uint32_t num_samples,
                                       struct intel_region *region);
 
@@ -275,7 +247,7 @@ intel_miptree_create_for_image_buffer(struct intel_context *intel,
  */
 struct intel_mipmap_tree*
 intel_miptree_create_for_renderbuffer(struct intel_context *intel,
-                                      gl_format format,
+                                      mesa_format format,
                                       uint32_t width,
                                       uint32_t height);
 
@@ -285,6 +257,10 @@ intel_miptree_check_level_layer(struct intel_mipmap_tree *mt,
                                 uint32_t level,
                                 uint32_t layer)
 {
+   (void) mt;
+   (void) level;
+   (void) layer;
+
    assert(level >= mt->first_level);
    assert(level <= mt->last_level);
    assert(layer < mt->level[level].depth);
@@ -340,14 +316,11 @@ intel_miptree_copy_teximage(struct intel_context *intel,
  */
 void i915_miptree_layout(struct intel_mipmap_tree *mt);
 void i945_miptree_layout(struct intel_mipmap_tree *mt);
-void brw_miptree_layout(struct intel_context *intel,
-			struct intel_mipmap_tree *mt);
 
 void *intel_miptree_map_raw(struct intel_context *intel,
                             struct intel_mipmap_tree *mt);
 
-void intel_miptree_unmap_raw(struct intel_context *intel,
-                             struct intel_mipmap_tree *mt);
+void intel_miptree_unmap_raw(struct intel_mipmap_tree *mt);
 
 void
 intel_miptree_map(struct intel_context *intel,
@@ -369,8 +342,4 @@ intel_miptree_unmap(struct intel_context *intel,
 		    unsigned int slice);
 
 
-#ifdef __cplusplus
-}
-#endif
-
 #endif