X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=src%2Fmesa%2Fdrivers%2Fdri%2Fi965%2Fbrw_context.c;h=df753abed02bb40f9eda51728e5a88fa642f6e07;hb=3e0bb02358d627e784a2b7041d6e2e23e3dfd2c5;hp=3c4ae8a7a4f6d7920bf43457f1d707d6863ad130;hpb=cd6a31cd4a9ea6deef4778c2eaef2d47240c3a6e;p=mesa.git

diff --git a/src/mesa/drivers/dri/i965/brw_context.c b/src/mesa/drivers/dri/i965/brw_context.c
index 3c4ae8a7a4f..df753abed02 100644
--- a/src/mesa/drivers/dri/i965/brw_context.c
+++ b/src/mesa/drivers/dri/i965/brw_context.c
@@ -51,9 +51,6 @@ static void brwInitDriverFunctions( struct dd_function_table *functions )
 
    brwInitFragProgFuncs( functions );
    brw_init_queryobj_functions(functions);
-
-   functions->Enable = brw_enable;
-   functions->DepthRange = brw_depth_range;
 }
 
 GLboolean brwCreateContext( int api,
@@ -122,9 +119,6 @@ GLboolean brwCreateContext( int api,
 	 (i == MESA_SHADER_FRAGMENT);
       ctx->ShaderCompilerOptions[i].EmitNoIndirectTemp =
 	 (i == MESA_SHADER_FRAGMENT);
-
-      if (intel->gen == 6)
-	 ctx->ShaderCompilerOptions[i].EmitNoIfs = GL_TRUE;
    }
 
    ctx->Const.VertexProgram.MaxNativeInstructions = (16 * 1024);
@@ -154,6 +148,22 @@ GLboolean brwCreateContext( int api,
       MIN2(ctx->Const.FragmentProgram.MaxNativeParameters,
 	   ctx->Const.FragmentProgram.MaxEnvParams);
 
+   /* Fragment shaders use real, 32-bit twos-complement integers for all
+    * integer types.
+    */
+   ctx->Const.FragmentProgram.LowInt.RangeMin = 31;
+   ctx->Const.FragmentProgram.LowInt.RangeMax = 30;
+   ctx->Const.FragmentProgram.LowInt.Precision = 0;
+   ctx->Const.FragmentProgram.HighInt = ctx->Const.FragmentProgram.MediumInt
+      = ctx->Const.FragmentProgram.LowInt;
+
+   /* Gen6 converts quads to polygon in beginning of 3D pipeline,
+      but we're not sure how it's actually done for vertex order,
+      that affect provoking vertex decision. Always use last vertex
+      convention for quad primitive which works as expected for now. */
+   if (intel->gen >= 6)
+       ctx->Const.QuadsFollowProvokingVertexConvention = GL_FALSE;
+
    if (intel->is_g4x || intel->gen >= 5) {
       brw->CMD_VF_STATISTICS = CMD_VF_STATISTICS_GM45;
       brw->CMD_PIPELINE_SELECT = CMD_PIPELINE_SELECT_GM45;
@@ -168,10 +178,38 @@ GLboolean brwCreateContext( int api,
    }
 
    /* WM maximum threads is number of EUs times number of threads per EU. */
-   if (intel->gen >= 6) {
-      brw->urb.size = 1024;
-      brw->vs_max_threads = 60;
-      brw->wm_max_threads = 80;
+   if (intel->gen >= 7) {
+      if (IS_IVB_GT1(intel->intelScreen->deviceID)) {
+	 brw->wm_max_threads = 86;
+	 brw->vs_max_threads = 36;
+	 brw->urb.size = 128;
+	 brw->urb.max_vs_entries = 512;
+	 brw->urb.max_gs_entries = 192;
+      } else if (IS_IVB_GT2(intel->intelScreen->deviceID)) {
+	 brw->wm_max_threads = 86;
+	 brw->vs_max_threads = 128;
+	 brw->urb.size = 256;
+	 brw->urb.max_vs_entries = 704;
+	 brw->urb.max_gs_entries = 320;
+      } else {
+	 assert(!"Unknown gen7 device.");
+      }
+   } else if (intel->gen == 6) {
+      if (IS_SNB_GT2(intel->intelScreen->deviceID)) {
+	 /* This could possibly be 80, but is supposed to require
+	  * disabling of WIZ hashing (bit 6 of GT_MODE, 0x20d0) and a
+	  * GPU reset to change.
+	  */
+	 brw->wm_max_threads = 40;
+	 brw->vs_max_threads = 60;
+	 brw->urb.size = 64;            /* volume 5c.5 section 5.1 */
+	 brw->urb.max_vs_entries = 128; /* volume 2a (see 3DSTATE_URB) */
+      } else {
+	 brw->wm_max_threads = 40;
+	 brw->vs_max_threads = 24;
+	 brw->urb.size = 32;            /* volume 5c.5 section 5.1 */
+	 brw->urb.max_vs_entries = 256; /* volume 2a (see 3DSTATE_URB) */
+      }
    } else if (intel->gen == 5) {
       brw->urb.size = 1024;
       brw->vs_max_threads = 72;
@@ -207,11 +245,6 @@ GLboolean brwCreateContext( int api,
 
    brw_draw_init( brw );
 
-   /* Now that most driver functions are hooked up, initialize some of the
-    * immediate state.
-    */
-   brw_update_cc_vp(brw);
-
    return GL_TRUE;
 }