X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=src%2Fmesa%2Fdrivers%2Fdri%2Fi965%2Fbrw_context.c;h=df753abed02bb40f9eda51728e5a88fa642f6e07;hb=3e0bb02358d627e784a2b7041d6e2e23e3dfd2c5;hp=3e7cf6b867bbf4d2ef61e1f8ac10aab318d8c313;hpb=0a48949a11006f9c3b2ee0c93a796a03413345fa;p=mesa.git

diff --git a/src/mesa/drivers/dri/i965/brw_context.c b/src/mesa/drivers/dri/i965/brw_context.c
index 3e7cf6b867b..df753abed02 100644
--- a/src/mesa/drivers/dri/i965/brw_context.c
+++ b/src/mesa/drivers/dri/i965/brw_context.c
@@ -34,8 +34,6 @@
 #include "main/api_noop.h"
 #include "main/macros.h"
 #include "main/simple_list.h"
-#include "shader/shader_api.h"
-
 #include "brw_context.h"
 #include "brw_defines.h"
 #include "brw_draw.h"
@@ -43,7 +41,6 @@
 #include "intel_span.h"
 #include "tnl/t_pipeline.h"
 
-
 /***************************************
  * Mesa's Driver Functions
  ***************************************/
@@ -57,14 +54,15 @@ static void brwInitDriverFunctions( struct dd_function_table *functions )
 }
 
 GLboolean brwCreateContext( int api,
-			    const __GLcontextModes *mesaVis,
+			    const struct gl_config *mesaVis,
 			    __DRIcontext *driContextPriv,
 			    void *sharedContextPrivate)
 {
    struct dd_function_table functions;
    struct brw_context *brw = (struct brw_context *) CALLOC_STRUCT(brw_context);
    struct intel_context *intel = &brw->intel;
-   GLcontext *ctx = &intel->ctx;
+   struct gl_context *ctx = &intel->ctx;
+   unsigned i;
 
    if (!brw) {
       printf("%s: failed to alloc context\n", __FUNCTION__);
@@ -109,8 +107,19 @@ GLboolean brwCreateContext( int api,
    ctx->Const.MaxPointSizeAA = 255.0;
 
    /* We want the GLSL compiler to emit code that uses condition codes */
-   ctx->Shader.EmitCondCodes = GL_TRUE;
-   ctx->Shader.EmitNVTempInitialization = GL_TRUE;
+   for (i = 0; i <= MESA_SHADER_FRAGMENT; i++) {
+      ctx->ShaderCompilerOptions[i].EmitCondCodes = GL_TRUE;
+      ctx->ShaderCompilerOptions[i].EmitNVTempInitialization = GL_TRUE;
+      ctx->ShaderCompilerOptions[i].EmitNoNoise = GL_TRUE;
+      ctx->ShaderCompilerOptions[i].EmitNoMainReturn = GL_TRUE;
+      ctx->ShaderCompilerOptions[i].EmitNoIndirectInput = GL_TRUE;
+      ctx->ShaderCompilerOptions[i].EmitNoIndirectOutput = GL_TRUE;
+
+      ctx->ShaderCompilerOptions[i].EmitNoIndirectUniform =
+	 (i == MESA_SHADER_FRAGMENT);
+      ctx->ShaderCompilerOptions[i].EmitNoIndirectTemp =
+	 (i == MESA_SHADER_FRAGMENT);
+   }
 
    ctx->Const.VertexProgram.MaxNativeInstructions = (16 * 1024);
    ctx->Const.VertexProgram.MaxAluInstructions = 0;
@@ -139,11 +148,28 @@ GLboolean brwCreateContext( int api,
       MIN2(ctx->Const.FragmentProgram.MaxNativeParameters,
 	   ctx->Const.FragmentProgram.MaxEnvParams);
 
+   /* Fragment shaders use real, 32-bit twos-complement integers for all
+    * integer types.
+    */
+   ctx->Const.FragmentProgram.LowInt.RangeMin = 31;
+   ctx->Const.FragmentProgram.LowInt.RangeMax = 30;
+   ctx->Const.FragmentProgram.LowInt.Precision = 0;
+   ctx->Const.FragmentProgram.HighInt = ctx->Const.FragmentProgram.MediumInt
+      = ctx->Const.FragmentProgram.LowInt;
+
+   /* Gen6 converts quads to polygon in beginning of 3D pipeline,
+      but we're not sure how it's actually done for vertex order,
+      that affect provoking vertex decision. Always use last vertex
+      convention for quad primitive which works as expected for now. */
+   if (intel->gen >= 6)
+       ctx->Const.QuadsFollowProvokingVertexConvention = GL_FALSE;
+
    if (intel->is_g4x || intel->gen >= 5) {
       brw->CMD_VF_STATISTICS = CMD_VF_STATISTICS_GM45;
       brw->CMD_PIPELINE_SELECT = CMD_PIPELINE_SELECT_GM45;
       brw->has_surface_tile_offset = GL_TRUE;
-      brw->has_compr4 = GL_TRUE;
+      if (intel->gen < 6)
+	  brw->has_compr4 = GL_TRUE;
       brw->has_aa_line_parameters = GL_TRUE;
       brw->has_pln = GL_TRUE;
   } else {
@@ -152,7 +178,39 @@ GLboolean brwCreateContext( int api,
    }
 
    /* WM maximum threads is number of EUs times number of threads per EU. */
-   if (intel->gen == 5) {
+   if (intel->gen >= 7) {
+      if (IS_IVB_GT1(intel->intelScreen->deviceID)) {
+	 brw->wm_max_threads = 86;
+	 brw->vs_max_threads = 36;
+	 brw->urb.size = 128;
+	 brw->urb.max_vs_entries = 512;
+	 brw->urb.max_gs_entries = 192;
+      } else if (IS_IVB_GT2(intel->intelScreen->deviceID)) {
+	 brw->wm_max_threads = 86;
+	 brw->vs_max_threads = 128;
+	 brw->urb.size = 256;
+	 brw->urb.max_vs_entries = 704;
+	 brw->urb.max_gs_entries = 320;
+      } else {
+	 assert(!"Unknown gen7 device.");
+      }
+   } else if (intel->gen == 6) {
+      if (IS_SNB_GT2(intel->intelScreen->deviceID)) {
+	 /* This could possibly be 80, but is supposed to require
+	  * disabling of WIZ hashing (bit 6 of GT_MODE, 0x20d0) and a
+	  * GPU reset to change.
+	  */
+	 brw->wm_max_threads = 40;
+	 brw->vs_max_threads = 60;
+	 brw->urb.size = 64;            /* volume 5c.5 section 5.1 */
+	 brw->urb.max_vs_entries = 128; /* volume 2a (see 3DSTATE_URB) */
+      } else {
+	 brw->wm_max_threads = 40;
+	 brw->vs_max_threads = 24;
+	 brw->urb.size = 32;            /* volume 5c.5 section 5.1 */
+	 brw->urb.max_vs_entries = 256; /* volume 2a (see 3DSTATE_URB) */
+      }
+   } else if (intel->gen == 5) {
       brw->urb.size = 1024;
       brw->vs_max_threads = 72;
       brw->wm_max_threads = 12 * 6;