X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=src%2Fmesa%2Fdrivers%2Fdri%2Fi965%2Fbrw_device_info.c;h=be517e826c4f8623bac390bc2269c3536ee4c301;hb=8a688bee83ced46eb4bff741f05d2da033c07ade;hp=c4350b4efccd25173f93bd1ee5b8cfdff01d882e;hpb=970dc2360372a7859691d690bd2f1976c3c97fb0;p=mesa.git diff --git a/src/mesa/drivers/dri/i965/brw_device_info.c b/src/mesa/drivers/dri/i965/brw_device_info.c index c4350b4efcc..be517e826c4 100644 --- a/src/mesa/drivers/dri/i965/brw_device_info.c +++ b/src/mesa/drivers/dri/i965/brw_device_info.c @@ -117,6 +117,7 @@ static const struct brw_device_info brw_device_info_ivb_gt1 = { .max_ds_threads = 36, .max_gs_threads = 36, .max_wm_threads = 48, + .max_cs_threads = 36, .urb = { .size = 128, .min_vs_entries = 32, @@ -135,6 +136,7 @@ static const struct brw_device_info brw_device_info_ivb_gt2 = { .max_ds_threads = 128, .max_gs_threads = 128, .max_wm_threads = 172, + .max_cs_threads = 64, .urb = { .size = 256, .min_vs_entries = 32, @@ -154,6 +156,7 @@ static const struct brw_device_info brw_device_info_byt = { .max_ds_threads = 36, .max_gs_threads = 36, .max_wm_threads = 48, + .max_cs_threads = 32, .urb = { .size = 128, .min_vs_entries = 32, @@ -164,13 +167,20 @@ static const struct brw_device_info brw_device_info_byt = { }, }; +#define HSW_FEATURES \ + GEN7_FEATURES, \ + .is_haswell = true, \ + .supports_simd16_3src = true, \ + .has_resource_streamer = true + static const struct brw_device_info brw_device_info_hsw_gt1 = { - GEN7_FEATURES, .is_haswell = true, .gt = 1, + HSW_FEATURES, .gt = 1, .max_vs_threads = 70, .max_hs_threads = 70, .max_ds_threads = 70, .max_gs_threads = 70, .max_wm_threads = 102, + .max_cs_threads = 70, .urb = { .size = 128, .min_vs_entries = 32, @@ -182,12 +192,13 @@ static const struct brw_device_info brw_device_info_hsw_gt1 = { }; static const struct brw_device_info brw_device_info_hsw_gt2 = { - GEN7_FEATURES, .is_haswell = true, .gt = 2, + HSW_FEATURES, .gt = 2, .max_vs_threads = 280, .max_hs_threads = 256, .max_ds_threads = 280, .max_gs_threads = 256, .max_wm_threads = 204, + .max_cs_threads = 70, .urb = { .size = 256, .min_vs_entries = 64, @@ -199,12 +210,13 @@ static const struct brw_device_info brw_device_info_hsw_gt2 = { }; static const struct brw_device_info brw_device_info_hsw_gt3 = { - GEN7_FEATURES, .is_haswell = true, .gt = 3, + HSW_FEATURES, .gt = 3, .max_vs_threads = 280, .max_hs_threads = 256, .max_ds_threads = 280, .max_gs_threads = 256, .max_wm_threads = 408, + .max_cs_threads = 70, .urb = { .size = 512, .min_vs_entries = 64, @@ -218,17 +230,20 @@ static const struct brw_device_info brw_device_info_hsw_gt3 = { #define GEN8_FEATURES \ .gen = 8, \ .has_hiz_and_separate_stencil = true, \ + .has_resource_streamer = true, \ .must_use_separate_stencil = true, \ .has_llc = true, \ .has_pln = true, \ + .supports_simd16_3src = true, \ .max_vs_threads = 504, \ .max_hs_threads = 504, \ .max_ds_threads = 504, \ .max_gs_threads = 504, \ - .max_wm_threads = 384 \ + .max_wm_threads = 384 static const struct brw_device_info brw_device_info_bdw_gt1 = { GEN8_FEATURES, .gt = 1, + .max_cs_threads = 42, .urb = { .size = 192, .min_vs_entries = 64, @@ -241,6 +256,7 @@ static const struct brw_device_info brw_device_info_bdw_gt1 = { static const struct brw_device_info brw_device_info_bdw_gt2 = { GEN8_FEATURES, .gt = 2, + .max_cs_threads = 56, .urb = { .size = 384, .min_vs_entries = 64, @@ -253,6 +269,7 @@ static const struct brw_device_info brw_device_info_bdw_gt2 = { static const struct brw_device_info brw_device_info_bdw_gt3 = { GEN8_FEATURES, .gt = 3, + .max_cs_threads = 56, .urb = { .size = 384, .min_vs_entries = 64, @@ -263,9 +280,6 @@ static const struct brw_device_info brw_device_info_bdw_gt3 = { } }; -/* Thread counts and URB limits are placeholders, and may not be accurate. - * These were copied from Haswell GT1, above. - */ static const struct brw_device_info brw_device_info_chv = { GEN8_FEATURES, .is_cherryview = 1, .gt = 1, .has_llc = false, @@ -274,6 +288,7 @@ static const struct brw_device_info brw_device_info_chv = { .max_ds_threads = 80, .max_gs_threads = 80, .max_wm_threads = 128, + .max_cs_threads = 28, .urb = { .size = 192, .min_vs_entries = 34, @@ -284,44 +299,87 @@ static const struct brw_device_info brw_device_info_chv = { } }; -/* Thread counts and URB limits are placeholders, and may not be accurate. */ #define GEN9_FEATURES \ .gen = 9, \ .has_hiz_and_separate_stencil = true, \ + .has_resource_streamer = true, \ .must_use_separate_stencil = true, \ .has_llc = true, \ .has_pln = true, \ - .max_vs_threads = 280, \ - .max_gs_threads = 256, \ - .max_wm_threads = 408, \ + .supports_simd16_3src = true, \ + .max_vs_threads = 336, \ + .max_gs_threads = 336, \ + .max_hs_threads = 336, \ + .max_ds_threads = 336, \ + .max_wm_threads = 64 * 6, \ + .max_cs_threads = 56, \ .urb = { \ - .size = 128, \ + .size = 192, \ .min_vs_entries = 64, \ - .max_vs_entries = 1664, \ + .max_vs_entries = 1856, \ + .max_hs_entries = 672, \ + .max_ds_entries = 1120, \ .max_gs_entries = 640, \ } +static const struct brw_device_info brw_device_info_skl_early = { + GEN9_FEATURES, .gt = 1, + .supports_simd16_3src = false, +}; + static const struct brw_device_info brw_device_info_skl_gt1 = { - GEN9_FEATURES, .gt = 1 + GEN9_FEATURES, .gt = 1, }; static const struct brw_device_info brw_device_info_skl_gt2 = { - GEN9_FEATURES, .gt = 2 + GEN9_FEATURES, .gt = 2, }; static const struct brw_device_info brw_device_info_skl_gt3 = { - GEN9_FEATURES, .gt = 3 + GEN9_FEATURES, .gt = 3, +}; + +static const struct brw_device_info brw_device_info_bxt = { + GEN9_FEATURES, + .is_broxton = 1, + .gt = 1, + .has_llc = false, + + /* XXX: These are preliminary thread counts and URB sizes. */ + .max_vs_threads = 56, + .max_hs_threads = 56, + .max_ds_threads = 56, + .max_gs_threads = 56, + .max_wm_threads = 32, + .max_cs_threads = 28, + .urb = { + .size = 64, + .min_vs_entries = 34, + .max_vs_entries = 640, + .max_hs_entries = 80, + .max_ds_entries = 80, + .max_gs_entries = 256, + } }; const struct brw_device_info * -brw_get_device_info(int devid) +brw_get_device_info(int devid, int revision) { + const struct brw_device_info *devinfo; switch (devid) { #undef CHIPSET -#define CHIPSET(id, family, name) case id: return &brw_device_info_##family; +#define CHIPSET(id, family, name) \ + case id: devinfo = &brw_device_info_##family; break; #include "pci_ids/i965_pci_ids.h" default: fprintf(stderr, "i965_dri.so does not support the 0x%x PCI ID.\n", devid); return NULL; } + + if (devinfo->gen == 9 && + !devinfo->is_broxton && + (revision == 2 || revision == 3 || revision == -1)) + return &brw_device_info_skl_early; + + return devinfo; }