X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=src%2Fmesa%2Fdrivers%2Fdri%2Fi965%2Fbrw_eu.h;h=718b3800423c27710d5fb1667faab3686814066a;hb=4847f802c28e595130bda14055cd52c9b1f51cd7;hp=8e9117b6440b8770676968cb71384463097597e2;hpb=b13e305ee1a2454265fd957a99640a2e49507bea;p=mesa.git diff --git a/src/mesa/drivers/dri/i965/brw_eu.h b/src/mesa/drivers/dri/i965/brw_eu.h index 8e9117b6440..718b3800423 100644 --- a/src/mesa/drivers/dri/i965/brw_eu.h +++ b/src/mesa/drivers/dri/i965/brw_eu.h @@ -33,9 +33,10 @@ #ifndef BRW_EU_H #define BRW_EU_H +#include #include "brw_structs.h" #include "brw_defines.h" -#include "shader/prog_instruction.h" +#include "program/prog_instruction.h" #define BRW_SWIZZLE4(a,b,c,d) (((a)<<0) | ((b)<<2) | ((c)<<4) | ((d)<<6)) #define BRW_GET_SWZ(swz, idx) (((swz) >> ((idx)*2)) & 0x3) @@ -106,10 +107,12 @@ struct brw_compile { /* Allow clients to push/pop instruction state: */ struct brw_instruction stack[BRW_EU_MAX_INSN_STACK]; + bool compressed_stack[BRW_EU_MAX_INSN_STACK]; struct brw_instruction *current; GLuint flag_value; GLboolean single_program_flow; + bool compressed; struct brw_context *brw; struct brw_glsl_label *first_label; /**< linked list of labels */ @@ -520,6 +523,20 @@ static INLINE struct brw_reg brw_acc_reg( void ) 0); } +static INLINE struct brw_reg brw_notification_1_reg(void) +{ + + return brw_reg(BRW_ARCHITECTURE_REGISTER_FILE, + BRW_ARF_NOTIFICATION_COUNT, + 1, + BRW_REGISTER_TYPE_UD, + BRW_VERTICAL_STRIDE_0, + BRW_WIDTH_1, + BRW_HORIZONTAL_STRIDE_0, + BRW_SWIZZLE_XXXX, + WRITEMASK_X); +} + static INLINE struct brw_reg brw_flag_reg( void ) { @@ -619,6 +636,8 @@ static INLINE struct brw_reg brw_swizzle( struct brw_reg reg, GLuint z, GLuint w) { + assert(reg.file != BRW_IMMEDIATE_VALUE); + reg.dw1.bits.swizzle = BRW_SWIZZLE4(BRW_GET_SWZ(reg.dw1.bits.swizzle, x), BRW_GET_SWZ(reg.dw1.bits.swizzle, y), BRW_GET_SWZ(reg.dw1.bits.swizzle, z), @@ -636,6 +655,7 @@ static INLINE struct brw_reg brw_swizzle1( struct brw_reg reg, static INLINE struct brw_reg brw_writemask( struct brw_reg reg, GLuint mask ) { + assert(reg.file != BRW_IMMEDIATE_VALUE); reg.dw1.bits.writemask &= mask; return reg; } @@ -643,6 +663,7 @@ static INLINE struct brw_reg brw_writemask( struct brw_reg reg, static INLINE struct brw_reg brw_set_writemask( struct brw_reg reg, GLuint mask ) { + assert(reg.file != BRW_IMMEDIATE_VALUE); reg.dw1.bits.writemask = mask; return reg; } @@ -751,7 +772,9 @@ void brw_set_access_mode( struct brw_compile *p, GLuint access_mode ); void brw_set_compression_control( struct brw_compile *p, GLboolean control ); void brw_set_predicate_control_flag_value( struct brw_compile *p, GLuint value ); void brw_set_predicate_control( struct brw_compile *p, GLuint pc ); +void brw_set_predicate_inverse(struct brw_compile *p, bool predicate_inverse); void brw_set_conditionalmod( struct brw_compile *p, GLuint conditional ); +void brw_set_acc_write_control(struct brw_compile *p, GLuint value); void brw_init_compile( struct brw_context *, struct brw_compile *p ); const GLuint *brw_get_program( struct brw_compile *p, GLuint *sz ); @@ -770,6 +793,10 @@ struct brw_instruction *brw_##OP(struct brw_compile *p, \ struct brw_reg src0, \ struct brw_reg src1); +#define ROUND(OP) \ +void brw_##OP(struct brw_compile *p, struct brw_reg dest, struct brw_reg src0); + + ALU1(MOV) ALU2(SEL) ALU1(NOT) @@ -786,7 +813,6 @@ ALU2(ADD) ALU2(MUL) ALU1(FRC) ALU1(RNDD) -ALU1(RNDZ) ALU2(MAC) ALU2(MACH) ALU1(LZD) @@ -797,9 +823,12 @@ ALU2(DP2) ALU2(LINE) ALU2(PLN) +ROUND(RNDZ) +ROUND(RNDE) + #undef ALU1 #undef ALU2 - +#undef ROUND /* Helpers for SEND instruction: @@ -822,22 +851,19 @@ void brw_ff_sync(struct brw_compile *p, GLuint msg_reg_nr, struct brw_reg src0, GLboolean allocate, - GLboolean used, - GLuint msg_length, GLuint response_length, - GLboolean eot, - GLboolean writes_complete, - GLuint offset, - GLuint swizzle); + GLboolean eot); void brw_fb_WRITE(struct brw_compile *p, + int dispatch_width, struct brw_reg dest, GLuint msg_reg_nr, struct brw_reg src0, GLuint binding_table_index, GLuint msg_length, GLuint response_length, - GLboolean eot); + GLboolean eot, + GLboolean header_present); void brw_SAMPLE(struct brw_compile *p, struct brw_reg dest, @@ -870,33 +896,52 @@ void brw_math( struct brw_compile *p, GLuint data_type, GLuint precision ); -void brw_dp_READ_16( struct brw_compile *p, - struct brw_reg dest, - GLuint scratch_offset ); - -void brw_dp_READ_4( struct brw_compile *p, - struct brw_reg dest, - GLboolean relAddr, - GLuint location, - GLuint bind_table_index ); +void brw_math2(struct brw_compile *p, + struct brw_reg dest, + GLuint function, + struct brw_reg src0, + struct brw_reg src1); + +void brw_oword_block_read(struct brw_compile *p, + struct brw_reg dest, + struct brw_reg mrf, + uint32_t offset, + uint32_t bind_table_index); + +void brw_oword_block_read_scratch(struct brw_compile *p, + struct brw_reg dest, + struct brw_reg mrf, + int num_regs, + GLuint offset); + +void brw_oword_block_write_scratch(struct brw_compile *p, + struct brw_reg mrf, + int num_regs, + GLuint offset); + +void brw_dword_scattered_read(struct brw_compile *p, + struct brw_reg dest, + struct brw_reg mrf, + uint32_t bind_table_index); void brw_dp_READ_4_vs( struct brw_compile *p, struct brw_reg dest, - GLuint oword, - GLboolean relAddr, - struct brw_reg addrReg, GLuint location, GLuint bind_table_index ); -void brw_dp_WRITE_16( struct brw_compile *p, - struct brw_reg src, - GLuint scratch_offset ); +void brw_dp_READ_4_vs_relative(struct brw_compile *p, + struct brw_reg dest, + struct brw_reg addrReg, + GLuint offset, + GLuint bind_table_index); /* If/else/endif. Works by manipulating the execution flags on each * channel. */ struct brw_instruction *brw_IF(struct brw_compile *p, GLuint execute_size); +struct brw_instruction *gen6_IF(struct brw_compile *p, uint32_t conditional, + struct brw_reg src0, struct brw_reg src1); struct brw_instruction *brw_ELSE(struct brw_compile *p, struct brw_instruction *if_insn); @@ -913,8 +958,10 @@ struct brw_instruction *brw_DO(struct brw_compile *p, struct brw_instruction *brw_WHILE(struct brw_compile *p, struct brw_instruction *patch_insn); -struct brw_instruction *brw_BREAK(struct brw_compile *p); -struct brw_instruction *brw_CONT(struct brw_compile *p); +struct brw_instruction *brw_BREAK(struct brw_compile *p, int pop_count); +struct brw_instruction *brw_CONT(struct brw_compile *p, int pop_count); +struct brw_instruction *gen6_CONT(struct brw_compile *p, + struct brw_instruction *do_insn); /* Forward jumps: */ void brw_land_fwd_jump(struct brw_compile *p, @@ -924,6 +971,8 @@ void brw_land_fwd_jump(struct brw_compile *p, void brw_NOP(struct brw_compile *p); +void brw_WAIT(struct brw_compile *p); + /* Special case: there is never a destination, execution size will be * taken from src0: */ @@ -966,4 +1015,14 @@ void brw_math_invert( struct brw_compile *p, void brw_set_src1( struct brw_instruction *insn, struct brw_reg reg ); + +void brw_set_uip_jip(struct brw_compile *p); + +uint32_t brw_swap_cmod(uint32_t cmod); + +/* brw_optimize.c */ +void brw_optimize(struct brw_compile *p); +void brw_remove_duplicate_mrf_moves(struct brw_compile *p); +void brw_remove_grf_to_mrf_moves(struct brw_compile *p); + #endif