X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=src%2Fmesa%2Fdrivers%2Fdri%2Fi965%2Fbrw_inst.h;h=d98bbf538a82ffd0bf2f9ecc5a19d8f32928f288;hb=be095e11e41158f91bcb3f6fcbc2e2a91a5d9124;hp=7a8c210118cd3066dc8fe4fdfe97729882478785;hpb=6ee082718fca884fbda73001e0ecb32095409549;p=mesa.git diff --git a/src/mesa/drivers/dri/i965/brw_inst.h b/src/mesa/drivers/dri/i965/brw_inst.h index 7a8c210118c..d98bbf538a8 100644 --- a/src/mesa/drivers/dri/i965/brw_inst.h +++ b/src/mesa/drivers/dri/i965/brw_inst.h @@ -52,7 +52,7 @@ static inline void brw_inst_set_bits(brw_inst *inst, #define FC(name, high, low, assertions) \ static inline void \ -brw_inst_set_##name(const struct brw_device_info *devinfo, \ +brw_inst_set_##name(const struct gen_device_info *devinfo, \ brw_inst *inst, uint64_t v) \ { \ assert(assertions); \ @@ -60,7 +60,7 @@ brw_inst_set_##name(const struct brw_device_info *devinfo, \ brw_inst_set_bits(inst, high, low, v); \ } \ static inline uint64_t \ -brw_inst_##name(const struct brw_device_info *devinfo, \ +brw_inst_##name(const struct gen_device_info *devinfo, \ const brw_inst *inst) \ { \ assert(assertions); \ @@ -94,14 +94,14 @@ brw_inst_##name(const struct brw_device_info *devinfo, \ */ #define FF(name, hi4, lo4, hi45, lo45, hi5, lo5, hi6, lo6, hi7, lo7, hi8, lo8)\ static inline void \ -brw_inst_set_##name(const struct brw_device_info *devinfo, \ +brw_inst_set_##name(const struct gen_device_info *devinfo, \ brw_inst *inst, uint64_t value) \ { \ BOUNDS(hi4, lo4, hi45, lo45, hi5, lo5, hi6, lo6, hi7, lo7, hi8, lo8) \ brw_inst_set_bits(inst, high, low, value); \ } \ static inline uint64_t \ -brw_inst_##name(const struct brw_device_info *devinfo, const brw_inst *inst) \ +brw_inst_##name(const struct gen_device_info *devinfo, const brw_inst *inst) \ { \ BOUNDS(hi4, lo4, hi45, lo45, hi5, lo5, hi6, lo6, hi7, lo7, hi8, lo8) \ return brw_inst_bits(inst, high, low); \ @@ -172,7 +172,8 @@ F(saturate, 31, 31) F(debug_control, 30, 30) F(cmpt_control, 29, 29) FC(branch_control, 28, 28, devinfo->gen >= 8) -F(acc_wr_control, 28, 28) +FC(acc_wr_control, 28, 28, devinfo->gen >= 6) +FC(mask_control_ex, 28, 28, devinfo->is_g4x || devinfo->gen == 5) F(cond_modifier, 27, 24) FC(math_function, 27, 24, devinfo->gen >= 6) F(exec_size, 23, 21) @@ -247,7 +248,7 @@ F(3src_opcode, 6, 0) * @{ */ static inline void -brw_inst_set_uip(const struct brw_device_info *devinfo, +brw_inst_set_uip(const struct gen_device_info *devinfo, brw_inst *inst, int32_t value) { assert(devinfo->gen >= 6); @@ -262,7 +263,7 @@ brw_inst_set_uip(const struct brw_device_info *devinfo, } static inline int32_t -brw_inst_uip(const struct brw_device_info *devinfo, const brw_inst *inst) +brw_inst_uip(const struct gen_device_info *devinfo, const brw_inst *inst) { assert(devinfo->gen >= 6); @@ -274,7 +275,7 @@ brw_inst_uip(const struct brw_device_info *devinfo, const brw_inst *inst) } static inline void -brw_inst_set_jip(const struct brw_device_info *devinfo, +brw_inst_set_jip(const struct gen_device_info *devinfo, brw_inst *inst, int32_t value) { assert(devinfo->gen >= 6); @@ -289,7 +290,7 @@ brw_inst_set_jip(const struct brw_device_info *devinfo, } static inline int32_t -brw_inst_jip(const struct brw_device_info *devinfo, const brw_inst *inst) +brw_inst_jip(const struct gen_device_info *devinfo, const brw_inst *inst) { assert(devinfo->gen >= 6); @@ -303,14 +304,14 @@ brw_inst_jip(const struct brw_device_info *devinfo, const brw_inst *inst) /** Like FC, but using int16_t to handle negative jump targets. */ #define FJ(name, high, low, assertions) \ static inline void \ -brw_inst_set_##name(const struct brw_device_info *devinfo, brw_inst *inst, int16_t v) \ +brw_inst_set_##name(const struct gen_device_info *devinfo, brw_inst *inst, int16_t v) \ { \ assert(assertions); \ (void) devinfo; \ brw_inst_set_bits(inst, high, low, (uint16_t) v); \ } \ static inline int16_t \ -brw_inst_##name(const struct brw_device_info *devinfo, const brw_inst *inst) \ +brw_inst_##name(const struct gen_device_info *devinfo, const brw_inst *inst) \ { \ assert(assertions); \ (void) devinfo; \ @@ -383,6 +384,7 @@ FF(urb_per_slot_offset, /* 4-6: */ -1, -1, -1, -1, -1, -1, -1, -1, /* 7: */ MD(16), MD(16), /* 8: */ MD(17), MD(17)) +FC(urb_channel_mask_present, MD(15), MD(15), devinfo->gen >= 8) FC(urb_complete, MD(15), MD(15), devinfo->gen < 8) FC(urb_used, MD(14), MD(14), devinfo->gen < 7) FC(urb_allocate, MD(13), MD(13), devinfo->gen < 7) @@ -552,21 +554,21 @@ F(pi_message_data, MD(7), MD(0)) * @{ */ static inline int -brw_inst_imm_d(const struct brw_device_info *devinfo, const brw_inst *insn) +brw_inst_imm_d(const struct gen_device_info *devinfo, const brw_inst *insn) { (void) devinfo; return brw_inst_bits(insn, 127, 96); } static inline unsigned -brw_inst_imm_ud(const struct brw_device_info *devinfo, const brw_inst *insn) +brw_inst_imm_ud(const struct gen_device_info *devinfo, const brw_inst *insn) { (void) devinfo; return brw_inst_bits(insn, 127, 96); } static inline float -brw_inst_imm_f(const struct brw_device_info *devinfo, const brw_inst *insn) +brw_inst_imm_f(const struct gen_device_info *devinfo, const brw_inst *insn) { fi_type ft; (void) devinfo; @@ -574,8 +576,20 @@ brw_inst_imm_f(const struct brw_device_info *devinfo, const brw_inst *insn) return ft.f; } +static inline double +brw_inst_imm_df(const struct gen_device_info *devinfo, const brw_inst *insn) +{ + union { + double d; + uint64_t u; + } dt; + (void) devinfo; + dt.u = brw_inst_bits(insn, 127, 64); + return dt.d; +} + static inline void -brw_inst_set_imm_d(const struct brw_device_info *devinfo, +brw_inst_set_imm_d(const struct gen_device_info *devinfo, brw_inst *insn, int value) { (void) devinfo; @@ -583,7 +597,7 @@ brw_inst_set_imm_d(const struct brw_device_info *devinfo, } static inline void -brw_inst_set_imm_ud(const struct brw_device_info *devinfo, +brw_inst_set_imm_ud(const struct gen_device_info *devinfo, brw_inst *insn, unsigned value) { (void) devinfo; @@ -591,7 +605,7 @@ brw_inst_set_imm_ud(const struct brw_device_info *devinfo, } static inline void -brw_inst_set_imm_f(const struct brw_device_info *devinfo, +brw_inst_set_imm_f(const struct gen_device_info *devinfo, brw_inst *insn, float value) { fi_type ft; @@ -600,12 +614,25 @@ brw_inst_set_imm_f(const struct brw_device_info *devinfo, brw_inst_set_bits(insn, 127, 96, ft.u); } +static inline void +brw_inst_set_imm_df(const struct gen_device_info *devinfo, + brw_inst *insn, double value) +{ + union { + double d; + uint64_t u; + } dt; + (void) devinfo; + dt.d = value; + brw_inst_set_bits(insn, 127, 64, dt.u); +} + /** @} */ /* The AddrImm fields are split into two discontiguous sections on Gen8+ */ #define BRW_IA1_ADDR_IMM(reg, g4_high, g4_low, g8_nine, g8_high, g8_low) \ static inline void \ -brw_inst_set_##reg##_ia1_addr_imm(const struct brw_device_info *devinfo, \ +brw_inst_set_##reg##_ia1_addr_imm(const struct gen_device_info *devinfo, \ brw_inst *inst, \ unsigned value) \ { \ @@ -618,7 +645,7 @@ brw_inst_set_##reg##_ia1_addr_imm(const struct brw_device_info *devinfo, \ } \ } \ static inline unsigned \ -brw_inst_##reg##_ia1_addr_imm(const struct brw_device_info *devinfo, \ +brw_inst_##reg##_ia1_addr_imm(const struct gen_device_info *devinfo, \ const brw_inst *inst) \ { \ if (devinfo->gen >= 8) { \ @@ -637,7 +664,7 @@ BRW_IA1_ADDR_IMM(dst, 57, 48, 47, 56, 48) #define BRW_IA16_ADDR_IMM(reg, g4_high, g4_low, g8_nine, g8_high, g8_low) \ static inline void \ -brw_inst_set_##reg##_ia16_addr_imm(const struct brw_device_info *devinfo, \ +brw_inst_set_##reg##_ia16_addr_imm(const struct gen_device_info *devinfo, \ brw_inst *inst, unsigned value) \ { \ assert((value & ~0x3ff) == 0); \ @@ -649,7 +676,7 @@ brw_inst_set_##reg##_ia16_addr_imm(const struct brw_device_info *devinfo, \ } \ } \ static inline unsigned \ -brw_inst_##reg##_ia16_addr_imm(const struct brw_device_info *devinfo, \ +brw_inst_##reg##_ia16_addr_imm(const struct gen_device_info *devinfo, \ const brw_inst *inst) \ { \ if (devinfo->gen >= 8) { \ @@ -683,9 +710,9 @@ brw_inst_bits(const brw_inst *inst, unsigned high, unsigned low) high %= 64; low %= 64; - const uint64_t mask = (((1ull << (high - low + 1)) - 1) << low); + const uint64_t mask = (~0ull >> (64 - (high - low + 1))); - return (inst->data[word] & mask) >> low; + return (inst->data[word] >> low) & mask; } /** @@ -702,12 +729,12 @@ brw_inst_set_bits(brw_inst *inst, unsigned high, unsigned low, uint64_t value) high %= 64; low %= 64; - const uint64_t mask = (((1ull << (high - low + 1)) - 1) << low); + const uint64_t mask = (~0ull >> (64 - (high - low + 1))) << low; /* Make sure the supplied value actually fits in the given bitfield. */ assert((value & (mask >> low)) == value); - inst->data[word] = (inst->data[word] & ~mask) | ((value << low) & mask); + inst->data[word] = (inst->data[word] & ~mask) | (value << low); } #undef BRW_IA16_ADDR_IMM @@ -729,11 +756,11 @@ typedef struct { * Bits indices range from 0..63. */ static inline unsigned -brw_compact_inst_bits(brw_compact_inst *inst, unsigned high, unsigned low) +brw_compact_inst_bits(const brw_compact_inst *inst, unsigned high, unsigned low) { - const uint64_t mask = (((1ull << (high - low + 1)) - 1) << low); + const uint64_t mask = (1ull << (high - low + 1)) - 1; - return (inst->data & mask) >> low; + return (inst->data >> low) & mask; } /** @@ -745,64 +772,73 @@ static inline void brw_compact_inst_set_bits(brw_compact_inst *inst, unsigned high, unsigned low, uint64_t value) { - const uint64_t mask = (((1ull << (high - low + 1)) - 1) << low); + const uint64_t mask = ((1ull << (high - low + 1)) - 1) << low; /* Make sure the supplied value actually fits in the given bitfield. */ assert((value & (mask >> low)) == value); - inst->data = (inst->data & ~mask) | ((value << low) & mask); + inst->data = (inst->data & ~mask) | (value << low); } -#define F(name, high, low) \ -static inline void \ -brw_compact_inst_set_##name(brw_compact_inst *inst, unsigned v) \ -{ \ - brw_compact_inst_set_bits(inst, high, low, v); \ -} \ - \ -static inline unsigned \ -brw_compact_inst_##name(brw_compact_inst *inst) \ -{ \ - return brw_compact_inst_bits(inst, high, low); \ +#define FC(name, high, low, assertions) \ +static inline void \ +brw_compact_inst_set_##name(const struct gen_device_info *devinfo, \ + brw_compact_inst *inst, unsigned v) \ +{ \ + assert(assertions); \ + (void) devinfo; \ + brw_compact_inst_set_bits(inst, high, low, v); \ +} \ +static inline unsigned \ +brw_compact_inst_##name(const struct gen_device_info *devinfo, \ + const brw_compact_inst *inst) \ +{ \ + assert(assertions); \ + (void) devinfo; \ + return brw_compact_inst_bits(inst, high, low); \ } -F(src1_reg_nr, 63, 56) -F(src0_reg_nr, 55, 48) -F(dst_reg_nr, 47, 40) -F(src1_index, 39, 35) -F(src0_index, 34, 30) -F(cmpt_control, 29, 29) /* Same location as brw_inst */ -F(flag_subreg_nr, 28, 28) /* <= Gen6 only */ -F(cond_modifier, 27, 24) /* Same location as brw_inst */ -F(acc_wr_control, 23, 23) -F(subreg_index, 22, 18) -F(datatype_index, 17, 13) -F(control_index, 12, 8) -F(debug_control, 7, 7) -F(opcode, 6, 0) /* Same location as brw_inst */ +/* A simple macro for fields which stay in the same place on all generations. */ +#define F(name, high, low) FC(name, high, low, true) + +F(src1_reg_nr, 63, 56) +F(src0_reg_nr, 55, 48) +F(dst_reg_nr, 47, 40) +F(src1_index, 39, 35) +F(src0_index, 34, 30) +F(cmpt_control, 29, 29) /* Same location as brw_inst */ +FC(flag_subreg_nr, 28, 28, devinfo->gen <= 6) +F(cond_modifier, 27, 24) /* Same location as brw_inst */ +FC(acc_wr_control, 23, 23, devinfo->gen >= 6) +FC(mask_control_ex, 23, 23, devinfo->is_g4x || devinfo->gen == 5) +F(subreg_index, 22, 18) +F(datatype_index, 17, 13) +F(control_index, 12, 8) +F(debug_control, 7, 7) +F(opcode, 6, 0) /* Same location as brw_inst */ /** * (Gen8+) Compacted three-source instructions: * @{ */ -F(3src_src2_reg_nr, 63, 57) -F(3src_src1_reg_nr, 56, 50) -F(3src_src0_reg_nr, 49, 43) -F(3src_src2_subreg_nr, 42, 40) -F(3src_src1_subreg_nr, 39, 37) -F(3src_src0_subreg_nr, 36, 34) -F(3src_src2_rep_ctrl, 33, 33) -F(3src_src1_rep_ctrl, 32, 32) -F(3src_saturate, 31, 31) -F(3src_debug_control, 30, 30) -F(3src_cmpt_control, 29, 29) -F(3src_src0_rep_ctrl, 28, 28) +FC(3src_src2_reg_nr, 63, 57, devinfo->gen >= 8) +FC(3src_src1_reg_nr, 56, 50, devinfo->gen >= 8) +FC(3src_src0_reg_nr, 49, 43, devinfo->gen >= 8) +FC(3src_src2_subreg_nr, 42, 40, devinfo->gen >= 8) +FC(3src_src1_subreg_nr, 39, 37, devinfo->gen >= 8) +FC(3src_src0_subreg_nr, 36, 34, devinfo->gen >= 8) +FC(3src_src2_rep_ctrl, 33, 33, devinfo->gen >= 8) +FC(3src_src1_rep_ctrl, 32, 32, devinfo->gen >= 8) +FC(3src_saturate, 31, 31, devinfo->gen >= 8) +FC(3src_debug_control, 30, 30, devinfo->gen >= 8) +FC(3src_cmpt_control, 29, 29, devinfo->gen >= 8) +FC(3src_src0_rep_ctrl, 28, 28, devinfo->gen >= 8) /* Reserved */ -F(3src_dst_reg_nr, 18, 12) -F(3src_source_index, 11, 10) -F(3src_control_index, 9, 8) +FC(3src_dst_reg_nr, 18, 12, devinfo->gen >= 8) +FC(3src_source_index, 11, 10, devinfo->gen >= 8) +FC(3src_control_index, 9, 8, devinfo->gen >= 8) /* Bit 7 is Reserved (for future Opcode expansion) */ -F(3src_opcode, 6, 0) +FC(3src_opcode, 6, 0, devinfo->gen >= 8) /** @} */ #undef F