X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=src%2Fmesa%2Fdrivers%2Fdri%2Fi965%2Fbrw_shader.cpp;h=951e6b250de95ed246a1a56d6cfade663183856c;hb=8ce2afe776eee8444d7dd00b3e93ab2ed399903d;hp=fa8cf88d33e117429fa3e9c0d1017a5686779daa;hpb=44997fc0c1cc7f24216e3b1c5d954919df946ee5;p=mesa.git diff --git a/src/mesa/drivers/dri/i965/brw_shader.cpp b/src/mesa/drivers/dri/i965/brw_shader.cpp index fa8cf88d33e..951e6b250de 100644 --- a/src/mesa/drivers/dri/i965/brw_shader.cpp +++ b/src/mesa/drivers/dri/i965/brw_shader.cpp @@ -27,25 +27,8 @@ #include "brw_fs.h" #include "brw_nir.h" #include "brw_vec4_tes.h" -#include "main/shaderobj.h" #include "main/uniforms.h" -extern "C" struct gl_shader * -brw_new_shader(struct gl_context *ctx, GLuint name, GLuint type) -{ - struct brw_shader *shader; - - shader = rzalloc(NULL, struct brw_shader); - if (shader) { - shader->base.Type = type; - shader->base.Stage = _mesa_shader_enum_to_shader_stage(type); - shader->base.Name = name; - _mesa_init_shader(ctx, &shader->base); - } - - return &shader->base; -} - extern "C" void brw_mark_surface_used(struct brw_stage_prog_data *prog_data, unsigned surf_index) @@ -164,7 +147,7 @@ brw_texture_offset(int *offsets, unsigned num_components) } const char * -brw_instruction_name(const struct brw_device_info *devinfo, enum opcode op) +brw_instruction_name(const struct gen_device_info *devinfo, enum opcode op) { switch (op) { case BRW_OPCODE_ILLEGAL ... BRW_OPCODE_NOP: @@ -180,10 +163,12 @@ brw_instruction_name(const struct brw_device_info *devinfo, enum opcode op) return "fb_write"; case FS_OPCODE_FB_WRITE_LOGICAL: return "fb_write_logical"; - case FS_OPCODE_PACK_STENCIL_REF: - return "pack_stencil_ref"; case FS_OPCODE_REP_FB_WRITE: return "rep_fb_write"; + case FS_OPCODE_FB_READ: + return "fb_read"; + case FS_OPCODE_FB_READ_LOGICAL: + return "fb_read_logical"; case SHADER_OPCODE_RCP: return "rcp"; @@ -264,6 +249,8 @@ brw_instruction_name(const struct brw_device_info *devinfo, enum opcode op) return "tg4_offset_logical"; case SHADER_OPCODE_SAMPLEINFO: return "sampleinfo"; + case SHADER_OPCODE_SAMPLEINFO_LOGICAL: + return "sampleinfo_logical"; case SHADER_OPCODE_SHADER_TIME_ADD: return "shader_time_add"; @@ -324,10 +311,6 @@ brw_instruction_name(const struct brw_device_info *devinfo, enum opcode op) case SHADER_OPCODE_BROADCAST: return "broadcast"; - case SHADER_OPCODE_EXTRACT_BYTE: - return "extract_byte"; - case SHADER_OPCODE_EXTRACT_WORD: - return "extract_word"; case VEC4_OPCODE_MOV_BYTES: return "mov_bytes"; case VEC4_OPCODE_PACK_BYTES: @@ -361,10 +344,12 @@ brw_instruction_name(const struct brw_device_info *devinfo, enum opcode op) return "uniform_pull_const"; case FS_OPCODE_UNIFORM_PULL_CONSTANT_LOAD_GEN7: return "uniform_pull_const_gen7"; - case FS_OPCODE_VARYING_PULL_CONSTANT_LOAD: - return "varying_pull_const"; + case FS_OPCODE_VARYING_PULL_CONSTANT_LOAD_GEN4: + return "varying_pull_const_gen4"; case FS_OPCODE_VARYING_PULL_CONSTANT_LOAD_GEN7: return "varying_pull_const_gen7"; + case FS_OPCODE_VARYING_PULL_CONSTANT_LOAD_LOGICAL: + return "varying_pull_const_logical"; case FS_OPCODE_MOV_DISPATCH_TO_FLAGS: return "mov_dispatch_to_flags"; @@ -386,8 +371,6 @@ brw_instruction_name(const struct brw_device_info *devinfo, enum opcode op) case FS_OPCODE_PLACEHOLDER_HALT: return "placeholder_halt"; - case FS_OPCODE_INTERPOLATE_AT_CENTROID: - return "interp_centroid"; case FS_OPCODE_INTERPOLATE_AT_SAMPLE: return "interp_sample"; case FS_OPCODE_INTERPOLATE_AT_SHARED_OFFSET: @@ -689,7 +672,7 @@ backend_shader::backend_shader(const struct brw_compiler *compiler, bool backend_reg::equals(const backend_reg &r) const { - return brw_regs_equal(this, &r) && reg_offset == r.reg_offset; + return brw_regs_equal(this, &r) && offset == r.offset; } bool @@ -761,15 +744,6 @@ backend_reg::is_accumulator() const return file == ARF && nr == BRW_ARF_ACCUMULATOR; } -bool -backend_reg::in_range(const backend_reg &r, unsigned n) const -{ - return (file == r.file && - nr == r.nr && - reg_offset >= r.reg_offset && - reg_offset < r.reg_offset + n); -} - bool backend_instruction::is_commutative() const { @@ -794,7 +768,7 @@ backend_instruction::is_commutative() const } bool -backend_instruction::is_3src(const struct brw_device_info *devinfo) const +backend_instruction::is_3src(const struct gen_device_info *devinfo) const { return ::is_3src(devinfo, opcode); } @@ -976,7 +950,7 @@ backend_instruction::reads_accumulator_implicitly() const } bool -backend_instruction::writes_accumulator_implicitly(const struct brw_device_info *devinfo) const +backend_instruction::writes_accumulator_implicitly(const struct gen_device_info *devinfo) const { return writes_accumulator || (devinfo->gen < 6 && @@ -1004,6 +978,7 @@ backend_instruction::has_side_effects() const case SHADER_OPCODE_URB_WRITE_SIMD8_MASKED: case SHADER_OPCODE_URB_WRITE_SIMD8_MASKED_PER_SLOT: case FS_OPCODE_FB_WRITE: + case FS_OPCODE_FB_WRITE_LOGICAL: case SHADER_OPCODE_BARRIER: case TCS_OPCODE_URB_WRITE: case TCS_OPCODE_RELEASE_INPUT: @@ -1168,16 +1143,16 @@ backend_shader::calculate_cfg() * unused but also make sure that addition of small offsets to them will * trigger some of our asserts that surface indices are < BRW_MAX_SURFACES. */ -void +uint32_t brw_assign_common_binding_table_offsets(gl_shader_stage stage, - const struct brw_device_info *devinfo, + const struct gen_device_info *devinfo, const struct gl_shader_program *shader_prog, const struct gl_program *prog, struct brw_stage_prog_data *stage_prog_data, uint32_t next_binding_table_offset) { - const struct gl_shader *shader = NULL; - int num_textures = _mesa_fls(prog->SamplersUsed); + const struct gl_linked_shader *shader = NULL; + int num_textures = util_last_bit(prog->SamplersUsed); if (shader_prog) shader = shader_prog->_LinkedShaders[stage]; @@ -1244,9 +1219,10 @@ brw_assign_common_binding_table_offsets(gl_shader_stage stage, stage_prog_data->binding_table.plane_start[2] = next_binding_table_offset; next_binding_table_offset += num_textures; - assert(next_binding_table_offset <= BRW_MAX_SURFACES); - /* prog_data->base.binding_table.size will be set by brw_mark_surface_used. */ + + assert(next_binding_table_offset <= BRW_MAX_SURFACES); + return next_binding_table_offset; } static void @@ -1337,8 +1313,8 @@ brw_compile_tes(const struct brw_compiler *compiler, unsigned *final_assembly_size, char **error_str) { - const struct brw_device_info *devinfo = compiler->devinfo; - struct gl_shader *shader = + const struct gen_device_info *devinfo = compiler->devinfo; + struct gl_linked_shader *shader = shader_prog->_LinkedShaders[MESA_SHADER_TESS_EVAL]; const bool is_scalar = compiler->scalar_stage[MESA_SHADER_TESS_EVAL];