X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=src%2Fmesa%2Fdrivers%2Fdri%2Fi965%2Fbrw_shader.h;h=5c226ec774fe5428b31626c2d1b32dd9fc24edfb;hb=1eb11e64b3d0a0bc3f75e878f017aac4e826acf2;hp=b80e7405dbcf5f8a71811b819905da1db1a018a5;hpb=28e9601d0e681411b60a7de8be9f401b0df77d29;p=mesa.git diff --git a/src/mesa/drivers/dri/i965/brw_shader.h b/src/mesa/drivers/dri/i965/brw_shader.h index b80e7405dbc..5c226ec774f 100644 --- a/src/mesa/drivers/dri/i965/brw_shader.h +++ b/src/mesa/drivers/dri/i965/brw_shader.h @@ -24,8 +24,10 @@ #include #include "brw_reg.h" #include "brw_defines.h" +#include "brw_context.h" #include "main/compiler.h" #include "glsl/ir.h" +#include "program/prog_parameter.h" #ifdef __cplusplus #include "brw_ir_allocator.h" @@ -36,38 +38,34 @@ #define MAX_SAMPLER_MESSAGE_SIZE 11 #define MAX_VGRF_SIZE 16 -enum PACKED register_file { - BAD_FILE, - GRF, - MRF, - IMM, - HW_REG, /* a struct brw_reg */ - ATTR, - UNIFORM, /* prog_data->params[reg] */ -}; - -struct backend_reg -{ #ifdef __cplusplus +struct backend_reg : private brw_reg +{ + backend_reg() {} + backend_reg(const struct brw_reg ®) : brw_reg(reg) {} + + const brw_reg &as_brw_reg() const + { + assert(file == ARF || file == FIXED_GRF || file == MRF || file == IMM); + assert(reg_offset == 0); + return static_cast(*this); + } + + brw_reg &as_brw_reg() + { + assert(file == ARF || file == FIXED_GRF || file == MRF || file == IMM); + assert(reg_offset == 0); + return static_cast(*this); + } + + bool equals(const backend_reg &r) const; + bool is_zero() const; bool is_one() const; bool is_negative_one() const; bool is_null() const; bool is_accumulator() const; bool in_range(const backend_reg &r, unsigned n) const; -#endif - - enum register_file file; /**< Register file: GRF, MRF, IMM. */ - enum brw_reg_type type; /**< Register type: BRW_REGISTER_TYPE_* */ - - /** - * Register number. - * - * For GRF, it's a virtual register number until register allocation. - * - * For MRF, it's the hardware register. - */ - uint16_t reg; /** * Offset within the virtual register. @@ -80,11 +78,26 @@ struct backend_reg */ uint16_t reg_offset; - struct brw_reg fixed_hw_reg; - - bool negate; - bool abs; + using brw_reg::type; + using brw_reg::file; + using brw_reg::negate; + using brw_reg::abs; + using brw_reg::address_mode; + using brw_reg::subnr; + using brw_reg::nr; + + using brw_reg::swizzle; + using brw_reg::writemask; + using brw_reg::indirect_offset; + using brw_reg::vstride; + using brw_reg::width; + using brw_reg::hstride; + + using brw_reg::f; + using brw_reg::d; + using brw_reg::ud; }; +#endif struct cfg_t; struct bblock_t; @@ -100,7 +113,7 @@ struct backend_instruction : public exec_node { bool can_do_saturate() const; bool can_do_cmod() const; bool reads_accumulator_implicitly() const; - bool writes_accumulator_implicitly(struct brw_context *brw) const; + bool writes_accumulator_implicitly(const struct brw_device_info *devinfo) const; void remove(bblock_t *block); void insert_after(bblock_t *block, backend_instruction *inst); @@ -113,6 +126,12 @@ struct backend_instruction : public exec_node { * optimize these out unless you know what you are doing. */ bool has_side_effects() const; + + /** + * True if the instruction might be affected by side effects of other + * instructions. + */ + bool is_volatile() const; #else struct backend_instruction { struct exec_node link; @@ -140,12 +159,14 @@ struct backend_instruction { bool no_dd_check:1; bool saturate:1; bool shadow_compare:1; - bool header_present:1; /* Chooses which flag subregister (f0.0 or f0.1) is used for conditional * mod and predication. */ unsigned flag_subreg:1; + + /** The number of hardware registers used for a message header. */ + uint8_t header_size; }; #ifdef __cplusplus @@ -157,23 +178,22 @@ enum instruction_scheduler_mode { SCHEDULE_POST, }; -class backend_visitor : public ir_visitor { +struct backend_shader { protected: - backend_visitor(struct brw_context *brw, - struct gl_shader_program *shader_prog, - struct gl_program *prog, - struct brw_stage_prog_data *stage_prog_data, - gl_shader_stage stage); + backend_shader(const struct brw_compiler *compiler, + void *log_data, + void *mem_ctx, + const nir_shader *shader, + struct brw_stage_prog_data *stage_prog_data); public: - struct brw_context * const brw; + const struct brw_compiler *compiler; + void *log_data; /* Passed to compiler->*_log functions */ + const struct brw_device_info * const devinfo; - struct gl_context * const ctx; - struct brw_shader * const shader; - struct gl_shader_program * const shader_prog; - struct gl_program * const prog; + const nir_shader *nir; struct brw_stage_prog_data * const stage_prog_data; /** ralloc context for temporary data used during compile */ @@ -202,13 +222,18 @@ public: void calculate_cfg(); void invalidate_cfg(); - void assign_common_binding_table_offsets(uint32_t next_binding_table_offset); - virtual void invalidate_live_intervals() = 0; }; uint32_t brw_texture_offset(int *offsets, unsigned num_components); +void brw_setup_image_uniform_values(gl_shader_stage stage, + struct brw_stage_prog_data *stage_prog_data, + unsigned param_start_index, + const gl_uniform_storage *storage); + +#else +struct backend_shader; #endif /* __cplusplus */ enum brw_reg_type brw_type_for_base_type(const struct glsl_type *type); @@ -219,10 +244,35 @@ bool brw_saturate_immediate(enum brw_reg_type type, struct brw_reg *reg); bool brw_negate_immediate(enum brw_reg_type type, struct brw_reg *reg); bool brw_abs_immediate(enum brw_reg_type type, struct brw_reg *reg); +bool opt_predicated_break(struct backend_shader *s); + #ifdef __cplusplus extern "C" { #endif +/** + * Scratch data used when compiling a GLSL geometry shader. + */ +struct brw_gs_compile +{ + struct brw_gs_prog_key key; + struct brw_vue_map input_vue_map; + + unsigned control_data_bits_per_vertex; + unsigned control_data_header_size_bits; +}; + +struct brw_compiler * +brw_compiler_create(void *mem_ctx, const struct brw_device_info *devinfo); + +void +brw_assign_common_binding_table_offsets(gl_shader_stage stage, + const struct brw_device_info *devinfo, + const struct gl_shader_program *shader_prog, + const struct gl_program *prog, + struct brw_stage_prog_data *stage_prog_data, + uint32_t next_binding_table_offset); + bool brw_vs_precompile(struct gl_context *ctx, struct gl_shader_program *shader_prog, struct gl_program *prog); @@ -232,6 +282,16 @@ bool brw_gs_precompile(struct gl_context *ctx, bool brw_fs_precompile(struct gl_context *ctx, struct gl_shader_program *shader_prog, struct gl_program *prog); +bool brw_cs_precompile(struct gl_context *ctx, + struct gl_shader_program *shader_prog, + struct gl_program *prog); + +GLboolean brw_link_shader(struct gl_context *ctx, struct gl_shader_program *prog); +struct gl_shader *brw_new_shader(struct gl_context *ctx, GLuint name, GLuint type); + +int type_size_scalar(const struct glsl_type *type); +int type_size_vec4(const struct glsl_type *type); +int type_size_vec4_times_4(const struct glsl_type *type); #ifdef __cplusplus }