X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=src%2Fmesa%2Fdrivers%2Fdri%2Fi965%2Fbrw_state.h;h=1b4745ef75360cffdfb15bbb557abf8954843054;hb=92f01fc5f914fd500497d0c3aed75f3ac8dc054d;hp=1432a6888f7ee318b6e2fc74db4d665c0f210bd5;hpb=d883ec0400cca2bc40ee9da59d7dbd561bbb3913;p=mesa.git diff --git a/src/mesa/drivers/dri/i965/brw_state.h b/src/mesa/drivers/dri/i965/brw_state.h index 1432a6888f7..1b4745ef753 100644 --- a/src/mesa/drivers/dri/i965/brw_state.h +++ b/src/mesa/drivers/dri/i965/brw_state.h @@ -51,23 +51,18 @@ extern const struct brw_tracked_state brw_wm_pull_constants; extern const struct brw_tracked_state brw_cs_pull_constants; extern const struct brw_tracked_state brw_constant_buffer; extern const struct brw_tracked_state brw_curbe_offsets; -extern const struct brw_tracked_state brw_invariant_state; extern const struct brw_tracked_state brw_binding_table_pointers; extern const struct brw_tracked_state brw_depthbuffer; extern const struct brw_tracked_state brw_recalculate_urb_fence; extern const struct brw_tracked_state brw_sf_vp; extern const struct brw_tracked_state brw_cs_texture_surfaces; extern const struct brw_tracked_state brw_vs_ubo_surfaces; -extern const struct brw_tracked_state brw_vs_abo_surfaces; extern const struct brw_tracked_state brw_vs_image_surfaces; extern const struct brw_tracked_state brw_tcs_ubo_surfaces; -extern const struct brw_tracked_state brw_tcs_abo_surfaces; extern const struct brw_tracked_state brw_tcs_image_surfaces; extern const struct brw_tracked_state brw_tes_ubo_surfaces; -extern const struct brw_tracked_state brw_tes_abo_surfaces; extern const struct brw_tracked_state brw_tes_image_surfaces; extern const struct brw_tracked_state brw_gs_ubo_surfaces; -extern const struct brw_tracked_state brw_gs_abo_surfaces; extern const struct brw_tracked_state brw_gs_image_surfaces; extern const struct brw_tracked_state brw_renderbuffer_surfaces; extern const struct brw_tracked_state brw_renderbuffer_read_surfaces; @@ -78,10 +73,8 @@ extern const struct brw_tracked_state brw_tes_binding_table; extern const struct brw_tracked_state brw_tcs_binding_table; extern const struct brw_tracked_state brw_vs_binding_table; extern const struct brw_tracked_state brw_wm_ubo_surfaces; -extern const struct brw_tracked_state brw_wm_abo_surfaces; extern const struct brw_tracked_state brw_wm_image_surfaces; extern const struct brw_tracked_state brw_cs_ubo_surfaces; -extern const struct brw_tracked_state brw_cs_abo_surfaces; extern const struct brw_tracked_state brw_cs_image_surfaces; extern const struct brw_tracked_state brw_psp_urb_cbs; @@ -96,7 +89,6 @@ extern const struct brw_tracked_state gen6_sampler_state; extern const struct brw_tracked_state gen6_sol_surface; extern const struct brw_tracked_state gen6_sf_vp; extern const struct brw_tracked_state gen6_urb; -extern const struct brw_tracked_state gen7_depthbuffer; extern const struct brw_tracked_state gen7_l3_state; extern const struct brw_tracked_state gen7_push_constant_space; extern const struct brw_tracked_state gen7_urb; @@ -122,15 +114,19 @@ void brw_upload_invariant_state(struct brw_context *brw); uint32_t brw_depthbuffer_format(struct brw_context *brw); -uint32_t -brw_convert_depth_value(mesa_format format, float value); - void brw_upload_state_base_address(struct brw_context *brw); /* gen8_depth_state.c */ void gen8_write_pma_stall_bits(struct brw_context *brw, uint32_t pma_stall_bits); +/* brw_disk_cache.c */ +void brw_disk_cache_init(struct intel_screen *screen); +bool brw_disk_cache_upload_program(struct brw_context *brw, + gl_shader_stage stage); +void brw_disk_cache_write_compute_program(struct brw_context *brw); +void brw_disk_cache_write_render_programs(struct brw_context *brw); + /*********************************************************************** * brw_state.c */ @@ -184,18 +180,12 @@ void brw_destroy_caches( struct brw_context *brw ); void brw_print_program_cache(struct brw_context *brw); -/*********************************************************************** - * brw_state_batch.c - */ -#define BRW_BATCH_STRUCT(brw, s) \ - intel_batchbuffer_data(brw, (s), sizeof(*(s)), RENDER_RING) - +/* intel_batchbuffer.c */ +void brw_require_statebuffer_space(struct brw_context *brw, int size); void *brw_state_batch(struct brw_context *brw, int size, int alignment, uint32_t *out_offset); -uint32_t brw_state_batch_size(struct brw_context *brw, uint32_t offset); /* brw_wm_surface_state.c */ -void gen4_init_vtable_surface_functions(struct brw_context *brw); uint32_t brw_get_surface_tiling_bits(uint32_t tiling); uint32_t brw_get_surface_num_multisamples(unsigned num_samples); enum isl_format brw_isl_format_for_mesa_format(mesa_format mesa_format); @@ -216,29 +206,7 @@ void brw_emit_buffer_surface_state(struct brw_context *brw, unsigned surface_format, unsigned buffer_size, unsigned pitch, - bool rw); - -void brw_update_texture_surface(struct gl_context *ctx, - unsigned unit, uint32_t *surf_offset, - bool for_gather, uint32_t plane); - -uint32_t brw_update_renderbuffer_surface(struct brw_context *brw, - struct gl_renderbuffer *rb, - uint32_t flags, unsigned unit, - uint32_t surf_index); - -void brw_update_renderbuffer_surfaces(struct brw_context *brw, - const struct gl_framebuffer *fb, - uint32_t render_target_start, - uint32_t *surf_offset); - -/* gen7_wm_surface_state.c */ -void gen7_check_surface_setup(uint32_t *surf, bool is_render_target); -void gen7_init_vtable_surface_functions(struct brw_context *brw); - -/* gen8_surface_state.c */ - -void gen8_init_vtable_surface_functions(struct brw_context *brw); + unsigned reloc_flags); /* brw_sampler_state.c */ void brw_emit_sampler_state(struct brw_context *brw, @@ -260,16 +228,25 @@ void brw_emit_sampler_state(struct brw_context *brw, bool non_normalized_coordinates, uint32_t border_color_offset); -/* gen6_surface_state.c */ -void gen6_init_vtable_surface_functions(struct brw_context *brw); - -/* brw_vs_surface_state.c */ +/* gen6_constant_state.c */ +void +brw_populate_constant_data(struct brw_context *brw, + const struct gl_program *prog, + const struct brw_stage_state *stage_state, + void *dst, + const uint32_t *param, + unsigned nr_params); void brw_upload_pull_constants(struct brw_context *brw, GLbitfield64 brw_new_constbuf, const struct gl_program *prog, struct brw_stage_state *stage_state, const struct brw_stage_prog_data *prog_data); +void +brw_upload_cs_push_constants(struct brw_context *brw, + const struct gl_program *prog, + const struct brw_cs_prog_data *cs_prog_data, + struct brw_stage_state *stage_state); /* gen7_vs_state.c */ void @@ -352,6 +329,7 @@ void gen75_init_atoms(struct brw_context *brw); void gen8_init_atoms(struct brw_context *brw); void gen9_init_atoms(struct brw_context *brw); void gen10_init_atoms(struct brw_context *brw); +void gen11_init_atoms(struct brw_context *brw); /* Memory Object Control State: * Specifying zero for L3 means "uncached in L3", at least on Haswell @@ -403,6 +381,15 @@ void gen10_init_atoms(struct brw_context *brw); /* TC=LLC/eLLC, LeCC=PTE, LRUM=3, L3CC=WB */ #define CNL_MOCS_PTE (1 << 1) +/* Ice Lake uses same MOCS settings as Cannonlake */ +/* TC=LLC/eLLC, LeCC=WB, LRUM=3, L3CC=WB */ +#define ICL_MOCS_WB (2 << 1) +/* TC=LLC/eLLC, LeCC=PTE, LRUM=3, L3CC=WB */ +#define ICL_MOCS_PTE (1 << 1) + +uint32_t brw_get_bo_mocs(const struct gen_device_info *devinfo, + struct brw_bo *bo); + #ifdef __cplusplus } #endif