X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=src%2Fmesa%2Fdrivers%2Fdri%2Fi965%2Fbrw_vec4.cpp;h=0fac949521058f71695629608360ee644819fe31;hb=65dd4a255a16a0b5cf843ff1d4657fe346caf116;hp=4d893e15dca7077398bf96cf0f6a6e12b5fe47fb;hpb=5df88c2096281f416b2738debac1c4c329e29673;p=mesa.git diff --git a/src/mesa/drivers/dri/i965/brw_vec4.cpp b/src/mesa/drivers/dri/i965/brw_vec4.cpp index 4d893e15dca..0fac9495210 100644 --- a/src/mesa/drivers/dri/i965/brw_vec4.cpp +++ b/src/mesa/drivers/dri/i965/brw_vec4.cpp @@ -22,6 +22,7 @@ */ #include "brw_vec4.h" +#include "brw_fs.h" #include "brw_cfg.h" #include "brw_vs.h" #include "brw_dead_control_flow.h" @@ -112,6 +113,15 @@ src_reg::src_reg(int32_t i) this->fixed_hw_reg.dw1.d = i; } +src_reg::src_reg(uint8_t vf[4]) +{ + init(); + + this->file = IMM; + this->type = BRW_REGISTER_TYPE_VF; + memcpy(&this->fixed_hw_reg.dw1.ud, vf, sizeof(unsigned)); +} + src_reg::src_reg(uint8_t vf0, uint8_t vf1, uint8_t vf2, uint8_t vf3) { init(); @@ -326,6 +336,72 @@ src_reg::equals(const src_reg &r) const sizeof(fixed_hw_reg)) == 0); } +bool +vec4_visitor::opt_vector_float() +{ + bool progress = false; + + int last_reg = -1, last_reg_offset = -1; + enum register_file last_reg_file = BAD_FILE; + + int remaining_channels; + uint8_t imm[4]; + int inst_count; + vec4_instruction *imm_inst[4]; + + foreach_block_and_inst_safe(block, vec4_instruction, inst, cfg) { + if (last_reg != inst->dst.reg || + last_reg_offset != inst->dst.reg_offset || + last_reg_file != inst->dst.file) { + last_reg = inst->dst.reg; + last_reg_offset = inst->dst.reg_offset; + last_reg_file = inst->dst.file; + remaining_channels = WRITEMASK_XYZW; + + inst_count = 0; + } + + if (inst->opcode != BRW_OPCODE_MOV || + inst->dst.writemask == WRITEMASK_XYZW || + inst->src[0].file != IMM) + continue; + + int vf = brw_float_to_vf(inst->src[0].fixed_hw_reg.dw1.f); + if (vf == -1) + continue; + + if ((inst->dst.writemask & WRITEMASK_X) != 0) + imm[0] = vf; + if ((inst->dst.writemask & WRITEMASK_Y) != 0) + imm[1] = vf; + if ((inst->dst.writemask & WRITEMASK_Z) != 0) + imm[2] = vf; + if ((inst->dst.writemask & WRITEMASK_W) != 0) + imm[3] = vf; + + imm_inst[inst_count++] = inst; + + remaining_channels &= ~inst->dst.writemask; + if (remaining_channels == 0) { + vec4_instruction *mov = MOV(inst->dst, imm); + mov->dst.type = BRW_REGISTER_TYPE_F; + mov->dst.writemask = WRITEMASK_XYZW; + inst->insert_after(block, mov); + last_reg = -1; + + for (int i = 0; i < inst_count; i++) { + imm_inst[i]->remove(block); + } + progress = true; + } + } + + if (progress) + invalidate_live_intervals(); + + return progress; +} + /* Replaces unused channels of a swizzle with channels that are used. * * For instance, this pass transforms @@ -562,6 +638,29 @@ vec4_visitor::opt_algebraic() foreach_block_and_inst(block, vec4_instruction, inst, cfg) { switch (inst->opcode) { + case BRW_OPCODE_MOV: + if (inst->src[0].file != IMM) + break; + + if (inst->saturate) { + if (inst->dst.type != inst->src[0].type) + assert(!"unimplemented: saturate mixed types"); + + if (brw_saturate_immediate(inst->dst.type, + &inst->src[0].fixed_hw_reg)) { + inst->saturate = false; + progress = true; + } + } + break; + + case VEC4_OPCODE_UNPACK_UNIFORM: + if (inst->src[0].file != UNIFORM) { + inst->opcode = BRW_OPCODE_MOV; + progress = true; + } + break; + case BRW_OPCODE_ADD: if (inst->src[1].is_zero()) { inst->opcode = BRW_OPCODE_MOV; @@ -1266,7 +1365,7 @@ vec4_visitor::dump_instruction(backend_instruction *be_inst, FILE *file) fprintf(file, "%uU", inst->src[i].fixed_hw_reg.dw1.ud); break; case BRW_REGISTER_TYPE_VF: - fprintf(stderr, "[%-gF, %-gF, %-gF, %-gF]", + fprintf(file, "[%-gF, %-gF, %-gF, %-gF]", brw_vf_to_float((inst->src[i].fixed_hw_reg.dw1.ud >> 0) & 0xff), brw_vf_to_float((inst->src[i].fixed_hw_reg.dw1.ud >> 8) & 0xff), brw_vf_to_float((inst->src[i].fixed_hw_reg.dw1.ud >> 16) & 0xff), @@ -1527,6 +1626,8 @@ vec4_visitor::get_timestamp() src_reg ts = src_reg(brw_reg(BRW_ARCHITECTURE_REGISTER_FILE, BRW_ARF_TIMESTAMP, 0, + 0, + 0, BRW_REGISTER_TYPE_UD, BRW_VERTICAL_STRIDE_0, BRW_WIDTH_4, @@ -1663,7 +1764,7 @@ vec4_visitor::run() const char *stage_name = stage == MESA_SHADER_GEOMETRY ? "gs" : "vs"; -#define OPT(pass, args...) do { \ +#define OPT(pass, args...) ({ \ pass_num++; \ bool this_progress = pass(args); \ \ @@ -1676,7 +1777,8 @@ vec4_visitor::run() } \ \ progress = progress || this_progress; \ - } while (false) + this_progress; \ + }) if (unlikely(INTEL_DEBUG & DEBUG_OPTIMIZER)) { @@ -1689,10 +1791,11 @@ vec4_visitor::run() bool progress; int iteration = 0; + int pass_num = 0; do { progress = false; + pass_num = 0; iteration++; - int pass_num = 0; OPT(opt_reduce_swizzle); OPT(dead_code_eliminate); @@ -1703,6 +1806,14 @@ vec4_visitor::run() OPT(opt_register_coalesce); } while (progress); + pass_num = 0; + + if (OPT(opt_vector_float)) { + OPT(opt_cse); + OPT(opt_copy_propagation, false); + OPT(opt_copy_propagation, true); + OPT(dead_code_eliminate); + } if (failed) return false; @@ -1760,6 +1871,7 @@ brw_vs_emit(struct brw_context *brw, { bool start_busy = false; double start_time = 0; + const unsigned *assembly = NULL; if (unlikely(brw->perf_debug)) { start_busy = (brw->batch.last_bo && @@ -1774,23 +1886,54 @@ brw_vs_emit(struct brw_context *brw, if (unlikely(INTEL_DEBUG & DEBUG_VS)) brw_dump_ir("vertex", prog, &shader->base, &c->vp->program.Base); - vec4_vs_visitor v(brw, c, prog_data, prog, mem_ctx); - if (!v.run()) { - if (prog) { - prog->LinkStatus = false; - ralloc_strcat(&prog->InfoLog, v.fail_msg); + if (prog && brw->gen >= 8 && brw->scalar_vs) { + fs_visitor v(brw, mem_ctx, &c->key, prog_data, prog, &c->vp->program, 8); + if (!v.run_vs()) { + if (prog) { + prog->LinkStatus = false; + ralloc_strcat(&prog->InfoLog, v.fail_msg); + } + + _mesa_problem(NULL, "Failed to compile vertex shader: %s\n", + v.fail_msg); + + return NULL; } - _mesa_problem(NULL, "Failed to compile vertex shader: %s\n", - v.fail_msg); + fs_generator g(brw, mem_ctx, (void *) &c->key, &prog_data->base.base, + &c->vp->program.Base, v.runtime_check_aads_emit, "VS"); + if (INTEL_DEBUG & DEBUG_VS) { + char *name = ralloc_asprintf(mem_ctx, "%s vertex shader %d", + prog->Label ? prog->Label : "unnamed", + prog->Name); + g.enable_debug(name); + } + g.generate_code(v.cfg, 8); + assembly = g.get_assembly(final_assembly_size); - return NULL; + if (assembly) + prog_data->base.simd8 = true; + c->base.last_scratch = v.last_scratch; } - const unsigned *assembly = NULL; - vec4_generator g(brw, prog, &c->vp->program.Base, &prog_data->base, - mem_ctx, INTEL_DEBUG & DEBUG_VS); - assembly = g.generate_assembly(v.cfg, final_assembly_size); + if (!assembly) { + vec4_vs_visitor v(brw, c, prog_data, prog, mem_ctx); + if (!v.run()) { + if (prog) { + prog->LinkStatus = false; + ralloc_strcat(&prog->InfoLog, v.fail_msg); + } + + _mesa_problem(NULL, "Failed to compile vertex shader: %s\n", + v.fail_msg); + + return NULL; + } + + vec4_generator g(brw, prog, &c->vp->program.Base, &prog_data->base, + mem_ctx, INTEL_DEBUG & DEBUG_VS, "vertex", "VS"); + assembly = g.generate_assembly(v.cfg, final_assembly_size); + } if (unlikely(brw->perf_debug) && shader) { if (shader->compiled_once) { @@ -1808,16 +1951,17 @@ brw_vs_emit(struct brw_context *brw, void -brw_vec4_setup_prog_key_for_precompile(struct gl_context *ctx, - struct brw_vec4_prog_key *key, - GLuint id, struct gl_program *prog) +brw_vue_setup_prog_key_for_precompile(struct gl_context *ctx, + struct brw_vue_prog_key *key, + GLuint id, struct gl_program *prog) { + struct brw_context *brw = brw_context(ctx); key->program_string_id = id; - key->clamp_vertex_color = ctx->API == API_OPENGL_COMPAT; + const bool has_shader_channel_select = brw->is_haswell || brw->gen >= 8; unsigned sampler_count = _mesa_fls(prog->SamplersUsed); for (unsigned i = 0; i < sampler_count; i++) { - if (prog->ShadowSamplers & (1 << i)) { + if (!has_shader_channel_select && (prog->ShadowSamplers & (1 << i))) { /* Assume DEPTH_TEXTURE_MODE is the default: X, X, X, 1 */ key->tex.swizzles[i] = MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_X, SWIZZLE_X, SWIZZLE_ONE);