X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=src%2Fmesa%2Fdrivers%2Fdri%2Fi965%2Fgen6_cc.c;h=3bab8f46ae8fbca6d00b06cd09b9982cea878d5f;hb=8a688bee83ced46eb4bff741f05d2da033c07ade;hp=cac32e5a053bddebdf4ef73b6275c424990f3759;hpb=53631be4ebaa4fb13a7f129727c1cdd32fcc6f3d;p=mesa.git diff --git a/src/mesa/drivers/dri/i965/gen6_cc.c b/src/mesa/drivers/dri/i965/gen6_cc.c index cac32e5a053..3bab8f46ae8 100644 --- a/src/mesa/drivers/dri/i965/gen6_cc.c +++ b/src/mesa/drivers/dri/i965/gen6_cc.c @@ -39,7 +39,7 @@ static void gen6_upload_blend_state(struct brw_context *brw) { bool is_buffer_zero_integer_format = false; - struct gl_context *ctx = &brw->intel.ctx; + struct gl_context *ctx = &brw->ctx; struct gen6_blend_state *blend; int b; int nr_draw_buffers = ctx->DrawBuffer->_NumColorDrawBuffers; @@ -51,7 +51,7 @@ gen6_upload_blend_state(struct brw_context *brw) * with render target 0, which will reference BLEND_STATE[0] for * alpha test enable. */ - if (nr_draw_buffers == 0 && ctx->Color.AlphaEnabled) + if (nr_draw_buffers == 0) nr_draw_buffers = 1; size = sizeof(*blend) * nr_draw_buffers; @@ -97,8 +97,8 @@ gen6_upload_blend_state(struct brw_context *brw) rb_type != GL_UNSIGNED_NORMALIZED && rb_type != GL_FLOAT, "Ignoring %s logic op on %s " "renderbuffer\n", - _mesa_lookup_enum_by_nr(ctx->Color.LogicOp), - _mesa_lookup_enum_by_nr(rb_type)); + _mesa_enum_to_string(ctx->Color.LogicOp), + _mesa_enum_to_string(rb_type)); if (rb_type == GL_UNSIGNED_NORMALIZED) { blend[b].blend1.logic_op_enable = 1; blend[b].blend1.logic_op_func = @@ -241,11 +241,11 @@ gen6_upload_blend_state(struct brw_context *brw) const struct brw_tracked_state gen6_blend_state = { .dirty = { - .mesa = (_NEW_COLOR | - _NEW_BUFFERS | - _NEW_MULTISAMPLE), - .brw = BRW_NEW_BATCH | BRW_NEW_STATE_BASE_ADDRESS, - .cache = 0, + .mesa = _NEW_BUFFERS | + _NEW_COLOR | + _NEW_MULTISAMPLE, + .brw = BRW_NEW_BATCH | + BRW_NEW_STATE_BASE_ADDRESS, }, .emit = gen6_upload_blend_state, }; @@ -253,7 +253,7 @@ const struct brw_tracked_state gen6_blend_state = { static void gen6_upload_color_calc_state(struct brw_context *brw) { - struct gl_context *ctx = &brw->intel.ctx; + struct gl_context *ctx = &brw->ctx; struct gen6_color_calc_state *cc; cc = brw_state_batch(brw, AUB_TRACE_CC_STATE, @@ -264,9 +264,12 @@ gen6_upload_color_calc_state(struct brw_context *brw) cc->cc0.alpha_test_format = BRW_ALPHATEST_FORMAT_UNORM8; UNCLAMPED_FLOAT_TO_UBYTE(cc->cc1.alpha_ref_fi.ui, ctx->Color.AlphaRef); - /* _NEW_STENCIL */ - cc->cc0.stencil_ref = _mesa_get_stencil_ref(ctx, 0); - cc->cc0.bf_stencil_ref = _mesa_get_stencil_ref(ctx, ctx->Stencil._BackFace); + if (brw->gen < 9) { + /* _NEW_STENCIL */ + cc->cc0.stencil_ref = _mesa_get_stencil_ref(ctx, 0); + cc->cc0.bf_stencil_ref = + _mesa_get_stencil_ref(ctx, ctx->Stencil._BackFace); + } /* _NEW_COLOR */ cc->constant_r = ctx->Color.BlendColorUnclamped[0]; @@ -292,9 +295,10 @@ gen6_upload_color_calc_state(struct brw_context *brw) const struct brw_tracked_state gen6_color_calc_state = { .dirty = { - .mesa = _NEW_COLOR | _NEW_STENCIL, - .brw = BRW_NEW_BATCH | BRW_NEW_STATE_BASE_ADDRESS, - .cache = 0, + .mesa = _NEW_COLOR | + _NEW_STENCIL, + .brw = BRW_NEW_BATCH | + BRW_NEW_STATE_BASE_ADDRESS, }, .emit = gen6_upload_color_calc_state, };