X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=src%2Fmesa%2Fdrivers%2Fdri%2Fi965%2Fgen6_urb.c;h=107a4f24fa638139280c5b7ff3ac7e2cf7302102;hb=11f5d8a5d4fbb861ec161f68593e429cbd65d1cd;hp=5445e4035a98d5a76e75743339d923741ff87e2e;hpb=275c4bd3643d773210780cb8d578ca84f2604684;p=mesa.git

diff --git a/src/mesa/drivers/dri/i965/gen6_urb.c b/src/mesa/drivers/dri/i965/gen6_urb.c
index 5445e4035a9..107a4f24fa6 100644
--- a/src/mesa/drivers/dri/i965/gen6_urb.c
+++ b/src/mesa/drivers/dri/i965/gen6_urb.c
@@ -31,53 +31,107 @@
 #include "brw_state.h"
 #include "brw_defines.h"
 
+/**
+ * When the GS is not in use, we assign the entire URB space to the VS.  When
+ * the GS is in use, we split the URB space evenly between the VS and the GS.
+ * This is not ideal, but it's simple.
+ *
+ *           URB size / 2                   URB size / 2
+ *   _____________-______________   _____________-______________
+ *  /                            \ /                            \
+ * +-------------------------------------------------------------+
+ * | Vertex Shader Entries        | Geometry Shader Entries      |
+ * +-------------------------------------------------------------+
+ *
+ * Sandybridge GT1 has 32kB of URB space, while GT2 has 64kB.
+ * (See the Sandybridge PRM, Volume 2, Part 1, Section 1.4.7: 3DSTATE_URB.)
+ */
 static void
-prepare_urb( struct brw_context *brw )
+gen6_upload_urb( struct brw_context *brw )
 {
-   brw->urb.nr_vs_entries = 24;
-   if (brw->gs.prog_bo)
-      brw->urb.nr_gs_entries = 4;
-   else
-      brw->urb.nr_gs_entries = 0;
-   /* CACHE_NEW_VS_PROG */
-   brw->urb.vs_size = MIN2(brw->vs.prog_data->urb_entry_size, 1);
+   int nr_vs_entries, nr_gs_entries;
+   int total_urb_size = brw->urb.size * 1024; /* in bytes */
+
+   bool gs_present = brw->ff_gs.prog_active || brw->geometry_program;
 
-   /* Check that the number of URB rows (8 floats each) allocated is less
-    * than the URB space.
+   /* BRW_NEW_VS_PROG_DATA */
+   unsigned vs_size = MAX2(brw->vs.prog_data->base.urb_entry_size, 1);
+
+   /* Whe using GS to do transform feedback only we use the same VUE layout for
+    * VS outputs and GS outputs (as it's what the SF and Clipper expect), so we
+    * can simply make the GS URB entry size the same as for the VS.  This may
+    * technically be too large in cases where we have few vertex attributes and
+    * a lot of varyings, since the VS size is determined by the larger of the
+    * two. For now, it's safe.
+    *
+    * For user-provided GS the assumption above does not hold since the GS
+    * outputs can be different from the VS outputs.
     */
-   assert((brw->urb.nr_vs_entries +
-	   brw->urb.nr_gs_entries) * brw->urb.vs_size * 8 < 64 * 1024);
-}
+   unsigned gs_size = vs_size;
+   if (brw->geometry_program) {
+      gs_size = brw->gs.prog_data->base.urb_entry_size;
+      assert(gs_size >= 1);
+   }
 
-static void
-upload_urb(struct brw_context *brw)
-{
-   struct intel_context *intel = &brw->intel;
+   /* Calculate how many entries fit in each stage's section of the URB */
+   if (gs_present) {
+      nr_vs_entries = (total_urb_size/2) / (vs_size * 128);
+      nr_gs_entries = (total_urb_size/2) / (gs_size * 128);
+   } else {
+      nr_vs_entries = total_urb_size / (vs_size * 128);
+      nr_gs_entries = 0;
+   }
+
+   /* Then clamp to the maximum allowed by the hardware */
+   if (nr_vs_entries > brw->urb.max_vs_entries)
+      nr_vs_entries = brw->urb.max_vs_entries;
+
+   if (nr_gs_entries > brw->urb.max_gs_entries)
+      nr_gs_entries = brw->urb.max_gs_entries;
 
+   /* Finally, both must be a multiple of 4 (see 3DSTATE_URB in the PRM). */
+   brw->urb.nr_vs_entries = ROUND_DOWN_TO(nr_vs_entries, 4);
+   brw->urb.nr_gs_entries = ROUND_DOWN_TO(nr_gs_entries, 4);
+
+   assert(brw->urb.nr_vs_entries >= brw->urb.min_vs_entries);
    assert(brw->urb.nr_vs_entries % 4 == 0);
    assert(brw->urb.nr_gs_entries % 4 == 0);
-   /* GS requirement */
-   assert(!brw->gs.prog_bo || brw->urb.vs_size < 5);
-
-   intel_batchbuffer_emit_mi_flush(intel->batch);
+   assert(vs_size <= 5);
+   assert(gs_size <= 5);
 
    BEGIN_BATCH(3);
-   OUT_BATCH(CMD_URB << 16 | (3 - 2));
-   OUT_BATCH(((brw->urb.vs_size - 1) << GEN6_URB_VS_SIZE_SHIFT) |
+   OUT_BATCH(_3DSTATE_URB << 16 | (3 - 2));
+   OUT_BATCH(((vs_size - 1) << GEN6_URB_VS_SIZE_SHIFT) |
 	     ((brw->urb.nr_vs_entries) << GEN6_URB_VS_ENTRIES_SHIFT));
-   OUT_BATCH(((brw->urb.vs_size - 1) << GEN6_URB_GS_SIZE_SHIFT) |
+   OUT_BATCH(((gs_size - 1) << GEN6_URB_GS_SIZE_SHIFT) |
 	     ((brw->urb.nr_gs_entries) << GEN6_URB_GS_ENTRIES_SHIFT));
    ADVANCE_BATCH();
 
-   intel_batchbuffer_emit_mi_flush(intel->batch);
+   /* From the PRM Volume 2 part 1, section 1.4.7:
+    *
+    *   Because of a urb corruption caused by allocating a previous gsunit’s
+    *   urb entry to vsunit software is required to send a "GS NULL
+    *   Fence"(Send URB fence with VS URB size == 1 and GS URB size == 0) plus
+    *   a dummy DRAW call before any case where VS will be taking over GS URB
+    *   space.
+    *
+    * It is not clear exactly what this means ("URB fence" is a command that
+    * doesn't exist on Gen6).  So for now we just do a full pipeline flush as
+    * a workaround.
+    */
+   if (brw->urb.gs_present && !gs_present)
+      intel_batchbuffer_emit_mi_flush(brw);
+   brw->urb.gs_present = gs_present;
 }
 
 const struct brw_tracked_state gen6_urb = {
    .dirty = {
       .mesa = 0,
-      .brw = BRW_NEW_CONTEXT,
-      .cache = CACHE_NEW_VS_PROG,
+      .brw = BRW_NEW_CONTEXT |
+             BRW_NEW_FF_GS_PROG_DATA |
+             BRW_NEW_GEOMETRY_PROGRAM |
+             BRW_NEW_GS_PROG_DATA |
+             BRW_NEW_VS_PROG_DATA,
    },
-   .prepare = prepare_urb,
-   .emit = upload_urb,
+   .emit = gen6_upload_urb,
 };