X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=src%2Fmesa%2Fdrivers%2Fdri%2Fi965%2Fgen7_sf_state.c;h=86809a1b0a31a8febebe5bdf4e15b05e0f7f813e;hb=8371c68a4b4c12f4dd75f82b8b29a624705910a5;hp=871a8b753a3a2720b62923ecdb36ede8091560f1;hpb=97fc89c6cbaa3b5ef7f678d2dc2c7d5bbba05315;p=mesa.git

diff --git a/src/mesa/drivers/dri/i965/gen7_sf_state.c b/src/mesa/drivers/dri/i965/gen7_sf_state.c
index 871a8b753a3..86809a1b0a3 100644
--- a/src/mesa/drivers/dri/i965/gen7_sf_state.c
+++ b/src/mesa/drivers/dri/i965/gen7_sf_state.c
@@ -34,7 +34,6 @@ upload_sbe_state(struct brw_context *brw)
 {
    struct intel_context *intel = &brw->intel;
    struct gl_context *ctx = &intel->ctx;
-   uint32_t urb_entry_read_length;
    /* BRW_NEW_FRAGMENT_PROGRAM */
    uint32_t num_outputs = _mesa_bitcount_64(brw->fragment_program->Base.InputsRead);
    /* _NEW_LIGHT */
@@ -43,27 +42,13 @@ upload_sbe_state(struct brw_context *brw)
    int i;
    int attr = 0, input_index = 0;
    int urb_entry_read_offset = 1;
-   uint16_t attr_overrides[FRAG_ATTRIB_MAX];
+   uint16_t attr_overrides[VARYING_SLOT_MAX];
    /* _NEW_BUFFERS */
    bool render_to_fbo = _mesa_is_user_fbo(ctx->DrawBuffer);
    uint32_t point_sprite_origin;
 
-   /* CACHE_NEW_VS_PROG */
-   urb_entry_read_length = ((brw->vs.prog_data->vue_map.num_slots + 1) / 2 -
-			    urb_entry_read_offset);
-   if (urb_entry_read_length == 0) {
-      /* Setting the URB entry read length to 0 causes undefined behavior, so
-       * if we have no URB data to read, set it to 1.
-       */
-      urb_entry_read_length = 1;
-   }
-
    /* FINISHME: Attribute Swizzle Control Mode? */
-   dw1 =
-      GEN7_SBE_SWIZZLE_ENABLE |
-      num_outputs << GEN7_SBE_NUM_OUTPUTS_SHIFT |
-      urb_entry_read_length << GEN7_SBE_URB_ENTRY_READ_LENGTH_SHIFT |
-      urb_entry_read_offset << GEN7_SBE_URB_ENTRY_READ_OFFSET_SHIFT;
+   dw1 = GEN7_SBE_SWIZZLE_ENABLE | num_outputs << GEN7_SBE_NUM_OUTPUTS_SHIFT;
 
    /* _NEW_POINT
     *
@@ -84,21 +69,22 @@ upload_sbe_state(struct brw_context *brw)
    /* Create the mapping from the FS inputs we produce to the VS outputs
     * they source from.
     */
-   for (; attr < FRAG_ATTRIB_MAX; attr++) {
+   uint32_t max_source_attr = 0;
+   for (; attr < VARYING_SLOT_MAX; attr++) {
       enum glsl_interp_qualifier interp_qualifier =
          brw->fragment_program->InterpQualifier[attr];
-      bool is_gl_Color = attr == FRAG_ATTRIB_COL0 || attr == FRAG_ATTRIB_COL1;
+      bool is_gl_Color = attr == VARYING_SLOT_COL0 || attr == VARYING_SLOT_COL1;
 
       if (!(brw->fragment_program->Base.InputsRead & BITFIELD64_BIT(attr)))
 	 continue;
 
       if (ctx->Point.PointSprite &&
-	  attr >= FRAG_ATTRIB_TEX0 && attr <= FRAG_ATTRIB_TEX7 &&
-	  ctx->Point.CoordReplace[attr - FRAG_ATTRIB_TEX0]) {
+	  attr >= VARYING_SLOT_TEX0 && attr <= VARYING_SLOT_TEX7 &&
+	  ctx->Point.CoordReplace[attr - VARYING_SLOT_TEX0]) {
 	 dw10 |= (1 << input_index);
       }
 
-      if (attr == FRAG_ATTRIB_PNTC)
+      if (attr == VARYING_SLOT_PNTC)
 	 dw10 |= (1 << input_index);
 
       /* flat shading */
@@ -118,10 +104,26 @@ upload_sbe_state(struct brw_context *brw)
       attr_overrides[input_index++] =
          get_attr_override(&brw->vs.prog_data->vue_map,
 			   urb_entry_read_offset, attr,
-                           ctx->VertexProgram._TwoSideEnabled);
+                           ctx->VertexProgram._TwoSideEnabled,
+                           &max_source_attr);
    }
 
-   for (; input_index < FRAG_ATTRIB_MAX; input_index++)
+   /* From the Ivy Bridge PRM, Volume 2, Part 1, documentation for
+    * 3DSTATE_SBE DWord 1 bits 15:11, "Vertex URB Entry Read Length":
+    *
+    * "This field should be set to the minimum length required to read the
+    *  maximum source attribute.  The maximum source attribute is indicated
+    *  by the maximum value of the enabled Attribute # Source Attribute if
+    *  Attribute Swizzle Enable is set, Number of Output Attributes-1 if
+    *  enable is not set.
+    *
+    *  read_length = ceiling((max_source_attr + 1) / 2)"
+    */
+   uint32_t urb_entry_read_length = ALIGN(max_source_attr + 1, 2) / 2;
+   dw1 |= urb_entry_read_length << GEN7_SBE_URB_ENTRY_READ_LENGTH_SHIFT |
+          urb_entry_read_offset << GEN7_SBE_URB_ENTRY_READ_OFFSET_SHIFT;
+
+   for (; input_index < VARYING_SLOT_MAX; input_index++)
       attr_overrides[input_index] = 0;
 
    BEGIN_BATCH(14);
@@ -142,7 +144,8 @@ upload_sbe_state(struct brw_context *brw)
 
 const struct brw_tracked_state gen7_sbe_state = {
    .dirty = {
-      .mesa  = (_NEW_LIGHT |
+      .mesa  = (_NEW_BUFFERS |
+		_NEW_LIGHT |
 		_NEW_POINT |
 		_NEW_PROGRAM),
       .brw   = (BRW_NEW_CONTEXT |
@@ -253,7 +256,6 @@ upload_sf_state(struct brw_context *brw)
    }
    if (ctx->Line.SmoothFlag) {
       dw2 |= GEN6_SF_LINE_AA_ENABLE;
-      dw2 |= GEN6_SF_LINE_AA_MODE_TRUE;
       dw2 |= GEN6_SF_LINE_END_CAP_WIDTH_1_0;
    }
    if (ctx->Line.StippleFlag && intel->is_haswell) {
@@ -264,10 +266,9 @@ upload_sf_state(struct brw_context *brw)
       dw2 |= GEN6_SF_MSRAST_ON_PATTERN;
 
    /* FINISHME: Last Pixel Enable?  Vertex Sub Pixel Precision Select?
-    * FINISHME: AA Line Distance Mode?
     */
 
-   dw3 = 0;
+   dw3 = GEN6_SF_LINE_AA_MODE_TRUE;
 
    /* _NEW_PROGRAM | _NEW_POINT */
    if (!(ctx->VertexProgram.PointSizeEnabled || ctx->Point._Attenuated))