X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=src%2Fmesa%2Fdrivers%2Fdri%2Fi965%2Fintel_extensions.c;h=192971f32c834c7fbeb520d480bbe511f81d17bf;hb=7b54404c9d66ed2c5348639014b09b05528c3144;hp=66079b5fdd849c3e4760a46dad2ddf3bd6c477d3;hpb=75128d6ffda9745161cb5c7ddd499422ad544d2c;p=mesa.git diff --git a/src/mesa/drivers/dri/i965/intel_extensions.c b/src/mesa/drivers/dri/i965/intel_extensions.c index 66079b5fdd8..192971f32c8 100644 --- a/src/mesa/drivers/dri/i965/intel_extensions.c +++ b/src/mesa/drivers/dri/i965/intel_extensions.c @@ -29,142 +29,6 @@ #include "brw_defines.h" #include "intel_batchbuffer.h" -/** - * Test if we can use MI_LOAD_REGISTER_MEM from an untrusted batchbuffer. - * - * Some combinations of hardware and kernel versions allow this feature, - * while others don't. Instead of trying to enumerate every case, just - * try and write a register and see if works. - */ -static bool -can_do_pipelined_register_writes(struct brw_context *brw) -{ - /** - * gen >= 8 specifically allows these writes. gen <= 6 also - * doesn't block them. - */ - if (brw->gen != 7) - return true; - - static int result = -1; - if (result != -1) - return result; - - /* We use SO_WRITE_OFFSET0 since you're supposed to write it (unlike the - * statistics registers), and we already reset it to zero before using it. - */ - const int reg = GEN7_SO_WRITE_OFFSET(0); - const int expected_value = 0x1337d0d0; - const int offset = 100; - - /* The register we picked only exists on Gen7+. */ - assert(brw->gen == 7); - - uint32_t *data; - /* Set a value in a BO to a known quantity. The workaround BO already - * exists and doesn't contain anything important, so we may as well use it. - */ - drm_intel_bo_map(brw->workaround_bo, true); - data = brw->workaround_bo->virtual; - data[offset] = 0xffffffff; - drm_intel_bo_unmap(brw->workaround_bo); - - /* Write the register. */ - BEGIN_BATCH(3); - OUT_BATCH(MI_LOAD_REGISTER_IMM | (3 - 2)); - OUT_BATCH(reg); - OUT_BATCH(expected_value); - ADVANCE_BATCH(); - - brw_emit_mi_flush(brw); - - /* Save the register's value back to the buffer. */ - BEGIN_BATCH(3); - OUT_BATCH(MI_STORE_REGISTER_MEM | (3 - 2)); - OUT_BATCH(reg); - OUT_RELOC(brw->workaround_bo, - I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, - offset * sizeof(uint32_t)); - ADVANCE_BATCH(); - - intel_batchbuffer_flush(brw); - - /* Check whether the value got written. */ - drm_intel_bo_map(brw->workaround_bo, false); - data = brw->workaround_bo->virtual; - bool success = data[offset] == expected_value; - drm_intel_bo_unmap(brw->workaround_bo); - - result = success; - - return success; -} - -static bool -can_write_oacontrol(struct brw_context *brw) -{ - if (brw->gen < 6 || brw->gen >= 8) - return false; - - static int result = -1; - if (result != -1) - return result; - - /* Set "Select Context ID" to a particular address (which is likely not a - * context), but leave all counting disabled. This should be harmless. - */ - const int expected_value = 0x31337000; - const int offset = 110; - - uint32_t *data; - /* Set a value in a BO to a known quantity. The workaround BO already - * exists and doesn't contain anything important, so we may as well use it. - */ - drm_intel_bo_map(brw->workaround_bo, true); - data = brw->workaround_bo->virtual; - data[offset] = 0xffffffff; - drm_intel_bo_unmap(brw->workaround_bo); - - /* Write OACONTROL. */ - BEGIN_BATCH(3); - OUT_BATCH(MI_LOAD_REGISTER_IMM | (3 - 2)); - OUT_BATCH(OACONTROL); - OUT_BATCH(expected_value); - ADVANCE_BATCH(); - - brw_emit_mi_flush(brw); - - /* Save the register's value back to the buffer. */ - BEGIN_BATCH(3); - OUT_BATCH(MI_STORE_REGISTER_MEM | (3 - 2)); - OUT_BATCH(OACONTROL); - OUT_RELOC(brw->workaround_bo, - I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, - offset * sizeof(uint32_t)); - ADVANCE_BATCH(); - - brw_emit_mi_flush(brw); - - /* Set OACONTROL back to zero (everything off). */ - BEGIN_BATCH(3); - OUT_BATCH(MI_LOAD_REGISTER_IMM | (3 - 2)); - OUT_BATCH(OACONTROL); - OUT_BATCH(0); - ADVANCE_BATCH(); - - intel_batchbuffer_flush(brw); - - /* Check whether the value got written. */ - drm_intel_bo_map(brw->workaround_bo, false); - data = brw->workaround_bo->virtual; - bool success = data[offset] == expected_value; - drm_intel_bo_unmap(brw->workaround_bo); - - result = success; - - return success; -} - /** * Initializes potential list of extensions if ctx == NULL, or actually enables * extensions for a context. @@ -173,8 +37,9 @@ void intelInitExtensions(struct gl_context *ctx) { struct brw_context *brw = brw_context(ctx); + const struct gen_device_info *devinfo = &brw->screen->devinfo; - assert(brw->gen >= 4); + assert(devinfo->gen >= 4); ctx->Extensions.ARB_arrays_of_arrays = true; ctx->Extensions.ARB_buffer_storage = true; @@ -201,11 +66,12 @@ intelInitExtensions(struct gl_context *ctx) ctx->Extensions.ARB_map_buffer_range = true; ctx->Extensions.ARB_occlusion_query = true; ctx->Extensions.ARB_occlusion_query2 = true; - ctx->Extensions.ARB_pipeline_statistics_query = true; ctx->Extensions.ARB_point_sprite = true; + ctx->Extensions.ARB_polygon_offset_clamp = true; ctx->Extensions.ARB_seamless_cube_map = true; ctx->Extensions.ARB_shader_bit_encoding = true; ctx->Extensions.ARB_shader_draw_parameters = true; + ctx->Extensions.ARB_shader_group_vote = true; ctx->Extensions.ARB_shader_texture_lod = true; ctx->Extensions.ARB_shading_language_packing = true; ctx->Extensions.ARB_shadow = true; @@ -216,6 +82,7 @@ intelInitExtensions(struct gl_context *ctx) ctx->Extensions.ARB_texture_env_combine = true; ctx->Extensions.ARB_texture_env_crossbar = true; ctx->Extensions.ARB_texture_env_dot3 = true; + ctx->Extensions.ARB_texture_filter_anisotropic = true; ctx->Extensions.ARB_texture_float = true; ctx->Extensions.ARB_texture_mirror_clamp_to_edge = true; ctx->Extensions.ARB_texture_non_power_of_two = true; @@ -235,7 +102,6 @@ intelInitExtensions(struct gl_context *ctx) ctx->Extensions.EXT_packed_float = true; ctx->Extensions.EXT_pixel_buffer_object = true; ctx->Extensions.EXT_point_parameters = true; - ctx->Extensions.EXT_polygon_offset_clamp = true; ctx->Extensions.EXT_provoking_vertex = true; ctx->Extensions.EXT_stencil_two_side = true; ctx->Extensions.EXT_texture_array = true; @@ -247,6 +113,7 @@ intelInitExtensions(struct gl_context *ctx) ctx->Extensions.EXT_texture_sRGB = true; ctx->Extensions.EXT_texture_sRGB_decode = true; ctx->Extensions.EXT_texture_swizzle = true; + ctx->Extensions.EXT_texture_type_2_10_10_10_REV = true; ctx->Extensions.EXT_vertex_array_bgra = true; ctx->Extensions.KHR_robustness = true; ctx->Extensions.AMD_seamless_cubemap_per_texture = true; @@ -255,6 +122,7 @@ intelInitExtensions(struct gl_context *ctx) ctx->Extensions.ATI_texture_env_combine3 = true; ctx->Extensions.MESA_pack_invert = true; ctx->Extensions.NV_conditional_render = true; + ctx->Extensions.NV_fog_distance = true; ctx->Extensions.NV_primitive_restart = true; ctx->Extensions.NV_texture_barrier = true; ctx->Extensions.NV_texture_env_combine4 = true; @@ -270,47 +138,59 @@ intelInitExtensions(struct gl_context *ctx) ctx->Extensions.OES_texture_half_float = true; ctx->Extensions.OES_texture_half_float_linear = true; - if (brw->gen >= 8) + if (devinfo->gen >= 8) + ctx->Const.GLSLVersion = 450; + else if (devinfo->is_haswell && can_do_pipelined_register_writes(brw->screen)) ctx->Const.GLSLVersion = 450; - else if (brw->gen >= 6) + else if (devinfo->gen >= 7 && can_do_pipelined_register_writes(brw->screen)) + ctx->Const.GLSLVersion = 420; + else if (devinfo->gen >= 6) ctx->Const.GLSLVersion = 330; else ctx->Const.GLSLVersion = 120; + + if (devinfo->gen >= 6) + ctx->Const.GLSLVersionCompat = 130; + else + ctx->Const.GLSLVersionCompat = 120; + _mesa_override_glsl_version(&ctx->Const); ctx->Extensions.EXT_shader_integer_mix = ctx->Const.GLSLVersion >= 130; ctx->Extensions.MESA_shader_integer_functions = ctx->Const.GLSLVersion >= 130; - if (brw->is_g4x || brw->gen >= 5) { - ctx->Extensions.MESA_shader_framebuffer_fetch_non_coherent = true; + if (devinfo->is_g4x || devinfo->gen >= 5) { + ctx->Extensions.EXT_shader_framebuffer_fetch_non_coherent = true; ctx->Extensions.KHR_blend_equation_advanced = true; } - if (brw->gen >= 5) { + if (devinfo->gen >= 5) { ctx->Extensions.ARB_texture_query_levels = ctx->Const.GLSLVersion >= 130; ctx->Extensions.ARB_texture_query_lod = true; ctx->Extensions.EXT_timer_query = true; - - if (brw->gen == 5 || can_write_oacontrol(brw)) { - ctx->Extensions.AMD_performance_monitor = true; - ctx->Extensions.INTEL_performance_query = true; - } } - if (brw->gen >= 6) { + if (devinfo->gen == 6) + ctx->Extensions.ARB_transform_feedback2 = true; + + if (devinfo->gen >= 6) { ctx->Extensions.ARB_blend_func_extended = !driQueryOptionb(&brw->optionCache, "disable_blend_func_extended"); ctx->Extensions.ARB_conditional_render_inverted = true; ctx->Extensions.ARB_cull_distance = true; ctx->Extensions.ARB_draw_buffers_blend = true; - ctx->Extensions.ARB_enhanced_layouts = true; + if (ctx->API != API_OPENGL_COMPAT) + ctx->Extensions.ARB_enhanced_layouts = true; ctx->Extensions.ARB_ES3_compatibility = true; ctx->Extensions.ARB_fragment_layer_viewport = true; + ctx->Extensions.ARB_pipeline_statistics_query = true; ctx->Extensions.ARB_sample_shading = true; ctx->Extensions.ARB_shading_language_420pack = true; - ctx->Extensions.ARB_texture_buffer_object = true; - ctx->Extensions.ARB_texture_buffer_object_rgb32 = true; - ctx->Extensions.ARB_texture_buffer_range = true; + if (ctx->API != API_OPENGL_COMPAT) { + ctx->Extensions.ARB_texture_buffer_object = true; + ctx->Extensions.ARB_texture_buffer_object_rgb32 = true; + ctx->Extensions.ARB_texture_buffer_range = true; + } ctx->Extensions.ARB_texture_cube_map_array = true; ctx->Extensions.ARB_texture_gather = true; ctx->Extensions.ARB_texture_multisample = true; @@ -320,16 +200,18 @@ intelInitExtensions(struct gl_context *ctx) ctx->Extensions.EXT_framebuffer_multisample = true; ctx->Extensions.EXT_framebuffer_multisample_blit_scaled = true; ctx->Extensions.EXT_transform_feedback = true; + ctx->Extensions.ARB_transform_feedback_overflow_query = true; ctx->Extensions.OES_depth_texture_cube_map = true; ctx->Extensions.OES_sample_variables = true; ctx->Extensions.ARB_timer_query = brw->screen->hw_has_timestamp; + ctx->Extensions.EXT_disjoint_timer_query = + ctx->Extensions.ARB_timer_query; /* Only enable this in core profile because other parts of Mesa behave * slightly differently when the extension is enabled. */ if (ctx->API == API_OPENGL_CORE) { - ctx->Extensions.ARB_shader_subroutine = true; ctx->Extensions.ARB_shader_viewport_layer_array = true; ctx->Extensions.ARB_viewport_array = true; ctx->Extensions.AMD_vertex_shader_viewport_index = true; @@ -337,93 +219,103 @@ intelInitExtensions(struct gl_context *ctx) } brw->predicate.supported = false; - brw->can_do_pipelined_register_writes = - can_do_pipelined_register_writes(brw); - if (brw->gen >= 7) { + if (devinfo->gen >= 7) { ctx->Extensions.ARB_conservative_depth = true; ctx->Extensions.ARB_derivative_control = true; ctx->Extensions.ARB_framebuffer_no_attachments = true; ctx->Extensions.ARB_gpu_shader5 = true; + ctx->Extensions.ARB_gpu_shader_fp64 = devinfo->has_64bit_types; ctx->Extensions.ARB_shader_atomic_counters = true; ctx->Extensions.ARB_shader_atomic_counter_ops = true; ctx->Extensions.ARB_shader_clock = true; ctx->Extensions.ARB_shader_image_load_store = true; ctx->Extensions.ARB_shader_image_size = true; + ctx->Extensions.ARB_shader_precision = true; ctx->Extensions.ARB_shader_texture_image_samples = true; ctx->Extensions.ARB_tessellation_shader = true; ctx->Extensions.ARB_texture_compression_bptc = true; ctx->Extensions.ARB_texture_view = true; ctx->Extensions.ARB_shader_storage_buffer_object = true; + ctx->Extensions.ARB_vertex_attrib_64bit = devinfo->has_64bit_types; ctx->Extensions.EXT_shader_samples_identical = true; ctx->Extensions.OES_primitive_bounding_box = true; ctx->Extensions.OES_texture_buffer = true; - if (brw->can_do_pipelined_register_writes) { + if (can_do_pipelined_register_writes(brw->screen)) { ctx->Extensions.ARB_draw_indirect = true; ctx->Extensions.ARB_transform_feedback2 = true; ctx->Extensions.ARB_transform_feedback3 = true; ctx->Extensions.ARB_transform_feedback_instanced = true; - if ((brw->gen >= 8 || brw->screen->cmd_parser_version >= 5) && + if (can_do_compute_dispatch(brw->screen) && ctx->Const.MaxComputeWorkGroupSize[0] >= 1024) { ctx->Extensions.ARB_compute_shader = true; ctx->Extensions.ARB_ES3_1_compatibility = - brw->gen >= 8 || brw->is_haswell; + devinfo->gen >= 8 || devinfo->is_haswell; } - if (brw->screen->cmd_parser_version >= 2) + if (can_do_predicate_writes(brw->screen)) { brw->predicate.supported = true; + ctx->Extensions.ARB_indirect_parameters = true; + } } } - if (brw->gen >= 8 || brw->is_haswell) { + if (devinfo->gen >= 8 || devinfo->is_haswell) { ctx->Extensions.ARB_stencil_texturing = true; ctx->Extensions.ARB_texture_stencil8 = true; + ctx->Extensions.OES_geometry_shader = true; + ctx->Extensions.OES_texture_cube_map_array = true; + ctx->Extensions.OES_viewport_array = true; } - if (brw->gen >= 8 || brw->is_haswell || brw->is_baytrail) { + if (devinfo->gen >= 8 || devinfo->is_haswell || devinfo->is_baytrail) { ctx->Extensions.ARB_robust_buffer_access_behavior = true; } - if (brw->screen->has_mi_math_and_lrr) { + if (can_do_mi_math_and_lrr(brw->screen)) { ctx->Extensions.ARB_query_buffer_object = true; } - if (brw->gen >= 8 || brw->is_baytrail) { + if (devinfo->gen >= 8 || devinfo->is_baytrail) { /* For now, we only enable OES_copy_image on platforms that support * ETC2 natively in hardware. We would need more hacks to support it - * elsewhere. + * elsewhere. Same with OES_texture_view. */ ctx->Extensions.OES_copy_image = true; + ctx->Extensions.OES_texture_view = true; } - if (brw->gen >= 8) { - ctx->Extensions.ARB_gpu_shader_fp64 = true; - ctx->Extensions.ARB_shader_precision = true; - ctx->Extensions.ARB_vertex_attrib_64bit = true; + if (devinfo->gen >= 8) { + ctx->Extensions.ARB_gpu_shader_int64 = devinfo->has_64bit_types; + /* requires ARB_gpu_shader_int64 */ + ctx->Extensions.ARB_shader_ballot = devinfo->has_64bit_types; ctx->Extensions.ARB_ES3_2_compatibility = true; - ctx->Extensions.OES_geometry_shader = true; - ctx->Extensions.OES_texture_cube_map_array = true; - ctx->Extensions.OES_viewport_array = true; } - if (brw->gen >= 9) { + if (devinfo->gen >= 9) { ctx->Extensions.ANDROID_extension_pack_es31a = true; ctx->Extensions.ARB_shader_stencil_export = true; ctx->Extensions.KHR_blend_equation_advanced_coherent = true; ctx->Extensions.KHR_texture_compression_astc_ldr = true; ctx->Extensions.KHR_texture_compression_astc_sliced_3d = true; - ctx->Extensions.MESA_shader_framebuffer_fetch = true; + ctx->Extensions.INTEL_conservative_rasterization = true; + ctx->Extensions.EXT_shader_framebuffer_fetch = true; + ctx->Extensions.ARB_post_depth_coverage = true; } + if (gen_device_info_is_9lp(devinfo)) + ctx->Extensions.KHR_texture_compression_astc_hdr = true; + + if (devinfo->gen >= 6) + ctx->Extensions.INTEL_performance_query = true; + if (ctx->API == API_OPENGL_CORE) ctx->Extensions.ARB_base_instance = true; if (ctx->API != API_OPENGL_CORE) ctx->Extensions.ARB_color_buffer_float = true; - if (ctx->Mesa_DXTn || driQueryOptionb(&brw->optionCache, "force_s3tc_enable")) - ctx->Extensions.EXT_texture_compression_s3tc = true; - + ctx->Extensions.EXT_texture_compression_s3tc = true; ctx->Extensions.ANGLE_texture_compression_dxt = true; }