X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=src%2Fmesa%2Fdrivers%2Fdri%2Fi965%2Fintel_fbo.h;h=89894cd3e86291af6d0a97af085c74bcc73c5985;hb=8bed1adfc144d9ae8d55ccb9b277942da8a78064;hp=b8db7e2d73fe46ad009979359785a5c5215f1ee4;hpb=4e0924c5de5f3964e4ca81f923d877dbb59fad0a;p=mesa.git diff --git a/src/mesa/drivers/dri/i965/intel_fbo.h b/src/mesa/drivers/dri/i965/intel_fbo.h index b8db7e2d73f..89894cd3e86 100644 --- a/src/mesa/drivers/dri/i965/intel_fbo.h +++ b/src/mesa/drivers/dri/i965/intel_fbo.h @@ -1,5 +1,4 @@ -/************************************************************************** - * +/* * Copyright 2006 VMware, Inc. * All Rights Reserved. * @@ -7,7 +6,7 @@ * copy of this software and associated documentation files (the * "Software"), to deal in the Software without restriction, including * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sub license, and/or sell copies of the Software, and to + * distribute, sublicense, and/or sell copies of the Software, and to * permit persons to whom the Software is furnished to do so, subject to * the following conditions: * @@ -17,13 +16,12 @@ * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - * - **************************************************************************/ + */ #ifndef INTEL_FBO_H #define INTEL_FBO_H @@ -41,7 +39,6 @@ extern "C" { #endif struct intel_mipmap_tree; -struct intel_texture_image; /** * Intel renderbuffer, derived from gl_renderbuffer. @@ -90,6 +87,9 @@ struct intel_renderbuffer */ unsigned int mt_level; unsigned int mt_layer; + + /* The number of attached logical layers. */ + unsigned int layer_count; /** \} */ GLuint draw_x, draw_y; /**< Offset of drawing within the region */ @@ -237,6 +237,10 @@ void intel_renderbuffer_upsample(struct brw_context *brw, struct intel_renderbuffer *irb); +void brw_render_cache_set_clear(struct brw_context *brw); +void brw_render_cache_set_add_bo(struct brw_context *brw, drm_intel_bo *bo); +void brw_render_cache_set_check_flush(struct brw_context *brw, drm_intel_bo *bo); + unsigned intel_quantize_num_samples(struct intel_screen *intel, unsigned num_samples);