X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=src%2Fmesa%2Fdrivers%2Fdri%2Fintel%2Fintel_context.h;h=c0f07ff1f3c87e559f48f749389e4975e6961363;hb=bdf13dc8324c391b7d34f8bdaea72c4452ab7edb;hp=7ce7c2542a311d1d914072cdbd3794bad78e89f6;hpb=4a6753926f51accd6f71d9caea18b15a99b8be24;p=mesa.git

diff --git a/src/mesa/drivers/dri/intel/intel_context.h b/src/mesa/drivers/dri/intel/intel_context.h
index 7ce7c2542a3..c0f07ff1f3c 100644
--- a/src/mesa/drivers/dri/intel/intel_context.h
+++ b/src/mesa/drivers/dri/intel/intel_context.h
@@ -129,7 +129,8 @@ struct intel_batchbuffer {
 
    uint16_t emit, total;
    uint16_t used, reserved_space;
-   uint32_t map[8192];
+   uint32_t *map;
+   uint32_t *cpu_map;
 #define BATCH_SZ (8192*sizeof(uint32_t))
 
    uint32_t state_batch_offset;
@@ -201,14 +202,30 @@ struct intel_context
       void (*create_constant_surface)(struct brw_context *brw,
 				      drm_intel_bo *bo,
 				      uint32_t offset,
-				      int width,
-				      uint32_t *out_offset);
+				      uint32_t size,
+				      uint32_t *out_offset,
+                                      bool dword_pitch);
       /** \} */
+
+      /**
+       * Send the appropriate state packets to configure depth, stencil, and
+       * HiZ buffers (i965+ only)
+       */
+      void (*emit_depth_stencil_hiz)(struct brw_context *brw,
+                                     struct intel_mipmap_tree *depth_mt,
+                                     uint32_t depth_offset,
+                                     uint32_t depthbuffer_format,
+                                     uint32_t depth_surface_type,
+                                     struct intel_mipmap_tree *stencil_mt,
+                                     bool hiz, bool separate_stencil,
+                                     uint32_t width, uint32_t height,
+                                     uint32_t tile_x, uint32_t tile_y);
+
    } vtbl;
 
    GLbitfield Fallback;  /**< mask of INTEL_FALLBACK_x bits */
    GLuint NewGLState;
-
+ 
    dri_bufmgr *bufmgr;
    unsigned int maxBatchSize;
 
@@ -219,6 +236,7 @@ struct intel_context
    int gt;
    bool needs_ff_sync;
    bool is_haswell;
+   bool is_baytrail;
    bool is_g4x;
    bool is_945;
    bool has_separate_stencil;
@@ -238,6 +256,13 @@ struct intel_context
    bool no_batch_wrap;
    bool tnl_pipeline_running; /**< Set while i915's _tnl_run_pipeline. */
 
+   /**
+    * Set if we're either a debug context or the INTEL_DEBUG=perf environment
+    * variable is set, this is the flag indicating to do expensive work that
+    * might lead to a perf_debug() call.
+    */
+   bool perf_debug;
+
    struct
    {
       GLuint id;
@@ -259,6 +284,8 @@ struct intel_context
       char buffer[4096];
    } upload;
 
+   uint32_t max_gtt_map_object_size;
+
    GLuint stats_wm;
 
    /* Offsets of fields within the current vertex:
@@ -277,6 +304,7 @@ struct intel_context
    bool no_rast;
    bool always_flush_batch;
    bool always_flush_cache;
+   bool disable_throttling;
 
    /* State for intelvb.c and inteltris.c.
     */
@@ -317,15 +345,6 @@ struct intel_context
     */
    bool is_front_buffer_reading;
 
-   /**
-    * Count of intel_regions that are mapped.
-    *
-    * This allows us to assert that no batch buffer is emitted if a
-    * region is mapped.
-    */
-   int num_mapped_regions;
-
-   bool use_texture_tiling;
    bool use_early_z;
 
    int driFd;
@@ -347,8 +366,6 @@ extern char *__progname;
 #define SUBPIXEL_X 0.125
 #define SUBPIXEL_Y 0.125
 
-#define ARRAY_SIZE(x) (sizeof(x) / sizeof(x[0]))
-
 /**
  * Align a value down to an alignment value
  *
@@ -422,7 +439,6 @@ extern int INTEL_DEBUG;
 #define DEBUG_BLIT	0x8
 #define DEBUG_MIPTREE   0x10
 #define DEBUG_PERF	0x20
-#define DEBUG_VERBOSE	0x40
 #define DEBUG_BATCH     0x80
 #define DEBUG_PIXEL     0x100
 #define DEBUG_BUFMGR    0x200
@@ -434,16 +450,14 @@ extern int INTEL_DEBUG;
 #define DEBUG_VERTS	0x8000
 #define DEBUG_DRI       0x10000
 #define DEBUG_SF        0x20000
-#define DEBUG_SANITY    0x40000
-#define DEBUG_SLEEP     0x80000
 #define DEBUG_STATS     0x100000
-#define DEBUG_TILE      0x200000
 #define DEBUG_WM        0x400000
 #define DEBUG_URB       0x800000
 #define DEBUG_VS        0x1000000
 #define DEBUG_CLIP      0x2000000
 #define DEBUG_AUB       0x4000000
 #define DEBUG_SHADER_TIME 0x8000000
+#define DEBUG_BLORP     0x10000000
 #define DEBUG_NO16      0x20000000
 
 #ifdef HAVE_ANDROID_PLATFORM
@@ -462,23 +476,29 @@ extern int INTEL_DEBUG;
 		dbg_printf(__VA_ARGS__);			\
 } while(0)
 
-#define fallback_debug(...) do {				\
-	if (unlikely(INTEL_DEBUG & DEBUG_PERF))			\
-		dbg_printf(__VA_ARGS__);			\
-} while(0)
-
 #define perf_debug(...) do {					\
-	if (unlikely(INTEL_DEBUG & DEBUG_PERF))			\
-		dbg_printf(__VA_ARGS__);			\
+   static GLuint msg_id = 0;                                    \
+   if (unlikely(INTEL_DEBUG & DEBUG_PERF))                      \
+      dbg_printf(__VA_ARGS__);                                  \
+   if (intel->perf_debug)                                       \
+      _mesa_gl_debug(&intel->ctx, &msg_id,                      \
+                     MESA_DEBUG_TYPE_PERFORMANCE,               \
+                     MESA_DEBUG_SEVERITY_MEDIUM,                \
+                     __VA_ARGS__);                              \
 } while(0)
 
 #define WARN_ONCE(cond, fmt...) do {                            \
    if (unlikely(cond)) {                                        \
       static bool _warned = false;                              \
+      static GLuint msg_id = 0;                                 \
       if (!_warned) {                                           \
          fprintf(stderr, "WARNING: ");                          \
          fprintf(stderr, fmt);                                  \
          _warned = true;                                        \
+                                                                \
+         _mesa_gl_debug(ctx, &msg_id,                           \
+                        MESA_DEBUG_TYPE_OTHER,                  \
+                        MESA_DEBUG_SEVERITY_HIGH, fmt);         \
       }                                                         \
    }                                                            \
 } while (0)
@@ -502,11 +522,14 @@ extern int INTEL_DEBUG;
  */
 
 extern bool intelInitContext(struct intel_context *intel,
-				  int api,
-                                  const struct gl_config * mesaVis,
-                                  __DRIcontext * driContextPriv,
-                                  void *sharedContextPrivate,
-                                  struct dd_function_table *functions);
+                             int api,
+                             unsigned major_version,
+                             unsigned minor_version,
+                             const struct gl_config * mesaVis,
+                             __DRIcontext * driContextPriv,
+                             void *sharedContextPrivate,
+                             struct dd_function_table *functions,
+                             unsigned *dri_ctx_error);
 
 extern void intelFinish(struct gl_context * ctx);
 extern void intel_flush_rendering_to_batch(struct gl_context *ctx);