X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=src%2Fmesa%2Fdrivers%2Fdri%2Fintel%2Fintel_context.h;h=c0f07ff1f3c87e559f48f749389e4975e6961363;hb=bdf13dc8324c391b7d34f8bdaea72c4452ab7edb;hp=958db1cade1a328895552698df484da41617f350;hpb=2f41a601455e6e0366e28b6b84871842cb4bd341;p=mesa.git diff --git a/src/mesa/drivers/dri/intel/intel_context.h b/src/mesa/drivers/dri/intel/intel_context.h index 958db1cade1..c0f07ff1f3c 100644 --- a/src/mesa/drivers/dri/intel/intel_context.h +++ b/src/mesa/drivers/dri/intel/intel_context.h @@ -203,13 +203,29 @@ struct intel_context drm_intel_bo *bo, uint32_t offset, uint32_t size, - uint32_t *out_offset); + uint32_t *out_offset, + bool dword_pitch); /** \} */ + + /** + * Send the appropriate state packets to configure depth, stencil, and + * HiZ buffers (i965+ only) + */ + void (*emit_depth_stencil_hiz)(struct brw_context *brw, + struct intel_mipmap_tree *depth_mt, + uint32_t depth_offset, + uint32_t depthbuffer_format, + uint32_t depth_surface_type, + struct intel_mipmap_tree *stencil_mt, + bool hiz, bool separate_stencil, + uint32_t width, uint32_t height, + uint32_t tile_x, uint32_t tile_y); + } vtbl; GLbitfield Fallback; /**< mask of INTEL_FALLBACK_x bits */ GLuint NewGLState; - + dri_bufmgr *bufmgr; unsigned int maxBatchSize; @@ -220,6 +236,7 @@ struct intel_context int gt; bool needs_ff_sync; bool is_haswell; + bool is_baytrail; bool is_g4x; bool is_945; bool has_separate_stencil; @@ -267,6 +284,8 @@ struct intel_context char buffer[4096]; } upload; + uint32_t max_gtt_map_object_size; + GLuint stats_wm; /* Offsets of fields within the current vertex: @@ -326,7 +345,6 @@ struct intel_context */ bool is_front_buffer_reading; - bool use_texture_tiling; bool use_early_z; int driFd;