X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=src%2Fmesa%2Fdrivers%2Fdri%2Fintel%2Fintel_tex_layout.c;h=d132e19e831b72b6270edf8dbe718f753a8f35cf;hb=dff50ff592da7cb1d784fae794dd1647a5445bca;hp=2c1b722b7f5db59c813020a71ac611b84a3721f5;hpb=38eddf04ed04966db09b67de4cdabef681dc2696;p=mesa.git

diff --git a/src/mesa/drivers/dri/intel/intel_tex_layout.c b/src/mesa/drivers/dri/intel/intel_tex_layout.c
index 2c1b722b7f5..d132e19e831 100644
--- a/src/mesa/drivers/dri/intel/intel_tex_layout.c
+++ b/src/mesa/drivers/dri/intel/intel_tex_layout.c
@@ -35,42 +35,53 @@
 #include "intel_context.h"
 #include "main/macros.h"
 
-GLuint intel_compressed_alignment(GLenum internalFormat)
+void intel_get_texture_alignment_unit(GLenum internalFormat, GLuint *w, GLuint *h)
 {
-    GLuint alignment = 4;
-
     switch (internalFormat) {
     case GL_COMPRESSED_RGB_FXT1_3DFX:
     case GL_COMPRESSED_RGBA_FXT1_3DFX:
-        alignment = 8;
+        *w = 8;
+        *h = 4;
+        break;
+
+    case GL_RGB_S3TC:
+    case GL_RGB4_S3TC:
+    case GL_COMPRESSED_RGB_S3TC_DXT1_EXT:
+    case GL_COMPRESSED_RGBA_S3TC_DXT1_EXT:
+    case GL_RGBA_S3TC:
+    case GL_RGBA4_S3TC:
+    case GL_COMPRESSED_RGBA_S3TC_DXT3_EXT:
+    case GL_COMPRESSED_RGBA_S3TC_DXT5_EXT:
+        *w = 4;
+        *h = 4;
         break;
 
     default:
+        *w = 4;
+        *h = 2;
         break;
     }
-
-    return alignment;
 }
 
 void i945_miptree_layout_2d( struct intel_context *intel,
 			     struct intel_mipmap_tree *mt,
 			     uint32_t tiling )
 {
-   GLint align_h = 2, align_w = 4;
+   GLuint align_h = 2, align_w = 4;
    GLuint level;
    GLuint x = 0;
    GLuint y = 0;
    GLuint width = mt->width0;
    GLuint height = mt->height0;
 
-   mt->pitch = mt->width0;
+   mt->total_width = mt->width0;
+   intel_get_texture_alignment_unit(mt->internal_format, &align_w, &align_h);
 
    if (mt->compressed) {
-       align_w = intel_compressed_alignment(mt->internal_format);
-       mt->pitch = ALIGN(mt->width0, align_w);
+       mt->total_width = ALIGN(mt->width0, align_w);
    }
 
-   /* May need to adjust pitch to accomodate the placement of
+   /* May need to adjust width to accomodate the placement of
     * the 2nd mipmap.  This occurs when the alignment
     * constraints of mipmap placement push the right edge of the
     * 2nd mipmap out past the width of its parent.
@@ -86,15 +97,11 @@ void i945_miptree_layout_2d( struct intel_context *intel,
                + minify(minify(mt->width0));
        }
 
-       if (mip1_width > mt->pitch) {
-           mt->pitch = mip1_width;
+       if (mip1_width > mt->total_width) {
+           mt->total_width = mip1_width;
        }
    }
 
-   /* Pitch must be a whole number of dwords, even though we
-    * express it in texels.
-    */
-   mt->pitch = intel_miptree_pitch_align (intel, mt, tiling, mt->pitch);
    mt->total_height = 0;
 
    for ( level = mt->first_level ; level <= mt->last_level ; level++ ) {