X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=src%2Fmesa%2Fdrivers%2Fdri%2Fr300%2Fcompiler%2Fradeon_opcodes.c;h=ffc91241ab8316ebe5a84fa9e11c870ffffaeefe;hb=0321f9c6f13a7571376e5eb9ce6c110061ed09fd;hp=c1c0181fac1653893d21ffe97cc754db18fc72d1;hpb=650e02003fbb5511ec758d993b7ec0a302ee2235;p=mesa.git

diff --git a/src/mesa/drivers/dri/r300/compiler/radeon_opcodes.c b/src/mesa/drivers/dri/r300/compiler/radeon_opcodes.c
index c1c0181fac1..ffc91241ab8 100644
--- a/src/mesa/drivers/dri/r300/compiler/radeon_opcodes.c
+++ b/src/mesa/drivers/dri/r300/compiler/radeon_opcodes.c
@@ -26,6 +26,7 @@
  */
 
 #include "radeon_opcodes.h"
+#include "radeon_program.h"
 
 #include "radeon_program_constants.h"
 
@@ -75,14 +76,14 @@ struct rc_opcode_info rc_opcodes[MAX_RC_OPCODE] = {
 	{
 		.Opcode = RC_OPCODE_DDX,
 		.Name = "DDX",
-		.NumSrcRegs = 1,
+		.NumSrcRegs = 2,
 		.HasDstReg = 1,
 		.IsComponentwise = 1
 	},
 	{
 		.Opcode = RC_OPCODE_DDY,
 		.Name = "DDY",
-		.NumSrcRegs = 1,
+		.NumSrcRegs = 2,
 		.HasDstReg = 1,
 		.IsComponentwise = 1
 	},
@@ -371,10 +372,11 @@ struct rc_opcode_info rc_opcodes[MAX_RC_OPCODE] = {
 };
 
 void rc_compute_sources_for_writemask(
-		const struct rc_opcode_info * opcode,
+		const struct rc_instruction *inst,
 		unsigned int writemask,
 		unsigned int *srcmasks)
 {
+	const struct rc_opcode_info * opcode = rc_get_opcode_info(inst->U.I.Opcode);
 	srcmasks[0] = 0;
 	srcmasks[1] = 0;
 	srcmasks[2] = 0;
@@ -406,21 +408,37 @@ void rc_compute_sources_for_writemask(
 			srcmasks[0] |= RC_MASK_XYZW;
 			srcmasks[1] |= RC_MASK_XYZW;
 			break;
-		case RC_OPCODE_TEX:
 		case RC_OPCODE_TXB:
 		case RC_OPCODE_TXP:
-			srcmasks[0] |= RC_MASK_XYZW;
+			srcmasks[0] |= RC_MASK_W;
+			/* Fall through */
+		case RC_OPCODE_TEX:
+			switch (inst->U.I.TexSrcTarget) {
+				case RC_TEXTURE_1D:
+					srcmasks[0] |= RC_MASK_X;
+					break;
+				case RC_TEXTURE_2D:
+				case RC_TEXTURE_RECT:
+				case RC_TEXTURE_1D_ARRAY:
+					srcmasks[0] |= RC_MASK_XY;
+					break;
+				case RC_TEXTURE_3D:
+				case RC_TEXTURE_CUBE:
+				case RC_TEXTURE_2D_ARRAY:
+					srcmasks[0] |= RC_MASK_XYZ;
+					break;
+			}
 			break;
 		case RC_OPCODE_DST:
-			srcmasks[0] |= 0x6;
-			srcmasks[1] |= 0xa;
+			srcmasks[0] |= RC_MASK_Y | RC_MASK_Z;
+			srcmasks[1] |= RC_MASK_Y | RC_MASK_W;
 			break;
 		case RC_OPCODE_EXP:
 		case RC_OPCODE_LOG:
 			srcmasks[0] |= RC_MASK_XY;
 			break;
 		case RC_OPCODE_LIT:
-			srcmasks[0] |= 0xb;
+			srcmasks[0] |= RC_MASK_X | RC_MASK_Y | RC_MASK_W;
 			break;
 		default:
 			break;