X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=src%2Fmesa%2Fdrivers%2Fdri%2Fr300%2Fr300_context.h;h=8c4ed51af506bdcbfefa1a4b6017205e6766a4e5;hb=88288b614eb89b8995cbc2ece4bbdb25b7adb191;hp=8eaff49ae3ef1e8b611ca34c11330753313e2136;hpb=3ad366dff2b8d015fe57da6a284088ccec1cea3f;p=mesa.git diff --git a/src/mesa/drivers/dri/r300/r300_context.h b/src/mesa/drivers/dri/r300/r300_context.h index 8eaff49ae3e..8c4ed51af50 100644 --- a/src/mesa/drivers/dri/r300/r300_context.h +++ b/src/mesa/drivers/dri/r300/r300_context.h @@ -27,10 +27,11 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. **************************************************************************/ -/* - * Authors: - * Keith Whitwell - * Nicolai Haehnle +/** + * \file + * + * \author Keith Whitwell + * \author Nicolai Haehnle */ #ifndef __R300_CONTEXT_H__ @@ -47,12 +48,14 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #include "colormac.h" #include "radeon_context.h" -#define USE_ARB_F_P 1 -//#define USER_BUFFERS -//#define RADEON_VTXFMT_A -//#define HW_VBOS +#define USER_BUFFERS + +/* We don't handle 16 bits elts swapping yet */ +#ifdef MESA_BIG_ENDIAN +#define FORCE_32BITS_ELTS +#endif + //#define OPTIMIZE_ELTS -#define CB_DPATH struct r300_context; typedef struct r300_context r300ContextRec; @@ -64,7 +67,7 @@ typedef struct r300_context *r300ContextPtr; /* Checkpoint.. for convenience */ #define CPT { fprintf(stderr, "%s:%s line %d\n", __FILE__, __FUNCTION__, __LINE__); } /* From http://gcc.gnu.org/onlinedocs/gcc-3.2.3/gcc/Variadic-Macros.html . - I suppose we could inline this and use macro to fetch out __LINE__ and stuff in case we run into trouble + I suppose we could inline this and use macro to fetch out __LINE__ and stuff in case we run into trouble with other compilers ... GLUE! */ #if 1 @@ -83,39 +86,33 @@ typedef struct r300_context *r300ContextPtr; #define WARN_ONCE(a, ...) {} #endif -typedef GLuint uint32_t; -typedef GLubyte uint8_t; -struct r300_fragment_program; - - /* We should probably change types within vertex_shader - and pixel_shader structure later on */ -#define CARD32 GLuint -#include "vertex_shader.h" -#if USE_ARB_F_P == 1 +#include "r300_vertprog.h" #include "r300_fragprog.h" -#else -#include "pixel_shader.h" -#endif -#undef CARD32 +/** + * This function takes a float and packs it into a uint32_t + */ static __inline__ uint32_t r300PackFloat32(float fl) { - union { float fl; uint32_t u; } u; + union { + float fl; + uint32_t u; + } u; u.fl = fl; return u.u; } - /************ DMA BUFFERS **************/ /* Need refcounting on dma buffers: */ struct r300_dma_buffer { - int refcount; /* the number of retained regions in buf */ + int refcount; /**< the number of retained regions in buf */ drmBufPtr buf; int id; }; +#undef GET_START #ifdef USER_BUFFERS #define GET_START(rvb) (r300GartOffsetFromVirtual(rmesa, (rvb)->address+(rvb)->start)) #else @@ -130,11 +127,10 @@ struct r300_dma_region { char *address; /* == buf->address */ int start, end, ptr; /* offsets from start of buf */ - int aos_offset; /* address in GART memory */ - int aos_stride; /* distance between elements, in dwords */ - int aos_size; /* number of components (1-4) */ - int aos_format; /* format of components */ - int aos_reg; /* VAP register assignment */ + int aos_offset; /* address in GART memory */ + int aos_stride; /* distance between elements, in dwords */ + int aos_size; /* number of components (1-4) */ + int aos_reg; /* VAP register assignment */ }; struct r300_dma { @@ -176,15 +172,15 @@ struct r300_tex_obj { drm_radeon_tex_image_t image[6][RADEON_MAX_TEXTURE_LEVELS]; /* Six, for the cube faces */ - - GLuint pitch; /* this isn't sent to hardware just used in calculations */ + GLuint pitch; /* this isn't sent to hardware just used in calculations */ /* hardware register values */ /* Note that R200 has 8 registers per texture and R300 only 7 */ GLuint filter; + GLuint filter_1; GLuint pitch_reg; - GLuint size; /* npot only */ + GLuint size; /* npot only */ GLuint format; - GLuint offset; /* Image location in the card's address space. + GLuint offset; /* Image location in the card's address space. All cube faces follow. */ GLuint unknown4; GLuint unknown5; @@ -198,8 +194,9 @@ struct r300_tex_obj { GLuint pp_cubic_faces; /* cube face 1,2,3,4 log2 sizes */ GLuint format_x; - GLboolean border_fallback; + + GLuint tile_bits; /* hw texture tile bits used on this texture */ }; struct r300_texture_env_state { @@ -208,11 +205,14 @@ struct r300_texture_env_state { GLenum envMode; }; +/* The blit width for texture uploads + */ +#define R300_BLIT_WIDTH_BYTES 1024 #define R300_MAX_TEXTURE_UNITS 8 struct r300_texture_state { struct r300_texture_env_state unit[R300_MAX_TEXTURE_UNITS]; - int tc_count; /* number of incoming texture coordinates from VAP */ + int tc_count; /* number of incoming texture coordinates from VAP */ }; /** @@ -224,16 +224,15 @@ struct r300_texture_state { */ struct r300_state_atom { struct r300_state_atom *next, *prev; - const char* name; /* for debug */ + const char *name; /* for debug */ int cmd_size; /* maximum size in dwords */ GLuint idx; /* index in an array (e.g. textures) */ - uint32_t* cmd; + uint32_t *cmd; GLboolean dirty; - int (*check)(r300ContextPtr, struct r300_state_atom* atom); + int (*check) (r300ContextPtr, struct r300_state_atom * atom); }; - #define R300_VPT_CMD_0 0 #define R300_VPT_XSCALE 1 #define R300_VPT_XOFFSET 2 @@ -243,7 +242,7 @@ struct r300_state_atom { #define R300_VPT_ZOFFSET 6 #define R300_VPT_CMDSIZE 7 -#define R300_VIR_CMD_0 0 /* vir is variable size (at least 1) */ +#define R300_VIR_CMD_0 0 /* vir is variable size (at least 1) */ #define R300_VIR_CNTL_0 1 #define R300_VIR_CNTL_1 2 #define R300_VIR_CNTL_2 3 @@ -264,7 +263,6 @@ struct r300_state_atom { #define R300_VOF_CNTL_1 2 #define R300_VOF_CMDSIZE 3 - #define R300_PVS_CMD_0 0 #define R300_PVS_CNTL_1 1 #define R300_PVS_CNTL_2 2 @@ -314,7 +312,7 @@ struct r300_state_atom { #define R300_RI_INTERP_7 8 #define R300_RI_CMDSIZE 9 -#define R300_RR_CMD_0 0 /* rr is variable size (at least 1) */ +#define R300_RR_CMD_0 0 /* rr is variable size (at least 1) */ #define R300_RR_ROUTE_0 1 #define R300_RR_ROUTE_1 2 #define R300_RR_ROUTE_2 3 @@ -348,6 +346,21 @@ struct r300_state_atom { #define R300_FPP_PARAM_0 1 #define R300_FPP_CMDSIZE (32*4+1) +#define R300_FOGS_CMD_0 0 +#define R300_FOGS_STATE 1 +#define R300_FOGS_CMDSIZE 2 + +#define R300_FOGC_CMD_0 0 +#define R300_FOGC_R 1 +#define R300_FOGC_G 2 +#define R300_FOGC_B 3 +#define R300_FOGC_CMDSIZE 4 + +#define R300_FOGP_CMD_0 0 +#define R300_FOGP_SCALE 1 +#define R300_FOGP_START 2 +#define R300_FOGP_CMDSIZE 3 + #define R300_AT_CMD_0 0 #define R300_AT_ALPHA_TEST 1 #define R300_AT_UNKNOWN 2 @@ -381,11 +394,11 @@ struct r300_state_atom { #define R300_VPI_CMD_0 0 #define R300_VPI_INSTR_0 1 -#define R300_VPI_CMDSIZE 1025 /* 256 16 byte instructions */ +#define R300_VPI_CMDSIZE 1025 /* 256 16 byte instructions */ #define R300_VPP_CMD_0 0 #define R300_VPP_PARAM_0 1 -#define R300_VPP_CMDSIZE 1025 /* 256 4-component parameters */ +#define R300_VPP_CMDSIZE 1025 /* 256 4-component parameters */ #define R300_VPS_CMD_0 0 #define R300_VPS_ZERO_0 1 @@ -407,62 +420,64 @@ struct r300_state_atom { struct r300_hw_state { struct r300_state_atom atomlist; - GLboolean is_dirty; - GLboolean all_dirty; - int max_state_size; /* in dwords */ + GLboolean is_dirty; + GLboolean all_dirty; + int max_state_size; /* in dwords */ struct r300_state_atom vpt; /* viewport (1D98) */ - struct r300_state_atom unk2080; /* (2080) */ - struct r300_state_atom vof; /* VAP output format register 0x2090 */ + struct r300_state_atom vap_cntl; + struct r300_state_atom vof; /* VAP output format register 0x2090 */ struct r300_state_atom vte; /* (20B0) */ struct r300_state_atom unk2134; /* (2134) */ - struct r300_state_atom unk2140; /* (2140) */ + struct r300_state_atom vap_cntl_status; struct r300_state_atom vir[2]; /* vap input route (2150/21E0) */ struct r300_state_atom vic; /* vap input control (2180) */ - struct r300_state_atom unk21DC; /* (21DC) */ - struct r300_state_atom unk221C; /* (221C) */ - struct r300_state_atom unk2220; /* (2220) */ - struct r300_state_atom unk2288; /* (2288) */ + struct r300_state_atom unk21DC; /* (21DC) */ + struct r300_state_atom unk221C; /* (221C) */ + struct r300_state_atom unk2220; /* (2220) */ + struct r300_state_atom unk2288; /* (2288) */ struct r300_state_atom pvs; /* pvs_cntl (22D0) */ - struct r300_state_atom gb_enable; /* (4008) */ - struct r300_state_atom gb_misc; /* Multisampling position shifts ? (4010) */ - struct r300_state_atom unk4200; /* (4200) */ - struct r300_state_atom unk4214; /* (4214) */ + struct r300_state_atom gb_enable; /* (4008) */ + struct r300_state_atom gb_misc; /* Multisampling position shifts ? (4010) */ + struct r300_state_atom unk4200; /* (4200) */ + struct r300_state_atom unk4214; /* (4214) */ struct r300_state_atom ps; /* pointsize (421C) */ - struct r300_state_atom unk4230; /* (4230) */ + struct r300_state_atom unk4230; /* (4230) */ struct r300_state_atom lcntl; /* line control */ - struct r300_state_atom unk4260; /* (4260) */ - struct r300_state_atom unk4274; /* (4274) */ - struct r300_state_atom unk4288; /* (4288) */ - struct r300_state_atom unk42A0; /* (42A0) */ + struct r300_state_atom unk4260; /* (4260) */ + struct r300_state_atom shade; + struct r300_state_atom polygon_mode; + struct r300_state_atom fogp; /* fog parameters (4294) */ + struct r300_state_atom unk429C; /* (429C) */ + struct r300_state_atom zbias_cntl; struct r300_state_atom zbs; /* zbias (42A4) */ - struct r300_state_atom unk42B4; /* (42B4) */ + struct r300_state_atom occlusion_cntl; struct r300_state_atom cul; /* cull cntl (42B8) */ - struct r300_state_atom unk42C0; /* (42C0) */ + struct r300_state_atom unk42C0; /* (42C0) */ struct r300_state_atom rc; /* rs control (4300) */ struct r300_state_atom ri; /* rs interpolators (4310) */ struct r300_state_atom rr; /* rs route (4330) */ struct r300_state_atom unk43A4; /* (43A4) */ struct r300_state_atom unk43E8; /* (43E8) */ struct r300_state_atom fp; /* fragment program cntl + nodes (4600) */ - struct r300_state_atom fpt; /* texi - (4620) */ + struct r300_state_atom fpt; /* texi - (4620) */ struct r300_state_atom unk46A4; /* (46A4) */ struct r300_state_atom fpi[4]; /* fp instructions (46C0/47C0/48C0/49C0) */ - struct r300_state_atom unk4BC0; /* (4BC0) */ - struct r300_state_atom unk4BC8; /* (4BC8) */ + struct r300_state_atom fogs; /* fog state (4BC0) */ + struct r300_state_atom fogc; /* fog color (4BC8) */ struct r300_state_atom at; /* alpha test (4BD4) */ struct r300_state_atom unk4BD8; /* (4BD8) */ - struct r300_state_atom fpp; /* 0x4C00 and following */ + struct r300_state_atom fpp; /* 0x4C00 and following */ struct r300_state_atom unk4E00; /* (4E00) */ struct r300_state_atom bld; /* blending (4E04) */ struct r300_state_atom cmk; /* colormask (4E0C) */ - struct r300_state_atom unk4E10; /* constant blend color + ??? (4E10) */ + struct r300_state_atom blend_color; /* constant blend color */ struct r300_state_atom cb; /* colorbuffer (4E28) */ struct r300_state_atom unk4E50; /* (4E50) */ struct r300_state_atom unk4E88; /* (4E88) */ struct r300_state_atom unk4EA0; /* (4E88) I saw it only written on RV350 hardware.. */ struct r300_state_atom zs; /* zstencil control (4F00) */ - struct r300_state_atom unk4F10; /* (4F10) */ + struct r300_state_atom zstencil_format; struct r300_state_atom zb; /* z buffer (4F20) */ struct r300_state_atom unk4F28; /* (4F28) */ struct r300_state_atom unk4F30; /* (4F30) */ @@ -472,25 +487,24 @@ struct r300_hw_state { struct r300_state_atom vpi; /* vp instructions */ struct r300_state_atom vpp; /* vp parameters */ struct r300_state_atom vps; /* vertex point size (?) */ - /* 8 texture units */ - /* the state is grouped by function and not by - texture unit. This makes single unit updates - really awkward - we are much better off - updating the whole thing at once */ + /* 8 texture units */ + /* the state is grouped by function and not by + texture unit. This makes single unit updates + really awkward - we are much better off + updating the whole thing at once */ struct { struct r300_state_atom filter; - struct r300_state_atom unknown1; + struct r300_state_atom filter_1; struct r300_state_atom size; struct r300_state_atom format; struct r300_state_atom pitch; struct r300_state_atom offset; - struct r300_state_atom unknown4; + struct r300_state_atom chroma_key; struct r300_state_atom border_color; - } tex; + } tex; struct r300_state_atom txe; /* tex enable (4104) */ }; - /** * This structure holds the command buffer while it is being constructed. * @@ -499,13 +513,12 @@ struct r300_hw_state { * otherwise. */ struct r300_cmdbuf { - int size; /* DWORDs allocated for buffer */ - uint32_t* cmd_buf; - int count_used; /* DWORDs filled so far */ - int count_reemit; /* size of re-emission batch */ + int size; /* DWORDs allocated for buffer */ + uint32_t *cmd_buf; + int count_used; /* DWORDs filled so far */ + int count_reemit; /* size of re-emission batch */ }; - /** * State cache */ @@ -520,34 +533,26 @@ struct r300_stencilbuffer_state { }; -struct r300_vap_reg_state { - /* input register assigments */ - int i_coords; - int i_normal; - int i_color[2]; - int i_fog; - int i_tex[R300_MAX_TEXTURE_UNITS]; - int i_index; - int i_pointsize; - }; - /* Vertex shader state */ /* Perhaps more if we store programs in vmem? */ -#define VSF_MAX_FRAGMENT_LENGTH (256*4) - +/* drm_r300_cmd_header_t->vpu->count is unsigned char */ +#define VSF_MAX_FRAGMENT_LENGTH (255*4) + /* Can be tested with colormat currently. */ #define VSF_MAX_FRAGMENT_TEMPS (14) +#define STATE_R300_WINDOW_DIMENSION (STATE_INTERNAL_DRIVER+0) +#define STATE_R300_TEXRECT_FACTOR (STATE_INTERNAL_DRIVER+1) struct r300_vertex_shader_fragment { int length; union { GLuint d[VSF_MAX_FRAGMENT_LENGTH]; float f[VSF_MAX_FRAGMENT_LENGTH]; - VERTEX_SHADER_INSTRUCTION i[VSF_MAX_FRAGMENT_LENGTH/4]; - } body; - }; + VERTEX_SHADER_INSTRUCTION i[VSF_MAX_FRAGMENT_LENGTH / 4]; + } body; +}; #define VSF_DEST_PROGRAM 0x0 #define VSF_DEST_MATRIX0 0x200 @@ -561,64 +566,155 @@ struct r300_vertex_shader_fragment { struct r300_vertex_shader_state { struct r300_vertex_shader_fragment program; - /* a bit of a waste - each uses only a subset of allocated space.. - but easier to program */ - struct r300_vertex_shader_fragment matrix[3]; - struct r300_vertex_shader_fragment vector[2]; - struct r300_vertex_shader_fragment unknown1; struct r300_vertex_shader_fragment unknown2; int program_start; - int unknown_ptr1; /* pointer within program space */ + int unknown_ptr1; /* pointer within program space */ int program_end; int param_offset; int param_count; - int unknown_ptr2; /* pointer within program space */ - int unknown_ptr3; /* pointer within program space */ - }; - -extern int hw_tcl_on; + int unknown_ptr2; /* pointer within program space */ + int unknown_ptr3; /* pointer within program space */ +}; -#define CURRENT_VERTEX_SHADER(ctx) (ctx->VertexProgram._Current) +extern int hw_tcl_on; -//#define TMU_ENABLED(ctx, unit) (hw_tcl_on ? ctx->Texture.Unit[unit]._ReallyEnabled && (OutputsWritten & (1<<(VERT_RESULT_TEX0+(unit)))) : -// (r300->state.render_inputs & (_TNL_BIT_TEX0<<(unit)))) -//#define TMU_ENABLED(ctx, unit) (hw_tcl_on ? ctx->Texture.Unit[unit]._ReallyEnabled && OutputsWritten & (1<<(VERT_RESULT_TEX0+(unit))) : -// ctx->Texture.Unit[unit]._ReallyEnabled && r300->state.render_inputs & (_TNL_BIT_TEX0<<(unit))) +//#define CURRENT_VERTEX_SHADER(ctx) (ctx->VertexProgram._Current) +#define CURRENT_VERTEX_SHADER(ctx) (R300_CONTEXT(ctx)->selected_vp) -#define TMU_ENABLED(ctx, unit) (ctx->Texture.Unit[unit]._ReallyEnabled) +/* Should but doesnt work */ +//#define CURRENT_VERTEX_SHADER(ctx) (R300_CONTEXT(ctx)->curr_vp) /* r300_vertex_shader_state and r300_vertex_program should probably be merged together someday. * Keeping them them seperate for now should ensure fixed pipeline keeps functioning properly. - */ + */ + +struct r300_vertex_program_key { + GLuint InputsRead; + GLuint OutputsWritten; +}; + struct r300_vertex_program { - struct vertex_program mesa_program; /* Must be first */ + struct r300_vertex_program *next; + struct r300_vertex_program_key key; int translated; - + struct r300_vertex_shader_fragment program; - struct r300_vertex_shader_fragment params; - + int pos_end; - int num_temporaries; /* Number of temp vars used by program */ + int num_temporaries; /* Number of temp vars used by program */ + int wpos_idx; int inputs[VERT_ATTRIB_MAX]; int outputs[VERT_RESULT_MAX]; + int native; + int ref_count; + int use_ref_count; +}; + +struct r300_vertex_program_cont { + struct gl_vertex_program mesa_program; /* Must be first */ + struct r300_vertex_shader_fragment params; + struct r300_vertex_program *progs; }; -#if USE_ARB_F_P == 1 #define PFS_MAX_ALU_INST 64 #define PFS_MAX_TEX_INST 64 #define PFS_MAX_TEX_INDIRECT 4 #define PFS_NUM_TEMP_REGS 32 -#define PFS_NUM_CONST_REGS 32 +#define PFS_NUM_CONST_REGS 16 + +/* Mapping Mesa registers to R300 temporaries */ +struct reg_acc { + int reg; /* Assigned hw temp */ + unsigned int refcount; /* Number of uses by mesa program */ +}; + +/** + * Describe the current lifetime information for an R300 temporary + */ +struct reg_lifetime { + /* Index of the first slot where this register is free in the sense + that it can be used as a new destination register. + This is -1 if the register has been assigned to a Mesa register + and the last access to the register has not yet been emitted */ + int free; + + /* Index of the first slot where this register is currently reserved. + This is used to stop e.g. a scalar operation from being moved + before the allocation time of a register that was first allocated + for a vector operation. */ + int reserved; + + /* Index of the first slot in which the register can be used as a + source without losing the value that is written by the last + emitted instruction that writes to the register */ + int vector_valid; + int scalar_valid; + + /* Index to the slot where the register was last read. + This is also the first slot in which the register may be written again */ + int vector_lastread; + int scalar_lastread; +}; + +/** + * Store usage information about an ALU instruction slot during the + * compilation of a fragment program. + */ +#define SLOT_SRC_VECTOR (1<<0) +#define SLOT_SRC_SCALAR (1<<3) +#define SLOT_SRC_BOTH (SLOT_SRC_VECTOR | SLOT_SRC_SCALAR) +#define SLOT_OP_VECTOR (1<<16) +#define SLOT_OP_SCALAR (1<<17) +#define SLOT_OP_BOTH (SLOT_OP_VECTOR | SLOT_OP_SCALAR) + +struct r300_pfs_compile_slot { + /* Bitmask indicating which parts of the slot are used, using SLOT_ constants + defined above */ + unsigned int used; + + /* Selected sources */ + int vsrc[3]; + int ssrc[3]; +}; + +/** + * Store information during compilation of fragment programs. + */ +struct r300_pfs_compile_state { + int nrslots; /* number of ALU slots used so far */ + + /* Track which (parts of) slots are already filled with instructions */ + struct r300_pfs_compile_slot slot[PFS_MAX_ALU_INST]; + + /* Track the validity of R300 temporaries */ + struct reg_lifetime hwtemps[PFS_NUM_TEMP_REGS]; + + /* Used to map Mesa's inputs/temps onto hardware temps */ + int temp_in_use; + struct reg_acc temps[PFS_NUM_TEMP_REGS]; + struct reg_acc inputs[32]; /* don't actually need 32... */ + + /* Track usage of hardware temps, for register allocation, + * indirection detection, etc. */ + GLuint used_in_node; + GLuint dest_in_node; +}; + +/** + * Store everything about a fragment program that is needed + * to render with that program. + */ struct r300_fragment_program { - struct fragment_program mesa_program; + struct gl_fragment_program mesa_program; GLcontext *ctx; GLboolean translated; GLboolean error; + struct r300_pfs_compile_state *cs; struct { int length; @@ -633,14 +729,13 @@ struct r300_fragment_program { GLuint inst3; } inst[PFS_MAX_ALU_INST]; } alu; - int v_pos; - int s_pos; struct { int tex_offset; int tex_end; int alu_offset; int alu_end; + int flags; } node[4]; int cur_node; int first_node_has_tex; @@ -650,98 +745,24 @@ struct r300_fragment_program { int tex_offset; int tex_end; - /* Hardware constants */ - GLfloat constant[PFS_NUM_CONST_REGS][4]; + /* Hardware constants. + * Contains a pointer to the value. The destination of the pointer + * is supposed to be updated when GL state changes. + * Typically, this is either a pointer into + * gl_program_parameter_list::ParameterValues, or a pointer to a + * global constant (e.g. for sin/cos-approximation) + */ + const GLfloat *constant[PFS_NUM_CONST_REGS]; int const_nr; - /* Tracked parameters */ - struct { - int idx; /* hardware index */ - GLfloat *values; /* pointer to values */ - } param[PFS_NUM_CONST_REGS]; - int param_nr; - GLboolean params_uptodate; - - GLuint temps[PFS_NUM_TEMP_REGS]; - int temp_in_use; - GLuint used_in_node; - GLuint dest_in_node; - GLuint inputs[32]; /* don't actually need 32... */ - - int hwreg_in_use; int max_temp_idx; -}; - -#else -/* 64 appears to be the maximum */ -#define PSF_MAX_PROGRAM_LENGTH 64 - -struct r300_pixel_shader_program { - struct { - int length; - GLuint inst[PSF_MAX_PROGRAM_LENGTH]; - } tex; - - /* ALU intructions (logic and integer) */ - struct { - int length; - struct { - GLuint inst0; - GLuint inst1; - GLuint inst2; - GLuint inst3; - } inst[PSF_MAX_PROGRAM_LENGTH]; - } alu; - - /* node information */ - /* nodes are used to synchronize ALU and TEX streams */ - /* There could be up to 4 nodes each consisting of - a number of TEX instructions followed by some ALU - instructions */ - /* the last node of a program should always be node3 */ - struct { - int tex_offset; - int tex_end; - int alu_offset; - int alu_end; - } node[4]; - - int active_nodes; /* must be between 1 and 4, inclusive */ - int first_node_has_tex; /* other nodes always have it */ - int temp_register_count; /* magic value goes into PFS_CNTL_1 */ - - /* entire program */ - int tex_offset; - int tex_end; - int alu_offset; - int alu_end; - - }; + GLuint optimization; +}; -#define MAX_PIXEL_SHADER_PARAMS 32 -struct r300_pixel_shader_state { - struct r300_pixel_shader_program program; - - int translated; - int have_sample; - GLuint color_reg; - GLuint src_previous; - - /* parameters */ - int param_length; /* to limit the number of unnecessary writes */ - struct { - float x; - float y; - float z; - float w; - } param[MAX_PIXEL_SHADER_PARAMS]; - }; -#endif // USE_ARB_F_P - -/* 8 is somewhat bogus... it is probably something like 24 */ #define R300_MAX_AOS_ARRAYS 16 +#define AOS_FORMAT_USHORT 0 #define AOS_FORMAT_FLOAT 1 #define AOS_FORMAT_UBYTE 2 #define AOS_FORMAT_FLOAT_COLOR 3 @@ -750,7 +771,6 @@ struct r300_pixel_shader_state { #define REG_COLOR0 1 #define REG_TEX0 2 -#ifdef USER_BUFFERS struct dt { GLint size; GLenum type; @@ -762,69 +782,69 @@ struct radeon_vertex_buffer { int Count; void *Elts; int elt_size; - int elt_min, elt_max; /* debug */ - + int elt_min, elt_max; /* debug */ + struct dt AttribPtr[VERT_ATTRIB_MAX]; - - struct tnl_prim *Primitive; - GLuint PrimitiveCount; + + const struct _mesa_prim *Primitive; + GLuint PrimitiveCount; GLint LockFirst; GLsizei LockCount; int lock_uptodate; }; -#endif struct r300_aos_rec { GLuint offset; - int element_size; /* in dwords */ - int stride; /* distance between elements, in dwords */ + int element_size; /* in dwords */ + int stride; /* distance between elements, in dwords */ int format; - int ncomponents; /* number of components - between 1 and 4, inclusive */ + int ncomponents; /* number of components - between 1 and 4, inclusive */ - int reg; /* which register they are assigned to. */ + int reg; /* which register they are assigned to. */ - }; +}; struct r300_state { struct r300_depthbuffer_state depth; struct r300_texture_state texture; - struct r300_vap_reg_state vap_reg; + int sw_tcl_inputs[VERT_ATTRIB_MAX]; struct r300_vertex_shader_state vertex_shader; -#if USE_ARB_F_P == 0 - struct r300_pixel_shader_state pixel_shader; -#endif + struct r300_pfs_compile_state pfs_compile; struct r300_dma_region aos[R300_MAX_AOS_ARRAYS]; int aos_count; -#ifdef USER_BUFFERS struct radeon_vertex_buffer VB; -#endif GLuint *Elts; struct r300_dma_region elt_dma; - - GLuint render_inputs; /* actual render inputs that R300 was configured for. - They are the same as tnl->render_inputs for fixed pipeline */ - + + DECLARE_RENDERINPUTS(render_inputs_bitset); /* actual render inputs that R300 was configured for. + They are the same as tnl->render_inputs for fixed pipeline */ + struct { - int transform_offset; /* Transform matrix offset, -1 if none */ - } vap_param; /* vertex processor parameter allocation - tells where to write parameters */ - + int transform_offset; /* Transform matrix offset, -1 if none */ + } vap_param; /* vertex processor parameter allocation - tells where to write parameters */ + struct r300_stencilbuffer_state stencil; - + }; +#define R300_FALLBACK_NONE 0 +#define R300_FALLBACK_TCL 1 +#define R300_FALLBACK_RAST 2 /** - * R300 context structure. + * \brief R300 context structure. */ struct r300_context { - struct radeon_context radeon; /* parent class, must be first */ + struct radeon_context radeon; /* parent class, must be first */ struct r300_hw_state hw; struct r300_cmdbuf cmdbuf; struct r300_state state; + struct gl_vertex_program *curr_vp; + struct r300_vertex_program *selected_vp; /* Vertex buffers */ @@ -845,49 +865,42 @@ struct r300_context { GLuint prefer_gart_client_texturing; #ifdef USER_BUFFERS - key_t mm_ipc_key; - int mm_shm_id; - int mm_sem_id; - struct radeon_memory_manager *rmm; + struct r300_memory_manager *rmm; + GLvector4f dummy_attrib[_TNL_ATTRIB_MAX]; + GLvector4f *temp_attrib[_TNL_ATTRIB_MAX]; #endif + + GLboolean texmicrotile; + GLboolean disable_lowimpact_fallback; }; struct r300_buffer_object { struct gl_buffer_object mesa_obj; int id; }; - + #define R300_CONTEXT(ctx) ((r300ContextPtr)(ctx->DriverCtx)) -static __inline GLuint r300PackColor( GLuint cpp, - GLubyte r, GLubyte g, - GLubyte b, GLubyte a ) -{ - switch ( cpp ) { - case 2: - return PACK_COLOR_565( r, g, b ); - case 4: - return PACK_COLOR_8888( r, g, b, a ); - default: - return 0; - } -} extern void r300DestroyContext(__DRIcontextPrivate * driContextPriv); extern GLboolean r300CreateContext(const __GLcontextModes * glVisual, __DRIcontextPrivate * driContextPriv, void *sharedContextPrivate); -void translate_vertex_shader(struct r300_vertex_program *vp); -extern void r300InitShaderFuncs(struct dd_function_table *functions); -extern int r300VertexProgUpdateParams(GLcontext *ctx, struct r300_vertex_program *vp, float *dst); -extern GLboolean r300Fallback(GLcontext *ctx); +extern int r300NumVerts(r300ContextPtr rmesa, int num_verts, int prim); -#ifdef RADEON_VTXFMT_A -extern void radeon_init_vtxfmt_a(r300ContextPtr rmesa); -#endif - -#ifdef HW_VBOS -extern void r300_init_vbo_funcs(struct dd_function_table *functions); -#endif +extern void r300SelectVertexShader(r300ContextPtr r300); +extern void r300InitShaderFuncs(struct dd_function_table *functions); +extern int r300VertexProgUpdateParams(GLcontext * ctx, + struct r300_vertex_program_cont *vp, + float *dst); +extern int r300Fallback(GLcontext * ctx); + +extern GLboolean r300RunRender(GLcontext * ctx, + struct tnl_pipeline_stage *stage); + +#define RADEON_D_CAPTURE 0 +#define RADEON_D_PLAYBACK 1 +#define RADEON_D_PLAYBACK_RAW 2 +#define RADEON_D_T 3 #endif /* __R300_CONTEXT_H__ */