X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=src%2Fmesa%2Fdrivers%2Fdri%2Fr600%2Fr600_context.h;h=9397ecde81b281d31f65e13707b2b467562b86c9;hb=3594b53c0173ac810106f667604bf94b5cfc4a1e;hp=4373254dd684f182963cc8b4b12a48da4e0f98ae;hpb=73fc09a7bf5c63b595251dc10997891c72ecb119;p=mesa.git

diff --git a/src/mesa/drivers/dri/r600/r600_context.h b/src/mesa/drivers/dri/r600/r600_context.h
index 4373254dd68..9397ecde81b 100644
--- a/src/mesa/drivers/dri/r600/r600_context.h
+++ b/src/mesa/drivers/dri/r600/r600_context.h
@@ -51,14 +51,11 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #include "r700_chip.h"
 #include "r600_tex.h"
 #include "r700_oglprog.h"
+#include "r700_vertprog.h"
 
 struct r600_context;
 typedef struct r600_context context_t;
 
-GLboolean r700SendPSState(context_t *context);
-GLboolean r700SendVSState(context_t *context);
-GLboolean r700SendSQConfig(context_t *context);
-
 #include "main/mm.h"
 
 /************ DMA BUFFERS **************/
@@ -89,27 +86,44 @@ extern int hw_tcl_on;
 #include "tnl_dd/t_dd_vertex.h"
 #undef TAG
 
-#define PFS_MAX_ALU_INST	64
-#define PFS_MAX_TEX_INST	64
-#define PFS_MAX_TEX_INDIRECT 4
-#define PFS_NUM_TEMP_REGS	32
-#define PFS_NUM_CONST_REGS	16
-
-#define R600_MAX_AOS_ARRAYS		16
-
-#define REG_COORDS	0
-#define REG_COLOR0	1
-#define REG_TEX0	2
-
 #define R600_FALLBACK_NONE 0
 #define R600_FALLBACK_TCL 1
 #define R600_FALLBACK_RAST 2
 
-enum 
-{
-    NO_SHIFT    = 0,
-    LEFT_SHIFT  = 1,
-    RIGHT_SHIFT = 2,
+struct r600_hw_state {
+	struct radeon_state_atom sq;
+	struct radeon_state_atom db;
+	struct radeon_state_atom stencil;
+	struct radeon_state_atom db_target;
+	struct radeon_state_atom sc;
+	struct radeon_state_atom scissor;
+	struct radeon_state_atom aa;
+	struct radeon_state_atom cl;
+	struct radeon_state_atom gb;
+	struct radeon_state_atom ucp;
+	struct radeon_state_atom su;
+	struct radeon_state_atom poly;
+	struct radeon_state_atom cb;
+	struct radeon_state_atom clrcmp;
+	struct radeon_state_atom blnd;
+	struct radeon_state_atom blnd_clr;
+	struct radeon_state_atom cb_target;
+	struct radeon_state_atom sx;
+	struct radeon_state_atom vgt;
+	struct radeon_state_atom spi;
+	struct radeon_state_atom vpt;
+
+	struct radeon_state_atom fs;
+	struct radeon_state_atom vs;
+	struct radeon_state_atom ps;
+
+	struct radeon_state_atom vs_consts;
+	struct radeon_state_atom ps_consts;
+
+	struct radeon_state_atom vtx;
+	struct radeon_state_atom tx;
+	struct radeon_state_atom tx_smplr;
+	struct radeon_state_atom tx_brdr_clr;
 };
 
 /**
@@ -121,6 +135,10 @@ struct r600_context {
 	/* ------ */
 	R700_CHIP_CONTEXT hw;
 
+	struct r600_hw_state atoms;
+
+	struct r700_vertex_program *selected_vp;
+
 	/* Vertex buffers
 	 */
 	GLvector4f dummy_attrib[_TNL_ATTRIB_MAX];
@@ -131,22 +149,24 @@ struct r600_context {
 #define R700_CONTEXT(ctx)		((context_t *)(ctx->DriverCtx))
 #define GL_CONTEXT(context)     ((GLcontext *)(context->radeon.glCtx))
 
-extern void r600DestroyContext(__DRIcontextPrivate * driContextPriv);
 extern GLboolean r600CreateContext(const __GLcontextModes * glVisual,
 				   __DRIcontextPrivate * driContextPriv,
 				   void *sharedContextPrivate);
 
 #define R700_CONTEXT_STATES(context) ((R700_CHIP_CONTEXT *)(&context->hw))
 
-extern GLboolean r700InitChipObject(context_t *context);
-extern GLboolean r700SendContextStates(context_t *context);
-extern GLboolean r700SendViewportState(context_t *context, int id);
-extern GLboolean r700SendRenderTargetState(context_t *context, int id);
-extern GLboolean r700SendTextureState(context_t *context);
-extern GLboolean r700SendDepthTargetState(context_t *context);
-extern GLboolean r700SendUCPState(context_t *context);
-extern GLboolean r700SendFSState(context_t *context);
-extern void r700EmitState(GLcontext * ctx);
+#define R600_NEWPRIM( rmesa )			\
+do {						\
+	if ( rmesa->radeon.dma.flush )			\
+		rmesa->radeon.dma.flush( rmesa->radeon.glCtx );	\
+} while (0)
+
+#define R600_STATECHANGE(r600, ATOM)			\
+do {							\
+	R600_NEWPRIM(r600);					\
+	r600->atoms.ATOM.dirty = GL_TRUE;					\
+	r600->radeon.hw.is_dirty = GL_TRUE;			\
+} while(0)
 
 extern GLboolean r700SyncSurf(context_t *context,
 			      struct radeon_bo *pbo,
@@ -154,13 +174,9 @@ extern GLboolean r700SyncSurf(context_t *context,
 			      uint32_t write_domain,
 			      uint32_t sync_type);
 
-extern int       r700SetupStreams(GLcontext * ctx);
-extern void      r700SetupVTXConstants(GLcontext  * ctx, 
-				       unsigned int nStreamID,
-				       void *       pAos,
-				       unsigned int size,      /* number of elements in vector */
-				       unsigned int stride,
-				       unsigned int Count);    /* number of vectors in stream */
+extern void r700SetupStreams(GLcontext * ctx);
+extern void r700Start3D(context_t *context);
+extern void r600InitAtoms(context_t *context);
 
 #define RADEON_D_CAPTURE 0
 #define RADEON_D_PLAYBACK 1