X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=src%2Fmesa%2Fdrivers%2Fdri%2Fr600%2Fr700_state.c;h=124469b5a6953b6cbc2d773d3266aba6ca3344a7;hb=f0f04cd12db156ec53b7ea46fae27199af121f90;hp=835b5e18c2cb5bb2a1e7b1210830433aa6b710d3;hpb=a512985fd81c1ed4ccc5e69aaa05015cf7ff844d;p=mesa.git

diff --git a/src/mesa/drivers/dri/r600/r700_state.c b/src/mesa/drivers/dri/r600/r700_state.c
index 835b5e18c2c..1ff233d91ee 100644
--- a/src/mesa/drivers/dri/r600/r700_state.c
+++ b/src/mesa/drivers/dri/r600/r700_state.c
@@ -26,7 +26,6 @@
 
 #include "main/glheader.h"
 #include "main/mtypes.h"
-#include "main/state.h"
 #include "main/imports.h"
 #include "main/enums.h"
 #include "main/macros.h"
@@ -36,17 +35,15 @@
 
 #include "tnl/tnl.h"
 #include "tnl/t_pipeline.h"
-#include "tnl/t_vp_build.h"
 #include "swrast/swrast.h"
 #include "swrast_setup/swrast_setup.h"
 #include "main/api_arrayelt.h"
-#include "main/state.h"
 #include "main/framebuffer.h"
+#include "drivers/common/meta.h"
 
 #include "shader/prog_parameter.h"
 #include "shader/prog_statevars.h"
 #include "vbo/vbo.h"
-#include "main/texformat.h"
 
 #include "r600_context.h"
 
@@ -55,81 +52,29 @@
 #include "r700_fragprog.h"
 #include "r700_vertprog.h"
 
-
+void r600UpdateTextureState(GLcontext * ctx);
 static void r700SetClipPlaneState(GLcontext * ctx, GLenum cap, GLboolean state);
 static void r700UpdatePolygonMode(GLcontext * ctx);
 static void r700SetPolygonOffsetState(GLcontext * ctx, GLboolean state);
 static void r700SetStencilState(GLcontext * ctx, GLboolean state);
-static void r700SetRenderTarget(context_t *context, int id);
-static void r700SetDepthTarget(context_t *context);
-
-void r700SetDefaultStates(context_t *context) //--------------------
-{
-    
-}
+static void r700UpdateWindow(GLcontext * ctx, int id);
 
-void r700UpdateShaders (GLcontext * ctx)  //----------------------------------
+void r700UpdateShaders(GLcontext * ctx)
 {
     context_t *context = R700_CONTEXT(ctx);
 
-    GLvector4f dummy_attrib[_TNL_ATTRIB_MAX];
-    GLvector4f *temp_attrib[_TNL_ATTRIB_MAX];
-    int i;
-
-    if (ctx->FragmentProgram._Current) {
-	    struct r700_fragment_program *fp = (struct r700_fragment_program *)
-		    (ctx->FragmentProgram._Current);
-	    if (context->radeon.radeonScreen->chip_family < CHIP_FAMILY_RV770)
-	    {
-		    fp->r700AsmCode.bR6xx = 1;
-	    }
-
-	    if(GL_FALSE == fp->translated)
-	    {
-		    if( GL_FALSE == r700TranslateFragmentShader(fp, &(fp->mesa_program)) )
-		    {
-			    //return GL_TRUE;
-		    }
-	    }
+    /* should only happenen once, just after context is created */
+    /* TODO: shouldn't we fallback to sw here? */
+    if (!ctx->FragmentProgram._Current) {
+	    fprintf(stderr, "No ctx->FragmentProgram._Current!!\n");
+	    return;
     }
 
-    if (context->radeon.NewGLState) 
-    {
-	struct r700_vertex_program *vp;
-        context->radeon.NewGLState = 0;
-
-        for (i = _TNL_FIRST_MAT; i <= _TNL_LAST_MAT; i++) 
-        {
-            /* mat states from state var not array for sw */
-            dummy_attrib[i].stride = 0;
-
-            temp_attrib[i] = TNL_CONTEXT(ctx)->vb.AttribPtr[i];
-            TNL_CONTEXT(ctx)->vb.AttribPtr[i] = &(dummy_attrib[i]);
-        }
-
-        _tnl_UpdateFixedFunctionProgram(ctx);
+    r700SelectFragmentShader(ctx);
 
-        for (i = _TNL_FIRST_MAT; i <= _TNL_LAST_MAT; i++) 
-        {
-            TNL_CONTEXT(ctx)->vb.AttribPtr[i] = temp_attrib[i];
-        }
-
-        r700SelectVertexShader(ctx);
-        vp = (struct r700_vertex_program *)ctx->VertexProgram._Current;
-
-        if (vp->translated == GL_FALSE) 
-        {
-            // TODO
-            //fprintf(stderr, "Failing back to sw-tcl\n");
-            //hw_tcl_on = future_hw_tcl_on = 0;
-            //r300ResetHwState(rmesa);
-            //
-            r700UpdateStateParameters(ctx, _NEW_PROGRAM);
-            return;
-        }
-    }
-
-    r700UpdateStateParameters(ctx, _NEW_PROGRAM);
+    r700SelectVertexShader(ctx);
+    r700UpdateStateParameters(ctx, _NEW_PROGRAM | _NEW_PROGRAM_CONSTANTS);
+    context->radeon.NewGLState = 0;
 }
 
 /*
@@ -139,7 +84,7 @@ void r700UpdateViewportOffset(GLcontext * ctx) //------------------
 {
 	context_t *context = R700_CONTEXT(ctx);
 	R700_CHIP_CONTEXT *r700 = (R700_CHIP_CONTEXT*)(&context->hw);
-	__DRIdrawablePrivate *dPriv = radeon_get_drawable(&context->radeon);
+	__DRIdrawable *dPriv = radeon_get_drawable(&context->radeon);
 	GLfloat xoffset = (GLfloat) dPriv->x;
 	GLfloat yoffset = (GLfloat) dPriv->y + dPriv->h;
 	const GLfloat *v = ctx->Viewport._WindowMap.m;
@@ -148,63 +93,38 @@ void r700UpdateViewportOffset(GLcontext * ctx) //------------------
 	GLfloat tx = v[MAT_TX] + xoffset;
 	GLfloat ty = (-v[MAT_TY]) + yoffset;
 
-	r700->viewport[id].PA_CL_VPORT_XOFFSET.f32All = tx;
-	r700->viewport[id].PA_CL_VPORT_YOFFSET.f32All = ty;
+	if (r700->viewport[id].PA_CL_VPORT_XOFFSET.f32All != tx ||
+	    r700->viewport[id].PA_CL_VPORT_YOFFSET.f32All != ty) {
+		/* Note: this should also modify whatever data the context reset
+		 * code uses...
+		 */
+		R600_STATECHANGE(context, vpt);
+		r700->viewport[id].PA_CL_VPORT_XOFFSET.f32All = tx;
+		r700->viewport[id].PA_CL_VPORT_YOFFSET.f32All = ty;
+	}
 
 	radeonUpdateScissor(ctx);
 }
 
-/**
- * Tell the card where to render (offset, pitch).
- * Effected by glDrawBuffer, etc
- */
-void r700UpdateDrawBuffer(GLcontext * ctx) /* TODO */ //---------------------
-{
-	context_t *context = R700_CONTEXT(ctx);
-
-	r700SetRenderTarget(context, 0);
-	r700SetDepthTarget(context);
-}
-
-static void r700FetchStateParameter(GLcontext * ctx,
-			                        const gl_state_index state[STATE_LENGTH],
-			                        GLfloat * value)
-{
-    /* TODO */
-}
-
 void r700UpdateStateParameters(GLcontext * ctx, GLuint new_state) //--------------------
 {
-	struct r700_fragment_program *fp;
+	struct r700_fragment_program *fp =
+		(struct r700_fragment_program *)ctx->FragmentProgram._Current;
 	struct gl_program_parameter_list *paramList;
-	GLuint i;
 
-	if (!(new_state & (_NEW_BUFFERS | _NEW_PROGRAM)))
+	if (!(new_state & (_NEW_BUFFERS | _NEW_PROGRAM | _NEW_PROGRAM_CONSTANTS)))
 		return;
 
-	fp = (struct r700_fragment_program *)ctx->FragmentProgram._Current;
-	if (!fp)
-    {
+	if (!ctx->FragmentProgram._Current || !fp)
 		return;
-    }
 
-	paramList = fp->mesa_program.Base.Parameters;
+	paramList = ctx->FragmentProgram._Current->Base.Parameters;
 
 	if (!paramList)
-    {
 		return;
-    }
 
-	for (i = 0; i < paramList->NumParameters; i++) 
-    {
-		if (paramList->Parameters[i].Type == PROGRAM_STATE_VAR) 
-        {
-			r700FetchStateParameter(ctx,
-						paramList->Parameters[i].
-						StateIndexes,
-						paramList->ParameterValues[i]);
-		}
-	}
+	_mesa_load_state_parameters(ctx, paramList);
+
 }
 
 /**
@@ -217,21 +137,32 @@ static void r700InvalidateState(GLcontext * ctx, GLuint new_state) //-----------
     R700_CHIP_CONTEXT *r700 = (R700_CHIP_CONTEXT*)(&context->hw);
 
     _swrast_InvalidateState(ctx, new_state);
-	_swsetup_InvalidateState(ctx, new_state);
-	_vbo_InvalidateState(ctx, new_state);
-	_tnl_InvalidateState(ctx, new_state);
-	_ae_invalidate_state(ctx, new_state);
+    _swsetup_InvalidateState(ctx, new_state);
+    _vbo_InvalidateState(ctx, new_state);
+    _tnl_InvalidateState(ctx, new_state);
+    _ae_invalidate_state(ctx, new_state);
+
+    if (new_state & _NEW_BUFFERS) {
+	    _mesa_update_framebuffer(ctx);
+	    /* this updates the DrawBuffer's Width/Height if it's a FBO */
+	    _mesa_update_draw_buffer_bounds(ctx);
+
+	    R600_STATECHANGE(context, cb_target);
+	    R600_STATECHANGE(context, db_target);
+    }
 
-	if (new_state & (_NEW_BUFFERS | _NEW_COLOR | _NEW_PIXEL)) 
-    {
-        _mesa_update_framebuffer(ctx);
-		/* this updates the DrawBuffer's Width/Height if it's a FBO */
-		_mesa_update_draw_buffer_bounds(ctx);
+    if (new_state & (_NEW_LIGHT)) {
+	    R600_STATECHANGE(context, su);
+	    if (ctx->Light.ProvokingVertex == GL_LAST_VERTEX_CONVENTION)
+		    SETbit(r700->PA_SU_SC_MODE_CNTL.u32All, PROVOKING_VTX_LAST_bit);
+	    else
+		    CLEARbit(r700->PA_SU_SC_MODE_CNTL.u32All, PROVOKING_VTX_LAST_bit);
+    }
 
-		r700UpdateDrawBuffer(ctx);
-	}
+    r700UpdateStateParameters(ctx, new_state);
 
-	r700UpdateStateParameters(ctx, new_state);
+    R600_STATECHANGE(context, cl);
+    R600_STATECHANGE(context, spi);
 
     if(GL_TRUE == r700->bEnablePerspective)
     {
@@ -256,14 +187,76 @@ static void r700InvalidateState(GLcontext * ctx, GLuint new_state) //-----------
         SETbit(r700->SPI_PS_IN_CONTROL_0.u32All, LINEAR_GRADIENT_ENA_bit);
     }
 
-	context->radeon.NewGLState |= new_state;
+    context->radeon.NewGLState |= new_state;
+}
+
+static void r700SetDBRenderState(GLcontext * ctx)
+{
+	context_t *context = R700_CONTEXT(ctx);
+	R700_CHIP_CONTEXT *r700 = (R700_CHIP_CONTEXT*)(&context->hw);
+	struct r700_fragment_program *fp = (struct r700_fragment_program *)
+		(ctx->FragmentProgram._Current);
+
+	R600_STATECHANGE(context, db);
+
+	SETbit(r700->DB_SHADER_CONTROL.u32All, DUAL_EXPORT_ENABLE_bit);
+	SETfield(r700->DB_SHADER_CONTROL.u32All, EARLY_Z_THEN_LATE_Z, Z_ORDER_shift, Z_ORDER_mask);
+	/* XXX need to enable htile for hiz/s */
+	SETfield(r700->DB_RENDER_OVERRIDE.u32All, FORCE_DISABLE, FORCE_HIZ_ENABLE_shift, FORCE_HIZ_ENABLE_mask);
+	SETfield(r700->DB_RENDER_OVERRIDE.u32All, FORCE_DISABLE, FORCE_HIS_ENABLE0_shift, FORCE_HIS_ENABLE0_mask);
+	SETfield(r700->DB_RENDER_OVERRIDE.u32All, FORCE_DISABLE, FORCE_HIS_ENABLE1_shift, FORCE_HIS_ENABLE1_mask);
+
+	if (context->radeon.query.current)
+	{
+		SETbit(r700->DB_RENDER_OVERRIDE.u32All, NOOP_CULL_DISABLE_bit);
+		if (context->radeon.radeonScreen->chip_family >= CHIP_FAMILY_RV770)
+		{
+			SETbit(r700->DB_RENDER_CONTROL.u32All, PERFECT_ZPASS_COUNTS_bit);
+		}
+	}
+	else
+	{
+		CLEARbit(r700->DB_RENDER_OVERRIDE.u32All, NOOP_CULL_DISABLE_bit);
+		if (context->radeon.radeonScreen->chip_family >= CHIP_FAMILY_RV770)
+		{
+			CLEARbit(r700->DB_RENDER_CONTROL.u32All, PERFECT_ZPASS_COUNTS_bit);
+		}
+	}
+
+	if (fp)
+	{
+		if (fp->r700Shader.killIsUsed)
+		{
+			SETbit(r700->DB_SHADER_CONTROL.u32All, KILL_ENABLE_bit);
+		}
+		else
+		{
+			CLEARbit(r700->DB_SHADER_CONTROL.u32All, KILL_ENABLE_bit);
+		}
+
+		if (fp->r700Shader.depthIsExported)
+		{
+			SETbit(r700->DB_SHADER_CONTROL.u32All, Z_EXPORT_ENABLE_bit);
+		}
+		else
+		{
+			CLEARbit(r700->DB_SHADER_CONTROL.u32All, Z_EXPORT_ENABLE_bit);
+		}
+	}
+}
+
+void r700UpdateShaderStates(GLcontext * ctx)
+{
+	r700SetDBRenderState(ctx);
+	r600UpdateTextureState(ctx);
 }
 
 static void r700SetDepthState(GLcontext * ctx)
 {
 	context_t *context = R700_CONTEXT(ctx);
+	R700_CHIP_CONTEXT *r700 = (R700_CHIP_CONTEXT*)(&context->hw);
 
-    R700_CHIP_CONTEXT *r700 = (R700_CHIP_CONTEXT*)(&context->hw);
+	R600_STATECHANGE(context, db);
 
     if (ctx->Depth.Test)
     {
@@ -331,6 +324,8 @@ static void r700SetAlphaState(GLcontext * ctx)
 	uint32_t alpha_func = REF_ALWAYS;
 	GLboolean really_enabled = ctx->Color.AlphaEnabled;
 
+	R600_STATECHANGE(context, sx);
+
 	switch (ctx->Color.AlphaFunc) {
 	case GL_NEVER:
 		alpha_func = REF_NEVER;
@@ -383,6 +378,8 @@ static void r700BlendColor(GLcontext * ctx, const GLfloat cf[4]) //-------------
 	context_t *context = R700_CONTEXT(ctx);
 	R700_CHIP_CONTEXT *r700 = (R700_CHIP_CONTEXT*)(&context->hw);
 
+	R600_STATECHANGE(context, blnd_clr);
+
 	r700->CB_BLEND_RED.f32All = cf[0];
 	r700->CB_BLEND_GREEN.f32All = cf[1];
 	r700->CB_BLEND_BLUE.f32All = cf[2];
@@ -451,6 +448,8 @@ static void r700SetBlendState(GLcontext * ctx)
 	int id = 0;
 	uint32_t blend_reg = 0, eqn, eqnA;
 
+	R600_STATECHANGE(context, blnd);
+
 	if (RGBA_LOGICOP_ENABLED(ctx) || !ctx->Color.BlendEnabled) {
 		SETfield(blend_reg,
 			 BLEND_ONE, COLOR_SRCBLEND_shift, COLOR_SRCBLEND_mask);
@@ -517,10 +516,10 @@ static void r700SetBlendState(GLcontext * ctx)
 		 eqn, COLOR_COMB_FCN_shift, COLOR_COMB_FCN_mask);
 
 	SETfield(blend_reg,
-		 blend_factor(ctx->Color.BlendSrcRGB, GL_TRUE),
+		 blend_factor(ctx->Color.BlendSrcA, GL_TRUE),
 		 ALPHA_SRCBLEND_shift, ALPHA_SRCBLEND_mask);
 	SETfield(blend_reg,
-		 blend_factor(ctx->Color.BlendDstRGB, GL_FALSE),
+		 blend_factor(ctx->Color.BlendDstA, GL_FALSE),
 		 ALPHA_DESTBLEND_shift, ALPHA_DESTBLEND_mask);
 
 	switch (ctx->Color.BlendEquationA) {
@@ -616,7 +615,7 @@ static GLuint translate_logicop(GLenum logicop)
 	case GL_XOR:
 		return 0x66;
 	case GL_EQUIV:
-		return 0xaa;
+		return 0x99;
 	case GL_AND_REVERSE:
 		return 0x44;
 	case GL_AND_INVERTED:
@@ -637,8 +636,11 @@ static GLuint translate_logicop(GLenum logicop)
  */
 static void r700SetLogicOpState(GLcontext *ctx)
 {
+	context_t *context = R700_CONTEXT(ctx);
 	R700_CHIP_CONTEXT *r700 = (R700_CHIP_CONTEXT*)(&R700_CONTEXT(ctx)->hw);
 
+	R600_STATECHANGE(context, blnd);
+
 	if (RGBA_LOGICOP_ENABLED(ctx))
 		SETfield(r700->CB_COLOR_CONTROL.u32All,
 			 translate_logicop(ctx->Color.LogicOp), ROP3_shift, ROP3_mask);
@@ -658,7 +660,10 @@ static void r700LogicOpcode(GLcontext *ctx, GLenum logicop)
 
 static void r700UpdateCulling(GLcontext * ctx)
 {
-    R700_CHIP_CONTEXT *r700 = (R700_CHIP_CONTEXT*)(&R700_CONTEXT(ctx)->hw);
+	context_t *context = R700_CONTEXT(ctx);
+	R700_CHIP_CONTEXT *r700 = (R700_CHIP_CONTEXT*)(&R700_CONTEXT(ctx)->hw);
+
+    R600_STATECHANGE(context, su);
 
     CLEARbit(r700->PA_SU_SC_MODE_CNTL.u32All, FACE_bit);
     CLEARbit(r700->PA_SU_SC_MODE_CNTL.u32All, CULL_FRONT_bit);
@@ -699,11 +704,19 @@ static void r700UpdateCulling(GLcontext * ctx)
             CLEARbit(r700->PA_SU_SC_MODE_CNTL.u32All, FACE_bit); /* default: ccw */
             break;
     }
+
+    /* Winding is inverted when rendering to FBO */
+    if (ctx->DrawBuffer && ctx->DrawBuffer->Name)
+	    r700->PA_SU_SC_MODE_CNTL.u32All ^= FACE_bit;
 }
 
 static void r700UpdateLineStipple(GLcontext * ctx)
 {
-    R700_CHIP_CONTEXT *r700 = (R700_CHIP_CONTEXT*)(&R700_CONTEXT(ctx)->hw);
+	context_t *context = R700_CONTEXT(ctx);
+	R700_CHIP_CONTEXT *r700 = (R700_CHIP_CONTEXT*)(&R700_CONTEXT(ctx)->hw);
+
+    R600_STATECHANGE(context, sc);
+
     if (ctx->Line.StippleFlag)
     {
 	SETbit(r700->PA_SC_MODE_CNTL.u32All, LINE_STIPPLE_ENABLE_bit);
@@ -766,6 +779,9 @@ static void r700Enable(GLcontext * ctx, GLenum cap, GLboolean state) //---------
 	case GL_LINE_STIPPLE:
 		r700UpdateLineStipple(ctx);
 		break;
+	case GL_DEPTH_CLAMP:
+		r700UpdateWindow(ctx, 0);
+		break;
 	default:
 		break;
 	}
@@ -778,14 +794,17 @@ static void r700Enable(GLcontext * ctx, GLenum cap, GLboolean state) //---------
 static void r700ColorMask(GLcontext * ctx,
 			  GLboolean r, GLboolean g, GLboolean b, GLboolean a) //------------------
 {
+	context_t *context = R700_CONTEXT(ctx);
 	R700_CHIP_CONTEXT *r700 = (R700_CHIP_CONTEXT*)(&R700_CONTEXT(ctx)->hw);
 	unsigned int mask = ((r ? 1 : 0) |
 			     (g ? 2 : 0) |
 			     (b ? 4 : 0) |
 			     (a ? 8 : 0));
 
-	if (mask != r700->CB_SHADER_MASK.u32All)
-		SETfield(r700->CB_SHADER_MASK.u32All, mask, OUTPUT0_ENABLE_shift, OUTPUT0_ENABLE_mask);
+	if (mask != r700->CB_TARGET_MASK.u32All) {
+		R600_STATECHANGE(context, cb);
+		SETfield(r700->CB_TARGET_MASK.u32All, mask, TARGET0_ENABLE_shift, TARGET0_ENABLE_mask);
+	}
 }
 
 /**
@@ -841,6 +860,8 @@ static void r700ShadeModel(GLcontext * ctx, GLenum mode) //--------------------
 	context_t *context = R700_CONTEXT(ctx);
 	R700_CHIP_CONTEXT *r700 = (R700_CHIP_CONTEXT*)(&context->hw);
 
+	R600_STATECHANGE(context, spi);
+
 	/* also need to set/clear FLAT_SHADE bit per param in SPI_PS_INPUT_CNTL_[0-31] */
 	switch (mode) {
 	case GL_FLAT:
@@ -862,6 +883,8 @@ static void r700PointSize(GLcontext * ctx, GLfloat size)
 	context_t *context = R700_CONTEXT(ctx);
 	R700_CHIP_CONTEXT *r700 = (R700_CHIP_CONTEXT*)(&context->hw);
 
+	R600_STATECHANGE(context, su);
+
 	/* We need to clamp to user defined range here, because
 	 * the HW clamping happens only for per vertex point size. */
 	size = CLAMP(size, ctx->Point.MinSize, ctx->Point.MaxSize);
@@ -870,9 +893,9 @@ static void r700PointSize(GLcontext * ctx, GLfloat size)
 	size = CLAMP(size, ctx->Const.MinPointSize, ctx->Const.MaxPointSize);
 
 	/* format is 12.4 fixed point */
-	SETfield(r700->PA_SU_POINT_SIZE.u32All, (int)(size * 16),
+	SETfield(r700->PA_SU_POINT_SIZE.u32All, (int)(size * 8.0),
 		 PA_SU_POINT_SIZE__HEIGHT_shift, PA_SU_POINT_SIZE__HEIGHT_mask);
-	SETfield(r700->PA_SU_POINT_SIZE.u32All, (int)(size * 16),
+	SETfield(r700->PA_SU_POINT_SIZE.u32All, (int)(size * 8.0),
 		 PA_SU_POINT_SIZE__WIDTH_shift, PA_SU_POINT_SIZE__WIDTH_mask);
 
 }
@@ -882,15 +905,19 @@ static void r700PointParameter(GLcontext * ctx, GLenum pname, const GLfloat * pa
 	context_t *context = R700_CONTEXT(ctx);
 	R700_CHIP_CONTEXT *r700 = (R700_CHIP_CONTEXT*)(&context->hw);
 
+	R600_STATECHANGE(context, su);
+
 	/* format is 12.4 fixed point */
 	switch (pname) {
 	case GL_POINT_SIZE_MIN:
-		SETfield(r700->PA_SU_POINT_MINMAX.u32All, (int)(ctx->Point.MinSize * 16.0),
+		SETfield(r700->PA_SU_POINT_MINMAX.u32All, (int)(ctx->Point.MinSize * 8.0),
 			 MIN_SIZE_shift, MIN_SIZE_mask);
+		r700PointSize(ctx, ctx->Point.Size);
 		break;
 	case GL_POINT_SIZE_MAX:
-		SETfield(r700->PA_SU_POINT_MINMAX.u32All, (int)(ctx->Point.MaxSize * 16.0),
+		SETfield(r700->PA_SU_POINT_MINMAX.u32All, (int)(ctx->Point.MaxSize * 8.0),
 			 MAX_SIZE_shift, MAX_SIZE_mask);
+		r700PointSize(ctx, ctx->Point.Size);
 		break;
 	case GL_POINT_DISTANCE_ATTENUATION:
 		break;
@@ -956,9 +983,6 @@ static void r700SetStencilState(GLcontext * ctx, GLboolean state)
 	R700_CHIP_CONTEXT *r700 = (R700_CHIP_CONTEXT*)(&context->hw);
 	GLboolean hw_stencil = GL_FALSE;
 
-	//fixme
-	//r300CatchStencilFallback(ctx);
-
 	if (ctx->DrawBuffer) {
 		struct radeon_renderbuffer *rrbStencil
 			= radeon_get_renderbuffer(ctx->DrawBuffer, BUFFER_STENCIL);
@@ -966,9 +990,11 @@ static void r700SetStencilState(GLcontext * ctx, GLboolean state)
 	}
 
 	if (hw_stencil) {
-		if (state)
+		R600_STATECHANGE(context, db);
+		if (state) {
 			SETbit(r700->DB_DEPTH_CONTROL.u32All, STENCIL_ENABLE_bit);
-		else
+			SETbit(r700->DB_DEPTH_CONTROL.u32All, BACKFACE_ENABLE_bit);
+		} else
 			CLEARbit(r700->DB_DEPTH_CONTROL.u32All, STENCIL_ENABLE_bit);
 	}
 }
@@ -980,8 +1006,8 @@ static void r700StencilFuncSeparate(GLcontext * ctx, GLenum face,
 	R700_CHIP_CONTEXT *r700 = (R700_CHIP_CONTEXT*)(&context->hw);
 	const unsigned back = ctx->Stencil._BackFace;
 
-	//fixme
-	//r300CatchStencilFallback(ctx);
+	R600_STATECHANGE(context, stencil);
+	R600_STATECHANGE(context, db);
 
 	//front
 	SETfield(r700->DB_STENCILREFMASK.u32All, ctx->Stencil.Ref[0],
@@ -1009,8 +1035,7 @@ static void r700StencilMaskSeparate(GLcontext * ctx, GLenum face, GLuint mask) /
 	R700_CHIP_CONTEXT *r700 = (R700_CHIP_CONTEXT*)(&context->hw);
 	const unsigned back = ctx->Stencil._BackFace;
 
-	//fixme
-	//r300CatchStencilFallback(ctx);
+	R600_STATECHANGE(context, stencil);
 
 	// front
 	SETfield(r700->DB_STENCILREFMASK.u32All, ctx->Stencil.WriteMask[0],
@@ -1029,8 +1054,7 @@ static void r700StencilOpSeparate(GLcontext * ctx, GLenum face,
 	R700_CHIP_CONTEXT *r700 = (R700_CHIP_CONTEXT*)(&context->hw);
 	const unsigned back = ctx->Stencil._BackFace;
 
-	//fixme
-	//r300CatchStencilFallback(ctx);
+	R600_STATECHANGE(context, db);
 
 	SETfield(r700->DB_DEPTH_CONTROL.u32All, translate_stencil_op(ctx->Stencil.FailFunc[0]),
 		 STENCILFAIL_shift, STENCILFAIL_mask);
@@ -1051,7 +1075,7 @@ static void r700UpdateWindow(GLcontext * ctx, int id) //--------------------
 {
 	context_t *context = R700_CONTEXT(ctx);
 	R700_CHIP_CONTEXT *r700 = (R700_CHIP_CONTEXT*)(&context->hw);
-	__DRIdrawablePrivate *dPriv = radeon_get_drawable(&context->radeon);
+	__DRIdrawable *dPriv = radeon_get_drawable(&context->radeon);
 	GLfloat xoffset = dPriv ? (GLfloat) dPriv->x : 0;
 	GLfloat yoffset = dPriv ? (GLfloat) dPriv->y + dPriv->h : 0;
 	const GLfloat *v = ctx->Viewport._WindowMap.m;
@@ -1074,7 +1098,8 @@ static void r700UpdateWindow(GLcontext * ctx, int id) //--------------------
 	GLfloat sz = v[MAT_SZ] * depthScale;
 	GLfloat tz = v[MAT_TZ] * depthScale;
 
-	/* TODO : Need DMA flush as well. */
+	R600_STATECHANGE(context, vpt);
+	R600_STATECHANGE(context, cl);
 
 	r700->viewport[id].PA_CL_VPORT_XSCALE.f32All  = sx;
 	r700->viewport[id].PA_CL_VPORT_XOFFSET.f32All = tx;
@@ -1085,6 +1110,18 @@ static void r700UpdateWindow(GLcontext * ctx, int id) //--------------------
 	r700->viewport[id].PA_CL_VPORT_ZSCALE.f32All  = sz;
 	r700->viewport[id].PA_CL_VPORT_ZOFFSET.f32All = tz;
 
+	if (ctx->Transform.DepthClamp) {
+		r700->viewport[id].PA_SC_VPORT_ZMIN_0.f32All = MIN2(ctx->Viewport.Near, ctx->Viewport.Far);
+		r700->viewport[id].PA_SC_VPORT_ZMAX_0.f32All = MAX2(ctx->Viewport.Near, ctx->Viewport.Far);
+		SETbit(r700->PA_CL_CLIP_CNTL.u32All, ZCLIP_NEAR_DISABLE_bit);
+		SETbit(r700->PA_CL_CLIP_CNTL.u32All, ZCLIP_FAR_DISABLE_bit);
+	} else {
+		r700->viewport[id].PA_SC_VPORT_ZMIN_0.f32All = 0.0;
+		r700->viewport[id].PA_SC_VPORT_ZMAX_0.f32All = 1.0;
+		CLEARbit(r700->PA_CL_CLIP_CNTL.u32All, ZCLIP_NEAR_DISABLE_bit);
+		CLEARbit(r700->PA_CL_CLIP_CNTL.u32All, ZCLIP_FAR_DISABLE_bit);
+	}
+
 	r700->viewport[id].enabled = GL_TRUE;
 
 	r700SetScissor(context);
@@ -1112,10 +1149,13 @@ static void r700LineWidth(GLcontext * ctx, GLfloat widthf) //---------------
     context_t *context = R700_CONTEXT(ctx);
     R700_CHIP_CONTEXT *r700 = (R700_CHIP_CONTEXT*)(&context->hw);
     uint32_t lineWidth = (uint32_t)((widthf * 0.5) * (1 << 4));
+
+    R600_STATECHANGE(context, su);
+
     if (lineWidth > 0xFFFF)
-	lineWidth = 0xFFFF;
+	    lineWidth = 0xFFFF;
     SETfield(r700->PA_SU_LINE_CNTL.u32All,(uint16_t)lineWidth,
-	PA_SU_LINE_CNTL__WIDTH_shift, PA_SU_LINE_CNTL__WIDTH_mask);
+	     PA_SU_LINE_CNTL__WIDTH_shift, PA_SU_LINE_CNTL__WIDTH_mask);
 }
 
 static void r700LineStipple(GLcontext *ctx, GLint factor, GLushort pattern)
@@ -1123,6 +1163,8 @@ static void r700LineStipple(GLcontext *ctx, GLint factor, GLushort pattern)
     context_t *context = R700_CONTEXT(ctx);
     R700_CHIP_CONTEXT *r700 = (R700_CHIP_CONTEXT*)(&context->hw);
 
+    R600_STATECHANGE(context, sc);
+
     SETfield(r700->PA_SC_LINE_STIPPLE.u32All, pattern, LINE_PATTERN_shift, LINE_PATTERN_mask);
     SETfield(r700->PA_SC_LINE_STIPPLE.u32All, (factor-1), REPEAT_COUNT_shift, REPEAT_COUNT_mask);
     SETfield(r700->PA_SC_LINE_STIPPLE.u32All, 1, AUTO_RESET_CNTL_shift, AUTO_RESET_CNTL_mask);
@@ -1133,6 +1175,8 @@ static void r700SetPolygonOffsetState(GLcontext * ctx, GLboolean state)
 	context_t *context = R700_CONTEXT(ctx);
 	R700_CHIP_CONTEXT *r700 = (R700_CHIP_CONTEXT*)(&context->hw);
 
+	R600_STATECHANGE(context, su);
+
 	if (state) {
 		SETbit(r700->PA_SU_SC_MODE_CNTL.u32All, POLY_OFFSET_FRONT_ENABLE_bit);
 		SETbit(r700->PA_SU_SC_MODE_CNTL.u32All, POLY_OFFSET_BACK_ENABLE_bit);
@@ -1149,18 +1193,25 @@ static void r700PolygonOffset(GLcontext * ctx, GLfloat factor, GLfloat units) //
 	context_t *context = R700_CONTEXT(ctx);
 	R700_CHIP_CONTEXT *r700 = (R700_CHIP_CONTEXT*)(&context->hw);
 	GLfloat constant = units;
+	GLchar depth = 0;
+
+	R600_STATECHANGE(context, poly);
 
 	switch (ctx->Visual.depthBits) {
 	case 16:
 		constant *= 4.0;
+		depth = -16;
 		break;
 	case 24:
 		constant *= 2.0;
+		depth = -24;
 		break;
 	}
 
 	factor *= 12.0;
-
+	SETfield(r700->PA_SU_POLY_OFFSET_DB_FMT_CNTL.u32All, depth,
+		 POLY_OFFSET_NEG_NUM_DB_BITS_shift, POLY_OFFSET_NEG_NUM_DB_BITS_mask);
+	//r700->PA_SU_POLY_OFFSET_CLAMP.f32All = constant; //???
 	r700->PA_SU_POLY_OFFSET_FRONT_SCALE.f32All = factor;
 	r700->PA_SU_POLY_OFFSET_FRONT_OFFSET.f32All = constant;
 	r700->PA_SU_POLY_OFFSET_BACK_SCALE.f32All = factor;
@@ -1172,6 +1223,8 @@ static void r700UpdatePolygonMode(GLcontext * ctx)
 	context_t *context = R700_CONTEXT(ctx);
 	R700_CHIP_CONTEXT *r700 = (R700_CHIP_CONTEXT*)(&context->hw);
 
+	R600_STATECHANGE(context, su);
+
 	SETfield(r700->PA_SU_SC_MODE_CNTL.u32All, X_DISABLE_POLY_MODE, POLY_MODE_shift, POLY_MODE_mask);
 
 	/* Only do something if a polygon mode is wanted, default is GL_FILL */
@@ -1182,13 +1235,8 @@ static void r700UpdatePolygonMode(GLcontext * ctx)
 		/* Handle GL_CW (clock wise and GL_CCW (counter clock wise)
 		 * correctly by selecting the correct front and back face
 		 */
-		if (ctx->Polygon.FrontFace == GL_CCW) {
-			f = ctx->Polygon.FrontMode;
-			b = ctx->Polygon.BackMode;
-		} else {
-			f = ctx->Polygon.BackMode;
-			b = ctx->Polygon.FrontMode;
-		}
+		f = ctx->Polygon.FrontMode;
+		b = ctx->Polygon.BackMode;
 
 		/* Enable polygon mode */
 		SETfield(r700->PA_SU_SC_MODE_CNTL.u32All, X_DUAL_MODE, POLY_MODE_shift, POLY_MODE_mask);
@@ -1247,6 +1295,8 @@ static void r700ClipPlane( GLcontext *ctx, GLenum plane, const GLfloat *eq )
 	p = (GLint) plane - (GLint) GL_CLIP_PLANE0;
 	ip = (GLint *)ctx->Transform._ClipUserPlane[p];
 
+	R600_STATECHANGE(context, ucp);
+
 	r700->ucp[p].PA_CL_UCP_0_X.u32All = ip[0];
 	r700->ucp[p].PA_CL_UCP_0_Y.u32All = ip[1];
 	r700->ucp[p].PA_CL_UCP_0_Z.u32All = ip[2];
@@ -1260,6 +1310,9 @@ static void r700SetClipPlaneState(GLcontext * ctx, GLenum cap, GLboolean state)
 	GLuint p;
 
 	p = cap - GL_CLIP_PLANE0;
+
+	R600_STATECHANGE(context, cl);
+
 	if (state) {
 		r700->PA_CL_CLIP_CNTL.u32All |= (UCP_ENA_0_bit << p);
 		r700->ucp[p].enabled = GL_TRUE;
@@ -1284,15 +1337,41 @@ void r700SetScissor(context_t *context) //---------------
 	if (context->radeon.state.scissor.enabled) {
 		x1 = context->radeon.state.scissor.rect.x1;
 		y1 = context->radeon.state.scissor.rect.y1;
-		x2 = context->radeon.state.scissor.rect.x2 - 1;
-		y2 = context->radeon.state.scissor.rect.y2 - 1;
+		x2 = context->radeon.state.scissor.rect.x2;
+		y2 = context->radeon.state.scissor.rect.y2;
+		/* r600 has exclusive BR scissors */
+		if (context->radeon.radeonScreen->kernel_mm) {
+			x2++;
+			y2++;
+		}
 	} else {
-		x1 = rrb->dPriv->x;
-		y1 = rrb->dPriv->y;
-		x2 = rrb->dPriv->x + rrb->dPriv->w;
-		y2 = rrb->dPriv->y + rrb->dPriv->h;
+		if (context->radeon.radeonScreen->driScreen->dri2.enabled) {
+			x1 = 0;
+			y1 = 0;
+			x2 = rrb->base.Width;
+			y2 = rrb->base.Height;
+		} else {
+			x1 = rrb->dPriv->x;
+			y1 = rrb->dPriv->y;
+			x2 = rrb->dPriv->x + rrb->dPriv->w;
+			y2 = rrb->dPriv->y + rrb->dPriv->h;
+		}
 	}
 
+	R600_STATECHANGE(context, scissor);
+
+	/* screen */
+	SETbit(r700->PA_SC_SCREEN_SCISSOR_TL.u32All, WINDOW_OFFSET_DISABLE_bit);
+	SETfield(r700->PA_SC_SCREEN_SCISSOR_TL.u32All, x1,
+		 PA_SC_SCREEN_SCISSOR_TL__TL_X_shift, PA_SC_SCREEN_SCISSOR_TL__TL_X_mask);
+	SETfield(r700->PA_SC_SCREEN_SCISSOR_TL.u32All, y1,
+		 PA_SC_SCREEN_SCISSOR_TL__TL_Y_shift, PA_SC_SCREEN_SCISSOR_TL__TL_Y_mask);
+
+	SETfield(r700->PA_SC_SCREEN_SCISSOR_BR.u32All, x2,
+		 PA_SC_SCREEN_SCISSOR_BR__BR_X_shift, PA_SC_SCREEN_SCISSOR_BR__BR_X_mask);
+	SETfield(r700->PA_SC_SCREEN_SCISSOR_BR.u32All, y2,
+		 PA_SC_SCREEN_SCISSOR_BR__BR_Y_shift, PA_SC_SCREEN_SCISSOR_BR__BR_Y_mask);
+
 	/* window */
 	SETbit(r700->PA_SC_WINDOW_SCISSOR_TL.u32All, WINDOW_OFFSET_DISABLE_bit);
 	SETfield(r700->PA_SC_WINDOW_SCISSOR_TL.u32All, x1,
@@ -1343,108 +1422,9 @@ void r700SetScissor(context_t *context) //---------------
 	SETfield(r700->viewport[id].PA_SC_VPORT_SCISSOR_0_BR.u32All, y2,
 		 PA_SC_VPORT_SCISSOR_0_BR__BR_Y_shift, PA_SC_VPORT_SCISSOR_0_BR__BR_Y_mask);
 
-	r700->viewport[id].PA_SC_VPORT_ZMIN_0.u32All = 0;
-	r700->viewport[id].PA_SC_VPORT_ZMAX_0.u32All = 0x3F800000;
 	r700->viewport[id].enabled = GL_TRUE;
 }
 
-static void r700SetRenderTarget(context_t *context, int id)
-{
-    R700_CHIP_CONTEXT *r700 = (R700_CHIP_CONTEXT*)(&context->hw);
-
-    struct radeon_renderbuffer *rrb;
-    unsigned int nPitchInPixel;
-
-    rrb = radeon_get_colorbuffer(&context->radeon);
-    if (!rrb || !rrb->bo) {
-	    fprintf(stderr, "no rrb\n");
-	    return;
-    }
-
-    /* screen/window/view */
-    SETfield(r700->CB_TARGET_MASK.u32All, 0xF, (4 * id), TARGET0_ENABLE_mask);
-
-    /* color buffer */
-    r700->render_target[id].CB_COLOR0_BASE.u32All = context->radeon.state.color.draw_offset;
-
-    nPitchInPixel = rrb->pitch/rrb->cpp;
-    SETfield(r700->render_target[id].CB_COLOR0_SIZE.u32All, (nPitchInPixel/8)-1,
-             PITCH_TILE_MAX_shift, PITCH_TILE_MAX_mask);
-    SETfield(r700->render_target[id].CB_COLOR0_SIZE.u32All, ( (nPitchInPixel * context->radeon.radeonScreen->driScreen->fbHeight)/64 )-1,
-             SLICE_TILE_MAX_shift, SLICE_TILE_MAX_mask);
-    r700->render_target[id].CB_COLOR0_BASE.u32All = 0;
-    SETfield(r700->render_target[id].CB_COLOR0_INFO.u32All, ENDIAN_NONE, ENDIAN_shift, ENDIAN_mask);
-    SETfield(r700->render_target[id].CB_COLOR0_INFO.u32All, ARRAY_LINEAR_GENERAL,
-             CB_COLOR0_INFO__ARRAY_MODE_shift, CB_COLOR0_INFO__ARRAY_MODE_mask);
-    if(4 == rrb->cpp)
-    {
-        SETfield(r700->render_target[id].CB_COLOR0_INFO.u32All, COLOR_8_8_8_8,
-                 CB_COLOR0_INFO__FORMAT_shift, CB_COLOR0_INFO__FORMAT_mask);
-        SETfield(r700->render_target[id].CB_COLOR0_INFO.u32All, SWAP_ALT, COMP_SWAP_shift, COMP_SWAP_mask);
-    }
-    else
-    {
-        SETfield(r700->render_target[id].CB_COLOR0_INFO.u32All, COLOR_5_6_5,
-                 CB_COLOR0_INFO__FORMAT_shift, CB_COLOR0_INFO__FORMAT_mask);
-        SETfield(r700->render_target[id].CB_COLOR0_INFO.u32All, SWAP_ALT_REV,
-                 COMP_SWAP_shift, COMP_SWAP_mask);
-    }
-    SETbit(r700->render_target[id].CB_COLOR0_INFO.u32All, SOURCE_FORMAT_bit);
-    SETbit(r700->render_target[id].CB_COLOR0_INFO.u32All, BLEND_CLAMP_bit);
-    SETfield(r700->render_target[id].CB_COLOR0_INFO.u32All, NUMBER_UNORM, NUMBER_TYPE_shift, NUMBER_TYPE_mask);
-
-    r700->render_target[id].enabled = GL_TRUE;
-}
-
-static void r700SetDepthTarget(context_t *context)
-{
-    R700_CHIP_CONTEXT *r700 = (R700_CHIP_CONTEXT*)(&context->hw);
-
-    struct radeon_renderbuffer *rrb;
-    unsigned int nPitchInPixel;
-
-    rrb = radeon_get_depthbuffer(&context->radeon);
-    if (!rrb)
-	    return;
-
-    /* depth buf */
-    r700->DB_DEPTH_SIZE.u32All = 0;
-    r700->DB_DEPTH_BASE.u32All = 0;
-    r700->DB_DEPTH_INFO.u32All = 0;
-    r700->DB_DEPTH_VIEW.u32All = 0;
-
-    nPitchInPixel = rrb->pitch/rrb->cpp;
-
-    SETfield(r700->DB_DEPTH_SIZE.u32All, (nPitchInPixel/8)-1,
-             PITCH_TILE_MAX_shift, PITCH_TILE_MAX_mask);
-    SETfield(r700->DB_DEPTH_SIZE.u32All, ( (nPitchInPixel * context->radeon.radeonScreen->driScreen->fbHeight)/64 )-1,
-             SLICE_TILE_MAX_shift, SLICE_TILE_MAX_mask); /* size in pixel / 64 - 1 */
-
-    if(4 == rrb->cpp)
-    {
-        switch (GL_CONTEXT(context)->Visual.depthBits)
-        {
-        case 16:
-        case 24:
-            SETfield(r700->DB_DEPTH_INFO.u32All, DEPTH_8_24,
-                     DB_DEPTH_INFO__FORMAT_shift, DB_DEPTH_INFO__FORMAT_mask);
-            break;
-        default:
-            fprintf(stderr, "Error: Unsupported depth %d... exiting\n",
-                GL_CONTEXT(context)->Visual.depthBits);
-            _mesa_exit(-1);
-        }
-    }
-    else
-    {
-        SETfield(r700->DB_DEPTH_INFO.u32All, DEPTH_16,
-                     DB_DEPTH_INFO__FORMAT_shift, DB_DEPTH_INFO__FORMAT_mask);
-    }
-    SETfield(r700->DB_DEPTH_INFO.u32All, ARRAY_2D_TILED_THIN1,
-             DB_DEPTH_INFO__ARRAY_MODE_shift, DB_DEPTH_INFO__ARRAY_MODE_mask);
-    /* r700->DB_PREFETCH_LIMIT.bits.DEPTH_HEIGHT_TILE_MAX = (context->currentDraw->h >> 3) - 1; */ /* z buffer sie may much bigger than what need, so use actual used h. */
-}
-
 static void r700InitSQConfig(GLcontext * ctx)
 {
     context_t *context = R700_CONTEXT(ctx);
@@ -1467,6 +1447,8 @@ static void r700InitSQConfig(GLcontext * ctx)
     int num_gs_stack_entries;
     int num_es_stack_entries;
 
+    R600_STATECHANGE(context, sq);
+
     // SQ
     ps_prio = 0;
     vs_prio = 1;
@@ -1507,6 +1489,7 @@ static void r700InitSQConfig(GLcontext * ctx)
     case CHIP_FAMILY_RV610:
     case CHIP_FAMILY_RV620:
     case CHIP_FAMILY_RS780:
+    case CHIP_FAMILY_RS880:
     default:
 	    num_ps_gprs = 84;
 	    num_vs_gprs = 36;
@@ -1589,6 +1572,7 @@ static void r700InitSQConfig(GLcontext * ctx)
     if ((context->radeon.radeonScreen->chip_family == CHIP_FAMILY_RV610) ||
         (context->radeon.radeonScreen->chip_family == CHIP_FAMILY_RV620) ||
 	(context->radeon.radeonScreen->chip_family == CHIP_FAMILY_RS780) ||
+	(context->radeon.radeonScreen->chip_family == CHIP_FAMILY_RS880) ||
         (context->radeon.radeonScreen->chip_family == CHIP_FAMILY_RV710))
 	    CLEARbit(r700->sq_config.SQ_CONFIG.u32All, VC_ENABLE_bit);
     else
@@ -1596,9 +1580,9 @@ static void r700InitSQConfig(GLcontext * ctx)
     SETbit(r700->sq_config.SQ_CONFIG.u32All, DX9_CONSTS_bit);
     SETbit(r700->sq_config.SQ_CONFIG.u32All, ALU_INST_PREFER_VECTOR_bit);
     SETfield(r700->sq_config.SQ_CONFIG.u32All, ps_prio, PS_PRIO_shift, PS_PRIO_mask);
-    SETfield(r700->sq_config.SQ_CONFIG.u32All, ps_prio, VS_PRIO_shift, VS_PRIO_mask);
-    SETfield(r700->sq_config.SQ_CONFIG.u32All, ps_prio, GS_PRIO_shift, GS_PRIO_mask);
-    SETfield(r700->sq_config.SQ_CONFIG.u32All, ps_prio, ES_PRIO_shift, ES_PRIO_mask);
+    SETfield(r700->sq_config.SQ_CONFIG.u32All, vs_prio, VS_PRIO_shift, VS_PRIO_mask);
+    SETfield(r700->sq_config.SQ_CONFIG.u32All, gs_prio, GS_PRIO_shift, GS_PRIO_mask);
+    SETfield(r700->sq_config.SQ_CONFIG.u32All, es_prio, ES_PRIO_shift, ES_PRIO_mask);
 
     r700->sq_config.SQ_GPR_RESOURCE_MGMT_1.u32All = 0;
     SETfield(r700->sq_config.SQ_GPR_RESOURCE_MGMT_1.u32All, num_ps_gprs, NUM_PS_GPRS_shift, NUM_PS_GPRS_mask);
@@ -1643,8 +1627,7 @@ void r700InitState(GLcontext * ctx) //-------------------
 {
     context_t *context = R700_CONTEXT(ctx);
     R700_CHIP_CONTEXT *r700 = (R700_CHIP_CONTEXT*)(&context->hw);
-
-    radeon_firevertices(&context->radeon);
+    int id = 0;
 
     r700->TA_CNTL_AUX.u32All = 0;
     SETfield(r700->TA_CNTL_AUX.u32All, 28, TD_FIFO_CREDIT_shift, TD_FIFO_CREDIT_mask);
@@ -1677,21 +1660,13 @@ void r700InitState(GLcontext * ctx) //-------------------
     /* default shader connections. */
     r700->SPI_VS_OUT_ID_0.u32All  = 0x03020100;
     r700->SPI_VS_OUT_ID_1.u32All  = 0x07060504;
+    r700->SPI_VS_OUT_ID_2.u32All  = 0x0b0a0908;
+    r700->SPI_VS_OUT_ID_3.u32All  = 0x0f0e0d0c;
 
     r700->SPI_THREAD_GROUPING.u32All = 0;
     if (context->radeon.radeonScreen->chip_family >= CHIP_FAMILY_RV770)
 	    SETfield(r700->SPI_THREAD_GROUPING.u32All, 1, PS_GROUPING_shift, PS_GROUPING_mask);
 
-    /* screen */
-    r700->PA_SC_SCREEN_SCISSOR_TL.u32All = 0x0;
-
-    SETfield(r700->PA_SC_SCREEN_SCISSOR_BR.u32All,
-	     ((RADEONDRIPtr)(context->radeon.radeonScreen->driScreen->pDevPriv))->width,
-	     PA_SC_SCREEN_SCISSOR_BR__BR_X_shift, PA_SC_SCREEN_SCISSOR_BR__BR_X_mask);
-    SETfield(r700->PA_SC_SCREEN_SCISSOR_BR.u32All,
-	     ((RADEONDRIPtr)(context->radeon.radeonScreen->driScreen->pDevPriv))->height,
-	     PA_SC_SCREEN_SCISSOR_BR__BR_Y_shift, PA_SC_SCREEN_SCISSOR_BR__BR_Y_mask);
-
     /* 4 clip rectangles */ /* TODO : set these clip rects according to context->currentDraw->numClipRects */
     r700->PA_SC_CLIPRECT_RULE.u32All = 0;
     SETfield(r700->PA_SC_CLIPRECT_RULE.u32All, CLIP_RULE_mask, CLIP_RULE_shift, CLIP_RULE_mask);
@@ -1751,27 +1726,18 @@ void r700InitState(GLcontext * ctx) //-------------------
     r700InitSQConfig(ctx);
 
     r700ColorMask(ctx,
-		  ctx->Color.ColorMask[RCOMP],
-		  ctx->Color.ColorMask[GCOMP],
-		  ctx->Color.ColorMask[BCOMP],
-		  ctx->Color.ColorMask[ACOMP]);
+		  ctx->Color.ColorMask[0][RCOMP],
+		  ctx->Color.ColorMask[0][GCOMP],
+		  ctx->Color.ColorMask[0][BCOMP],
+		  ctx->Color.ColorMask[0][ACOMP]);
 
     r700Enable(ctx, GL_DEPTH_TEST, ctx->Depth.Test);
     r700DepthMask(ctx, ctx->Depth.Mask);
     r700DepthFunc(ctx, ctx->Depth.Func);
-    SETbit(r700->DB_SHADER_CONTROL.u32All, DUAL_EXPORT_ENABLE_bit);
-
     r700->DB_DEPTH_CLEAR.u32All     = 0x3F800000;
-
-    r700->DB_RENDER_CONTROL.u32All  = 0;
     SETbit(r700->DB_RENDER_CONTROL.u32All, STENCIL_COMPRESS_DISABLE_bit);
     SETbit(r700->DB_RENDER_CONTROL.u32All, DEPTH_COMPRESS_DISABLE_bit);
-    r700->DB_RENDER_OVERRIDE.u32All = 0;
-    if (context->radeon.radeonScreen->chip_family < CHIP_FAMILY_RV770)
-	    SETbit(r700->DB_RENDER_OVERRIDE.u32All, FORCE_SHADER_Z_ORDER_bit);
-    SETfield(r700->DB_RENDER_OVERRIDE.u32All, FORCE_DISABLE, FORCE_HIZ_ENABLE_shift, FORCE_HIZ_ENABLE_mask);
-    SETfield(r700->DB_RENDER_OVERRIDE.u32All, FORCE_DISABLE, FORCE_HIS_ENABLE0_shift, FORCE_HIS_ENABLE0_mask);
-    SETfield(r700->DB_RENDER_OVERRIDE.u32All, FORCE_DISABLE, FORCE_HIS_ENABLE1_shift, FORCE_HIS_ENABLE1_mask);
+    r700SetDBRenderState(ctx);
 
     r700->DB_ALPHA_TO_MASK.u32All = 0;
     SETfield(r700->DB_ALPHA_TO_MASK.u32All, 2, ALPHA_TO_MASK_OFFSET0_shift, ALPHA_TO_MASK_OFFSET0_mask);
@@ -1844,11 +1810,14 @@ void r700InitState(GLcontext * ctx) //-------------------
     /* Set up color compare mask */
     r700->CB_CLRCMP_MSK.u32All = 0xFFFFFFFF;
 
+    /* screen/window/view */
+    SETfield(r700->CB_SHADER_MASK.u32All, 0xF, (4 * id), OUTPUT0_ENABLE_mask);
+
     context->radeon.hw.all_dirty = GL_TRUE;
 
 }
 
-void r700InitStateFuncs(struct dd_function_table *functions) //-----------------
+void r700InitStateFuncs(radeonContextPtr radeon, struct dd_function_table *functions)
 {
 	functions->UpdateState = r700InvalidateState;
 	functions->AlphaFunc = r700AlphaFunc;
@@ -1889,8 +1858,13 @@ void r700InitStateFuncs(struct dd_function_table *functions) //-----------------
 
 	functions->Scissor = radeonScissor;
 
-	functions->DrawBuffer		= radeonDrawBuffer;
-	functions->ReadBuffer		= radeonReadBuffer;
+	functions->DrawBuffer = radeonDrawBuffer;
+	functions->ReadBuffer = radeonReadBuffer;
 
+	if (radeon->radeonScreen->kernel_mm) {
+		functions->CopyPixels = _mesa_meta_CopyPixels;
+		functions->DrawPixels = _mesa_meta_DrawPixels;
+		functions->ReadPixels = radeonReadPixels;
+	}
 }