X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=src%2Fmesa%2Fdrivers%2Fdri%2Fradeon%2Fradeon_blit.c;h=143822361e1504b001a3899adc5de0b9e35adee9;hb=7facb8f2c8aa4a59aac20bd571f76097634092e9;hp=8c3c2e47667c636a2899adc8b01d06f91ef06fbf;hpb=7959274858fe66a90e6f97fed81141c39cb6702b;p=mesa.git diff --git a/src/mesa/drivers/dri/radeon/radeon_blit.c b/src/mesa/drivers/dri/radeon/radeon_blit.c index 8c3c2e47667..143822361e1 100644 --- a/src/mesa/drivers/dri/radeon/radeon_blit.c +++ b/src/mesa/drivers/dri/radeon/radeon_blit.c @@ -48,6 +48,8 @@ unsigned r100_check_blit(gl_format mesa_format) case MESA_FORMAT_ARGB4444: case MESA_FORMAT_ARGB1555: case MESA_FORMAT_A8: + case MESA_FORMAT_L8: + case MESA_FORMAT_I8: break; default: return 0; @@ -103,6 +105,9 @@ static void inline emit_tx_setup(struct r100_context *r100, case MESA_FORMAT_ARGB8888: txformat |= RADEON_TXFORMAT_ARGB8888 | RADEON_TXFORMAT_ALPHA_IN_MAP; break; + case MESA_FORMAT_RGBA8888: + txformat |= RADEON_TXFORMAT_RGBA8888 | RADEON_TXFORMAT_ALPHA_IN_MAP; + break; case MESA_FORMAT_XRGB8888: txformat |= RADEON_TXFORMAT_ARGB8888; break; @@ -116,8 +121,15 @@ static void inline emit_tx_setup(struct r100_context *r100, txformat |= RADEON_TXFORMAT_ARGB1555 | RADEON_TXFORMAT_ALPHA_IN_MAP; break; case MESA_FORMAT_A8: + case MESA_FORMAT_I8: txformat |= RADEON_TXFORMAT_I8 | RADEON_TXFORMAT_ALPHA_IN_MAP; break; + case MESA_FORMAT_L8: + txformat |= RADEON_TXFORMAT_I8; + break; + case MESA_FORMAT_AL88: + txformat |= RADEON_TXFORMAT_AI88 | RADEON_TXFORMAT_ALPHA_IN_MAP; + break; default: break; } @@ -177,6 +189,8 @@ static inline void emit_cb_setup(struct r100_context *r100, dst_format = RADEON_COLOR_FORMAT_ARGB1555; break; case MESA_FORMAT_A8: + case MESA_FORMAT_L8: + case MESA_FORMAT_I8: dst_format = RADEON_COLOR_FORMAT_RGB8; break; default: @@ -208,18 +222,12 @@ static GLboolean validate_buffers(struct r100_context *r100, radeon_cs_space_reset_bos(r100->radeon.cmdbuf.cs); ret = radeon_cs_space_check_with_bo(r100->radeon.cmdbuf.cs, - src_bo, RADEON_GEM_DOMAIN_VRAM, 0); + src_bo, RADEON_GEM_DOMAIN_VRAM | RADEON_GEM_DOMAIN_GTT, 0); if (ret) return GL_FALSE; ret = radeon_cs_space_check_with_bo(r100->radeon.cmdbuf.cs, - dst_bo, 0, RADEON_GEM_DOMAIN_VRAM); - if (ret) - return GL_FALSE; - - ret = radeon_cs_space_check_with_bo(r100->radeon.cmdbuf.cs, - first_elem(&r100->radeon.dma.reserved)->bo, - RADEON_GEM_DOMAIN_GTT, 0); + dst_bo, 0, RADEON_GEM_DOMAIN_VRAM | RADEON_GEM_DOMAIN_GTT); if (ret) return GL_FALSE;