X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=src%2Fmesa%2Fdrivers%2Fdri%2Fradeon%2Fradeon_common_context.h;h=bd7343f4082300ad920e4edce9c9daefd08e903d;hb=7f0b6a5df8e360e52a97f59948dda927fe9df15e;hp=6de9f8a37b5159a6ad9fffc548a08f79acf1f2a1;hpb=88ec12539a65728225e720095a8105494ba772de;p=mesa.git diff --git a/src/mesa/drivers/dri/radeon/radeon_common_context.h b/src/mesa/drivers/dri/radeon/radeon_common_context.h index 6de9f8a37b5..bd7343f4082 100644 --- a/src/mesa/drivers/dri/radeon/radeon_common_context.h +++ b/src/mesa/drivers/dri/radeon/radeon_common_context.h @@ -2,13 +2,12 @@ #ifndef COMMON_CONTEXT_H #define COMMON_CONTEXT_H -#include "main/mm.h" #include "math/m_vector.h" #include "tnl/t_context.h" #include "main/colormac.h" -#include "radeon_debug.h" #include "radeon_screen.h" +#include "radeon_debug.h" #include "radeon_drm.h" #include "dri_util.h" #include "tnl/t_vertex.h" @@ -80,7 +79,8 @@ typedef struct radeon_context *radeonContextPtr; struct radeon_renderbuffer { - struct gl_renderbuffer base; + struct swrast_renderbuffer base; + struct radeon_bo *bo; unsigned int cpp; /* unsigned int offset; */ @@ -89,6 +89,8 @@ struct radeon_renderbuffer struct radeon_bo *map_bo; GLbitfield map_mode; int map_x, map_y, map_w, map_h; + int map_pitch; + void *map_buffer; uint32_t draw_offset; /* FBO */ /* boo Xorg 6.8.2 compat */ @@ -107,28 +109,18 @@ struct radeon_framebuffer struct radeon_colorbuffer_state { - GLuint clear; int roundEnable; struct gl_renderbuffer *rb; uint32_t draw_offset; /* offset into color renderbuffer - FBOs */ }; struct radeon_depthbuffer_state { - GLuint clear; struct gl_renderbuffer *rb; }; struct radeon_scissor_state { drm_clip_rect_t rect; GLboolean enabled; - - GLuint numClipRects; /* Cliprects active */ - GLuint numAllocedClipRects; /* Cliprects available */ - drm_clip_rect_t *pClipRects; -}; - -struct radeon_stencilbuffer_state { - GLuint clear; /* rb3d_stencilrefmask value */ }; struct radeon_state_atom { @@ -174,10 +166,11 @@ struct _radeon_texture_image { */ struct _radeon_mipmap_tree *mt; struct radeon_bo *bo; + GLboolean used_as_render_target; }; -static INLINE radeon_texture_image *get_radeon_texture_image(struct gl_texture_image *image) +static inline radeon_texture_image *get_radeon_texture_image(struct gl_texture_image *image) { return (radeon_texture_image*)image; } @@ -219,7 +212,7 @@ struct radeon_tex_obj { GLboolean border_fallback; }; -static INLINE radeonTexObj* radeon_tex_obj(struct gl_texture_object *texObj) +static inline radeonTexObj* radeon_tex_obj(struct gl_texture_object *texObj) { return (radeonTexObj*)texObj; } @@ -322,7 +315,7 @@ struct radeon_prim { GLuint prim; }; -static INLINE GLuint radeonPackColor(GLuint cpp, +static inline GLuint radeonPackColor(GLuint cpp, GLubyte r, GLubyte g, GLubyte b, GLubyte a) { @@ -348,17 +341,6 @@ struct radeon_store { int elts_start; }; -struct radeon_dri_mirror { - __DRIcontext *context; /* DRI context */ - __DRIscreen *screen; /* DRI screen */ - - drm_context_t hwContext; - drm_hw_lock_t *hwLock; - int hwLockCount; - int fd; - int drmMinor; -}; - typedef void (*radeon_tri_func) (radeonContextPtr, radeonVertex *, radeonVertex *, radeonVertex *); @@ -373,7 +355,6 @@ struct radeon_state { struct radeon_colorbuffer_state color; struct radeon_depthbuffer_state depth; struct radeon_scissor_state scissor; - struct radeon_stencilbuffer_state stencil; }; /** @@ -391,7 +372,8 @@ struct radeon_cmdbuf { }; struct radeon_context { - struct gl_context *glCtx; + struct gl_context glCtx; /**< base class, must be first */ + __DRIcontext *driContext; /* DRI context */ radeonScreenPtr radeonScreen; /* Screen private DRI data */ /* Texture object bookkeeping @@ -409,14 +391,10 @@ struct radeon_context { GLuint TclFallback; GLuint Fallback; GLuint NewGLState; - DECLARE_RENDERINPUTS(tnl_index_bitset); /* index of bits for last tnl_install_attrs */ + GLbitfield64 tnl_index_bitset; /* index of bits for last tnl_install_attrs */ /* Drawable information */ unsigned int lastStamp; - drm_radeon_sarea_t *sarea; /* Private SAREA data */ - - /* Mirrors of some DRI state */ - struct radeon_dri_mirror dri; /* Busy waiting */ GLuint do_usleeps; @@ -441,51 +419,30 @@ struct radeon_context { GLboolean front_cliprects; /** - * Set if rendering has occured to the drawable's front buffer. + * Set if rendering has occurred to the drawable's front buffer. * * This is used in the DRI2 case to detect that glFlush should also copy * the contents of the fake front buffer to the real front buffer. */ GLboolean front_buffer_dirty; - /** - * Track whether front-buffer rendering is currently enabled - * - * A separate flag is used to track this in order to support MRT more - * easily. - */ - GLboolean is_front_buffer_rendering; - - /** - * Track whether front-buffer is the current read target. - * - * This is closely associated with is_front_buffer_rendering, but may - * be set separately. The DRI2 fake front buffer must be referenced - * either way. - */ - GLboolean is_front_buffer_reading; - struct { struct radeon_query_object *current; struct radeon_state_atom queryobj; } query; struct { - void (*get_lock)(radeonContextPtr radeon); - void (*update_viewport_offset)(struct gl_context *ctx); - void (*emit_cs_header)(struct radeon_cs *cs, radeonContextPtr rmesa); void (*swtcl_flush)(struct gl_context *ctx, uint32_t offset); - void (*pre_emit_atoms)(radeonContextPtr rmesa); void (*pre_emit_state)(radeonContextPtr rmesa); void (*fallback)(struct gl_context *ctx, GLuint bit, GLboolean mode); void (*free_context)(struct gl_context *ctx); void (*emit_query_finish)(radeonContextPtr radeon); void (*update_scissor)(struct gl_context *ctx); - unsigned (*check_blit)(gl_format mesa_format); + unsigned (*check_blit)(mesa_format mesa_format, uint32_t dst_pitch); unsigned (*blit)(struct gl_context *ctx, struct radeon_bo *src_bo, intptr_t src_offset, - gl_format src_mesaformat, + mesa_format src_mesaformat, unsigned src_pitch, unsigned src_width, unsigned src_height, @@ -493,7 +450,7 @@ struct radeon_context { unsigned src_y_offset, struct radeon_bo *dst_bo, intptr_t dst_offset, - gl_format dst_mesaformat, + mesa_format dst_mesaformat, unsigned dst_pitch, unsigned dst_width, unsigned dst_height, @@ -502,23 +459,32 @@ struct radeon_context { unsigned reg_width, unsigned reg_height, unsigned flip_y); - unsigned (*is_format_renderable)(gl_format mesa_format); + unsigned (*is_format_renderable)(mesa_format mesa_format); + GLboolean (*revalidate_all_buffers)(struct gl_context *ctx); } vtbl; }; -#define RADEON_CONTEXT(glctx) ((radeonContextPtr)(ctx->DriverCtx)) +static inline radeonContextPtr RADEON_CONTEXT(struct gl_context *ctx) +{ + return (radeonContextPtr) ctx; +} static inline __DRIdrawable* radeon_get_drawable(radeonContextPtr radeon) { - return radeon->dri.context->driDrawablePriv; + return radeon->driContext->driDrawablePriv; } static inline __DRIdrawable* radeon_get_readable(radeonContextPtr radeon) { - return radeon->dri.context->driReadablePriv; + return radeon->driContext->driReadablePriv; } +extern const char *const radeonVendorString; + +const char *radeonGetRendererString(radeonScreenPtr radeonScreen); + GLboolean radeonInitContext(radeonContextPtr radeon, + gl_api api, struct dd_function_table* functions, const struct gl_config * glVisual, __DRIcontext * driContextPriv,