X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=src%2Fmesa%2Fdrivers%2Fdri%2Fradeon%2Fradeon_state.c;h=c6b1f38dd0204e6ca3e4760d5b379b7801eec01d;hb=5ca35c63673dad28854c00ce34ec6f085ba4ec5e;hp=ebae0792aa569fb9a9a2f783dbb342f0e1afa871;hpb=d1ca1599f0319f5c99852ce24420aa592e806db0;p=mesa.git

diff --git a/src/mesa/drivers/dri/radeon/radeon_state.c b/src/mesa/drivers/dri/radeon/radeon_state.c
index ebae0792aa5..c6b1f38dd02 100644
--- a/src/mesa/drivers/dri/radeon/radeon_state.c
+++ b/src/mesa/drivers/dri/radeon/radeon_state.c
@@ -29,7 +29,7 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 /*
  * Authors:
  *   Gareth Hughes <gareth@valinux.com>
- *   Keith Whitwell <keith@tungstengraphics.com>
+ *   Keith Whitwell <keithw@vmware.com>
  */
 
 #include "main/glheader.h"
@@ -39,13 +39,19 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #include "main/light.h"
 #include "main/context.h"
 #include "main/framebuffer.h"
-#include "main/simple_list.h"
+#include "main/fbobject.h"
+#include "util/simple_list.h"
+#include "main/state.h"
+#include "main/core.h"
+#include "main/stencil.h"
+#include "main/viewport.h"
 
 #include "vbo/vbo.h"
 #include "tnl/tnl.h"
 #include "tnl/t_pipeline.h"
 #include "swrast_setup/swrast_setup.h"
 #include "drivers/common/meta.h"
+#include "util/bitscan.h"
 
 #include "radeon_context.h"
 #include "radeon_mipmap_tree.h"
@@ -55,13 +61,13 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #include "radeon_tex.h"
 #include "radeon_swtcl.h"
 
-static void radeonUpdateSpecular( GLcontext *ctx );
+static void radeonUpdateSpecular( struct gl_context *ctx );
 
 /* =============================================================
  * Alpha blending
  */
 
-static void radeonAlphaFunc( GLcontext *ctx, GLenum func, GLfloat ref )
+static void radeonAlphaFunc( struct gl_context *ctx, GLenum func, GLfloat ref )
 {
    r100ContextPtr rmesa = R100_CONTEXT(ctx);
    int pp_misc = rmesa->hw.ctx.cmd[CTX_PP_MISC];
@@ -104,7 +110,7 @@ static void radeonAlphaFunc( GLcontext *ctx, GLenum func, GLfloat ref )
    rmesa->hw.ctx.cmd[CTX_PP_MISC] = pp_misc;
 }
 
-static void radeonBlendEquationSeparate( GLcontext *ctx,
+static void radeonBlendEquationSeparate( struct gl_context *ctx,
 					 GLenum modeRGB, GLenum modeA )
 {
    r100ContextPtr rmesa = R100_CONTEXT(ctx);
@@ -136,7 +142,7 @@ static void radeonBlendEquationSeparate( GLcontext *ctx,
       RADEON_STATECHANGE( rmesa, ctx );
       rmesa->hw.ctx.cmd[CTX_RB3D_BLENDCNTL] = b;
       if ( (ctx->Color.ColorLogicOpEnabled || (ctx->Color.BlendEnabled
-	    && ctx->Color.BlendEquationRGB == GL_LOGIC_OP)) ) {
+	    && ctx->Color.Blend[0].EquationRGB == GL_LOGIC_OP)) ) {
 	 rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] |=  RADEON_ROP_ENABLE;
       } else {
 	 rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] &= ~RADEON_ROP_ENABLE;
@@ -144,7 +150,7 @@ static void radeonBlendEquationSeparate( GLcontext *ctx,
    }
 }
 
-static void radeonBlendFuncSeparate( GLcontext *ctx,
+static void radeonBlendFuncSeparate( struct gl_context *ctx,
 				     GLenum sfactorRGB, GLenum dfactorRGB,
 				     GLenum sfactorA, GLenum dfactorA )
 {
@@ -153,7 +159,7 @@ static void radeonBlendFuncSeparate( GLcontext *ctx,
       ~(RADEON_SRC_BLEND_MASK | RADEON_DST_BLEND_MASK);
    GLboolean fallback = GL_FALSE;
 
-   switch ( ctx->Color.BlendSrcRGB ) {
+   switch ( ctx->Color.Blend[0].SrcRGB ) {
    case GL_ZERO:
       b |= RADEON_SRC_BLEND_GL_ZERO;
       break;
@@ -200,7 +206,7 @@ static void radeonBlendFuncSeparate( GLcontext *ctx,
       break;
    }
 
-   switch ( ctx->Color.BlendDstRGB ) {
+   switch ( ctx->Color.Blend[0].DstRGB ) {
    case GL_ZERO:
       b |= RADEON_DST_BLEND_GL_ZERO;
       break;
@@ -256,7 +262,7 @@ static void radeonBlendFuncSeparate( GLcontext *ctx,
  * Depth testing
  */
 
-static void radeonDepthFunc( GLcontext *ctx, GLenum func )
+static void radeonDepthFunc( struct gl_context *ctx, GLenum func )
 {
    r100ContextPtr rmesa = R100_CONTEXT(ctx);
 
@@ -292,7 +298,7 @@ static void radeonDepthFunc( GLcontext *ctx, GLenum func )
 }
 
 
-static void radeonDepthMask( GLcontext *ctx, GLboolean flag )
+static void radeonDepthMask( struct gl_context *ctx, GLboolean flag )
 {
    r100ContextPtr rmesa = R100_CONTEXT(ctx);
    RADEON_STATECHANGE( rmesa, ctx );
@@ -304,33 +310,17 @@ static void radeonDepthMask( GLcontext *ctx, GLboolean flag )
    }
 }
 
-static void radeonClearDepth( GLcontext *ctx, GLclampd d )
-{
-   r100ContextPtr rmesa = R100_CONTEXT(ctx);
-   GLuint format = (rmesa->hw.ctx.cmd[CTX_RB3D_ZSTENCILCNTL] &
-		    RADEON_DEPTH_FORMAT_MASK);
-
-   switch ( format ) {
-   case RADEON_DEPTH_FORMAT_16BIT_INT_Z:
-      rmesa->radeon.state.depth.clear = d * 0x0000ffff;
-      break;
-   case RADEON_DEPTH_FORMAT_24BIT_INT_Z:
-      rmesa->radeon.state.depth.clear = d * 0x00ffffff;
-      break;
-   }
-}
-
 
 /* =============================================================
  * Fog
  */
 
 
-static void radeonFogfv( GLcontext *ctx, GLenum pname, const GLfloat *param )
+static void radeonFogfv( struct gl_context *ctx, GLenum pname, const GLfloat *param )
 {
    r100ContextPtr rmesa = R100_CONTEXT(ctx);
    union { int i; float f; } c, d;
-   GLchan col[4];
+   GLubyte col[4];
 
    switch (pname) {
    case GL_FOG_MODE:
@@ -394,7 +384,7 @@ static void radeonFogfv( GLcontext *ctx, GLenum pname, const GLfloat *param )
       break;
    case GL_FOG_COLOR:
       RADEON_STATECHANGE( rmesa, ctx );
-      UNCLAMPED_FLOAT_TO_RGB_CHAN( col, ctx->Fog.Color );
+      _mesa_unclamped_float_rgba_to_ubyte(col, ctx->Fog.Color );
       rmesa->hw.ctx.cmd[CTX_PP_FOG_COLOR] &= ~RADEON_FOG_COLOR_MASK;
       rmesa->hw.ctx.cmd[CTX_PP_FOG_COLOR] |=
 	 radeonPackColor( 4, col[0], col[1], col[2], 0 );
@@ -411,7 +401,7 @@ static void radeonFogfv( GLcontext *ctx, GLenum pname, const GLfloat *param )
  * Culling
  */
 
-static void radeonCullFace( GLcontext *ctx, GLenum unused )
+static void radeonCullFace( struct gl_context *ctx, GLenum unused )
 {
    r100ContextPtr rmesa = R100_CONTEXT(ctx);
    GLuint s = rmesa->hw.set.cmd[SET_SE_CNTL];
@@ -448,9 +438,10 @@ static void radeonCullFace( GLcontext *ctx, GLenum unused )
    }
 }
 
-static void radeonFrontFace( GLcontext *ctx, GLenum mode )
+static void radeonFrontFace( struct gl_context *ctx, GLenum mode )
 {
    r100ContextPtr rmesa = R100_CONTEXT(ctx);
+   int cull_face = (mode == GL_CW) ? RADEON_FFACE_CULL_CW : RADEON_FFACE_CULL_CCW;
 
    RADEON_STATECHANGE( rmesa, set );
    rmesa->hw.set.cmd[SET_SE_CNTL] &= ~RADEON_FFACE_CULL_DIR_MASK;
@@ -459,25 +450,19 @@ static void radeonFrontFace( GLcontext *ctx, GLenum mode )
    rmesa->hw.tcl.cmd[TCL_UCP_VERT_BLEND_CTL] &= ~RADEON_CULL_FRONT_IS_CCW;
 
    /* Winding is inverted when rendering to FBO */
-   if (ctx->DrawBuffer && ctx->DrawBuffer->Name)
-      mode = (mode == GL_CW) ? GL_CCW : GL_CW;
+   if (ctx->DrawBuffer && _mesa_is_user_fbo(ctx->DrawBuffer))
+      cull_face = (mode == GL_CCW) ? RADEON_FFACE_CULL_CW : RADEON_FFACE_CULL_CCW;
+   rmesa->hw.set.cmd[SET_SE_CNTL] |= cull_face;
 
-   switch ( mode ) {
-   case GL_CW:
-      rmesa->hw.set.cmd[SET_SE_CNTL] |= RADEON_FFACE_CULL_CW;
-      break;
-   case GL_CCW:
-      rmesa->hw.set.cmd[SET_SE_CNTL] |= RADEON_FFACE_CULL_CCW;
+   if ( mode == GL_CCW )
       rmesa->hw.tcl.cmd[TCL_UCP_VERT_BLEND_CTL] |= RADEON_CULL_FRONT_IS_CCW;
-      break;
-   }
 }
 
 
 /* =============================================================
  * Line state
  */
-static void radeonLineWidth( GLcontext *ctx, GLfloat widthf )
+static void radeonLineWidth( struct gl_context *ctx, GLfloat widthf )
 {
    r100ContextPtr rmesa = R100_CONTEXT(ctx);
 
@@ -494,7 +479,7 @@ static void radeonLineWidth( GLcontext *ctx, GLfloat widthf )
    }
 }
 
-static void radeonLineStipple( GLcontext *ctx, GLint factor, GLushort pattern )
+static void radeonLineStipple( struct gl_context *ctx, GLint factor, GLushort pattern )
 {
    r100ContextPtr rmesa = R100_CONTEXT(ctx);
 
@@ -507,7 +492,7 @@ static void radeonLineStipple( GLcontext *ctx, GLint factor, GLushort pattern )
 /* =============================================================
  * Masks
  */
-static void radeonColorMask( GLcontext *ctx,
+static void radeonColorMask( struct gl_context *ctx,
 			     GLboolean r, GLboolean g,
 			     GLboolean b, GLboolean a )
 {
@@ -536,8 +521,8 @@ static void radeonColorMask( GLcontext *ctx,
  * Polygon state
  */
 
-static void radeonPolygonOffset( GLcontext *ctx,
-				 GLfloat factor, GLfloat units )
+static void radeonPolygonOffset( struct gl_context *ctx,
+				 GLfloat factor, GLfloat units, GLfloat clamp )
 {
    r100ContextPtr rmesa = R100_CONTEXT(ctx);
    const GLfloat depthScale = 1.0F / ctx->DrawBuffer->_DepthMaxF;
@@ -549,40 +534,16 @@ static void radeonPolygonOffset( GLcontext *ctx,
    rmesa->hw.zbs.cmd[ZBS_SE_ZBIAS_CONSTANT] = constant.ui32;
 }
 
-static void radeonPolygonStipplePreKMS( GLcontext *ctx, const GLubyte *mask )
+static void radeonPolygonMode( struct gl_context *ctx, GLenum face, GLenum mode )
 {
    r100ContextPtr rmesa = R100_CONTEXT(ctx);
-   GLuint i;
-   drm_radeon_stipple_t stipple;
-
-   /* Must flip pattern upside down.
-    */
-   for ( i = 0 ; i < 32 ; i++ ) {
-      rmesa->state.stipple.mask[31 - i] = ((GLuint *) mask)[i];
-   }
-
-   /* TODO: push this into cmd mechanism
-    */
-   radeon_firevertices(&rmesa->radeon);
-   LOCK_HARDWARE( &rmesa->radeon );
-
-   /* FIXME: Use window x,y offsets into stipple RAM.
-    */
-   stipple.mask = rmesa->state.stipple.mask;
-   drmCommandWrite( rmesa->radeon.dri.fd, DRM_RADEON_STIPPLE,
-		    &stipple, sizeof(drm_radeon_stipple_t) );
-   UNLOCK_HARDWARE( &rmesa->radeon );
-}
-
-static void radeonPolygonMode( GLcontext *ctx, GLenum face, GLenum mode )
-{
-   r100ContextPtr rmesa = R100_CONTEXT(ctx);
-   GLboolean flag = (ctx->_TriangleCaps & DD_TRI_UNFILLED) != 0;
+   GLboolean unfilled = (ctx->Polygon.FrontMode != GL_FILL ||
+                         ctx->Polygon.BackMode != GL_FILL);
 
    /* Can't generally do unfilled via tcl, but some good special
     * cases work.
     */
-   TCL_FALLBACK( ctx, RADEON_TCL_FALLBACK_UNFILLED, flag);
+   TCL_FALLBACK( ctx, RADEON_TCL_FALLBACK_UNFILLED, unfilled);
    if (rmesa->radeon.TclFallback) {
       radeonChooseRenderState( ctx );
       radeonChooseVertexState( ctx );
@@ -601,7 +562,7 @@ static void radeonPolygonMode( GLcontext *ctx, GLenum face, GLenum mode )
 /* Examine lighting and texture state to determine if separate specular
  * should be enabled.
  */
-static void radeonUpdateSpecular( GLcontext *ctx )
+static void radeonUpdateSpecular( struct gl_context *ctx )
 {
    r100ContextPtr rmesa = R100_CONTEXT(ctx);
    uint32_t p = rmesa->hw.ctx.cmd[CTX_PP_CNTL];
@@ -661,7 +622,7 @@ static void radeonUpdateSpecular( GLcontext *ctx )
 
    TCL_FALLBACK( ctx, RADEON_TCL_FALLBACK_FOGCOORDSPEC, flag);
 
-   if (NEED_SECONDARY_COLOR(ctx)) {
+   if (_mesa_need_secondary_color(ctx)) {
       assert( (p & RADEON_SPECULAR_ENABLE) != 0 );
    } else {
       assert( (p & RADEON_SPECULAR_ENABLE) == 0 );
@@ -689,7 +650,7 @@ static void radeonUpdateSpecular( GLcontext *ctx )
 /* Update on colormaterial, material emmissive/ambient,
  * lightmodel.globalambient
  */
-static void update_global_ambient( GLcontext *ctx )
+static void update_global_ambient( struct gl_context *ctx )
 {
    r100ContextPtr rmesa = R100_CONTEXT(ctx);
    float *fcmd = (float *)RADEON_DB_STATE( glt );
@@ -719,11 +680,11 @@ static void update_global_ambient( GLcontext *ctx )
  *    - light[p].colors
  *    - light[p].enabled
  */
-static void update_light_colors( GLcontext *ctx, GLuint p )
+static void update_light_colors( struct gl_context *ctx, GLuint p )
 {
    struct gl_light *l = &ctx->Light.Light[p];
 
-/*     fprintf(stderr, "%s\n", __FUNCTION__); */
+/*     fprintf(stderr, "%s\n", __func__); */
 
    if (l->Enabled) {
       r100ContextPtr rmesa = R100_CONTEXT(ctx);
@@ -739,15 +700,15 @@ static void update_light_colors( GLcontext *ctx, GLuint p )
 
 /* Also fallback for asym colormaterial mode in twoside lighting...
  */
-static void check_twoside_fallback( GLcontext *ctx )
+static void check_twoside_fallback( struct gl_context *ctx )
 {
    GLboolean fallback = GL_FALSE;
    GLint i;
 
    if (ctx->Light.Enabled && ctx->Light.Model.TwoSide) {
       if (ctx->Light.ColorMaterialEnabled &&
-	  (ctx->Light.ColorMaterialBitmask & BACK_MATERIAL_BITS) !=
-	  ((ctx->Light.ColorMaterialBitmask & FRONT_MATERIAL_BITS)<<1))
+	  (ctx->Light._ColorMaterialBitmask & BACK_MATERIAL_BITS) !=
+	  ((ctx->Light._ColorMaterialBitmask & FRONT_MATERIAL_BITS)<<1))
 	 fallback = GL_TRUE;
       else {
 	 for (i = MAT_ATTRIB_FRONT_AMBIENT; i < MAT_ATTRIB_FRONT_INDEXES; i+=2)
@@ -764,7 +725,7 @@ static void check_twoside_fallback( GLcontext *ctx )
 }
 
 
-static void radeonColorMaterial( GLcontext *ctx, GLenum face, GLenum mode )
+static void radeonColorMaterial( struct gl_context *ctx, GLenum face, GLenum mode )
 {
       r100ContextPtr rmesa = R100_CONTEXT(ctx);
       GLuint light_model_ctl1 = rmesa->hw.tcl.cmd[TCL_LIGHT_MODEL_CTL];
@@ -775,7 +736,7 @@ static void radeonColorMaterial( GLcontext *ctx, GLenum face, GLenum mode )
 			   (3 << RADEON_SPECULAR_SOURCE_SHIFT));
 
    if (ctx->Light.ColorMaterialEnabled) {
-      GLuint mask = ctx->Light.ColorMaterialBitmask;
+      GLuint mask = ctx->Light._ColorMaterialBitmask;
 
       if (mask & MAT_BIT_FRONT_EMISSION) {
 	 light_model_ctl1 |= (RADEON_LM_SOURCE_VERTEX_DIFFUSE <<
@@ -828,7 +789,7 @@ static void radeonColorMaterial( GLcontext *ctx, GLenum face, GLenum mode )
    }
 }
 
-void radeonUpdateMaterial( GLcontext *ctx )
+void radeonUpdateMaterial( struct gl_context *ctx )
 {
    r100ContextPtr rmesa = R100_CONTEXT(ctx);
    GLfloat (*mat)[4] = ctx->Light.Material.Attrib;
@@ -836,10 +797,10 @@ void radeonUpdateMaterial( GLcontext *ctx )
    GLuint mask = ~0;
 
    if (ctx->Light.ColorMaterialEnabled)
-      mask &= ~ctx->Light.ColorMaterialBitmask;
+      mask &= ~ctx->Light._ColorMaterialBitmask;
 
    if (RADEON_DEBUG & RADEON_STATE)
-      fprintf(stderr, "%s\n", __FUNCTION__);
+      fprintf(stderr, "%s\n", __func__);
 
 
    if (mask & MAT_BIT_FRONT_EMISSION) {
@@ -893,7 +854,7 @@ void radeonUpdateMaterial( GLcontext *ctx )
  * lighting space (model or eye), hence dependencies on _NEW_MODELVIEW
  * and _MESA_NEW_NEED_EYE_COORDS.
  */
-static void update_light( GLcontext *ctx )
+static void update_light( struct gl_context *ctx )
 {
    r100ContextPtr rmesa = R100_CONTEXT(ctx);
 
@@ -932,32 +893,31 @@ static void update_light( GLcontext *ctx )
 
 
    if (ctx->Light.Enabled) {
-      GLint p;
-      for (p = 0 ; p < MAX_LIGHTS; p++) {
-	 if (ctx->Light.Light[p].Enabled) {
-	    struct gl_light *l = &ctx->Light.Light[p];
-	    GLfloat *fcmd = (GLfloat *)RADEON_DB_STATE( lit[p] );
-
-	    if (l->EyePosition[3] == 0.0) {
-	       COPY_3FV( &fcmd[LIT_POSITION_X], l->_VP_inf_norm );
-	       COPY_3FV( &fcmd[LIT_DIRECTION_X], l->_h_inf_norm );
-	       fcmd[LIT_POSITION_W] = 0;
-	       fcmd[LIT_DIRECTION_W] = 0;
-	    } else {
-	       COPY_4V( &fcmd[LIT_POSITION_X], l->_Position );
-	       fcmd[LIT_DIRECTION_X] = -l->_NormSpotDirection[0];
-	       fcmd[LIT_DIRECTION_Y] = -l->_NormSpotDirection[1];
-	       fcmd[LIT_DIRECTION_Z] = -l->_NormSpotDirection[2];
-	       fcmd[LIT_DIRECTION_W] = 0;
-	    }
+      GLbitfield mask = ctx->Light._EnabledLights;
+      while (mask) {
+         const int p = u_bit_scan(&mask);
+         struct gl_light *l = &ctx->Light.Light[p];
+         GLfloat *fcmd = (GLfloat *)RADEON_DB_STATE( lit[p] );
+
+         if (l->EyePosition[3] == 0.0) {
+            COPY_3FV( &fcmd[LIT_POSITION_X], l->_VP_inf_norm );
+            COPY_3FV( &fcmd[LIT_DIRECTION_X], l->_h_inf_norm );
+            fcmd[LIT_POSITION_W] = 0;
+            fcmd[LIT_DIRECTION_W] = 0;
+         } else {
+            COPY_4V( &fcmd[LIT_POSITION_X], l->_Position );
+            fcmd[LIT_DIRECTION_X] = -l->_NormSpotDirection[0];
+            fcmd[LIT_DIRECTION_Y] = -l->_NormSpotDirection[1];
+            fcmd[LIT_DIRECTION_Z] = -l->_NormSpotDirection[2];
+            fcmd[LIT_DIRECTION_W] = 0;
+         }
 
-	    RADEON_DB_STATECHANGE( rmesa, &rmesa->hw.lit[p] );
-	 }
+         RADEON_DB_STATECHANGE( rmesa, &rmesa->hw.lit[p] );
       }
    }
 }
 
-static void radeonLightfv( GLcontext *ctx, GLenum light,
+static void radeonLightfv( struct gl_context *ctx, GLenum light,
 			   GLenum pname, const GLfloat *params )
 {
    r100ContextPtr rmesa = R100_CONTEXT(ctx);
@@ -1078,7 +1038,7 @@ static void radeonLightfv( GLcontext *ctx, GLenum light,
 
 
 
-static void radeonLightModelfv( GLcontext *ctx, GLenum pname,
+static void radeonLightModelfv( struct gl_context *ctx, GLenum pname,
 				const GLfloat *param )
 {
    r100ContextPtr rmesa = R100_CONTEXT(ctx);
@@ -1120,7 +1080,7 @@ static void radeonLightModelfv( GLcontext *ctx, GLenum pname,
    }
 }
 
-static void radeonShadeModel( GLcontext *ctx, GLenum mode )
+static void radeonShadeModel( struct gl_context *ctx, GLenum mode )
 {
    r100ContextPtr rmesa = R100_CONTEXT(ctx);
    GLuint s = rmesa->hw.set.cmd[SET_SE_CNTL];
@@ -1158,7 +1118,7 @@ static void radeonShadeModel( GLcontext *ctx, GLenum mode )
  * User clip planes
  */
 
-static void radeonClipPlane( GLcontext *ctx, GLenum plane, const GLfloat *eq )
+static void radeonClipPlane( struct gl_context *ctx, GLenum plane, const GLfloat *eq )
 {
    GLint p = (GLint) plane - (GLint) GL_CLIP_PLANE0;
    r100ContextPtr rmesa = R100_CONTEXT(ctx);
@@ -1171,21 +1131,20 @@ static void radeonClipPlane( GLcontext *ctx, GLenum plane, const GLfloat *eq )
    rmesa->hw.ucp[p].cmd[UCP_W] = ip[3];
 }
 
-static void radeonUpdateClipPlanes( GLcontext *ctx )
+static void radeonUpdateClipPlanes( struct gl_context *ctx )
 {
    r100ContextPtr rmesa = R100_CONTEXT(ctx);
-   GLuint p;
+   GLbitfield mask = ctx->Transform.ClipPlanesEnabled;
 
-   for (p = 0; p < ctx->Const.MaxClipPlanes; p++) {
-      if (ctx->Transform.ClipPlanesEnabled & (1 << p)) {
-	 GLint *ip = (GLint *)ctx->Transform._ClipUserPlane[p];
+   while (mask) {
+      const int p = u_bit_scan(&mask);
+      GLint *ip = (GLint *)ctx->Transform._ClipUserPlane[p];
 
-	 RADEON_STATECHANGE( rmesa, ucp[p] );
-	 rmesa->hw.ucp[p].cmd[UCP_X] = ip[0];
-	 rmesa->hw.ucp[p].cmd[UCP_Y] = ip[1];
-	 rmesa->hw.ucp[p].cmd[UCP_Z] = ip[2];
-	 rmesa->hw.ucp[p].cmd[UCP_W] = ip[3];
-      }
+      RADEON_STATECHANGE( rmesa, ucp[p] );
+      rmesa->hw.ucp[p].cmd[UCP_X] = ip[0];
+      rmesa->hw.ucp[p].cmd[UCP_Y] = ip[1];
+      rmesa->hw.ucp[p].cmd[UCP_Z] = ip[2];
+      rmesa->hw.ucp[p].cmd[UCP_W] = ip[3];
    }
 }
 
@@ -1195,11 +1154,11 @@ static void radeonUpdateClipPlanes( GLcontext *ctx )
  */
 
 static void
-radeonStencilFuncSeparate( GLcontext *ctx, GLenum face, GLenum func,
+radeonStencilFuncSeparate( struct gl_context *ctx, GLenum face, GLenum func,
                            GLint ref, GLuint mask )
 {
    r100ContextPtr rmesa = R100_CONTEXT(ctx);
-   GLuint refmask = (((ctx->Stencil.Ref[0] & 0xff) << RADEON_STENCIL_REF_SHIFT) |
+   GLuint refmask = ((_mesa_get_stencil_ref(ctx, 0) << RADEON_STENCIL_REF_SHIFT) |
 		     ((ctx->Stencil.ValueMask[0] & 0xff) << RADEON_STENCIL_MASK_SHIFT));
 
    RADEON_STATECHANGE( rmesa, ctx );
@@ -1240,7 +1199,7 @@ radeonStencilFuncSeparate( GLcontext *ctx, GLenum face, GLenum func,
 }
 
 static void
-radeonStencilMaskSeparate( GLcontext *ctx, GLenum face, GLuint mask )
+radeonStencilMaskSeparate( struct gl_context *ctx, GLenum face, GLuint mask )
 {
    r100ContextPtr rmesa = R100_CONTEXT(ctx);
 
@@ -1250,7 +1209,7 @@ radeonStencilMaskSeparate( GLcontext *ctx, GLenum face, GLuint mask )
       ((ctx->Stencil.WriteMask[0] & 0xff) << RADEON_STENCIL_WRITEMASK_SHIFT);
 }
 
-static void radeonStencilOpSeparate( GLcontext *ctx, GLenum face, GLenum fail,
+static void radeonStencilOpSeparate( struct gl_context *ctx, GLenum face, GLenum fail,
                                      GLenum zfail, GLenum zpass )
 {
    r100ContextPtr rmesa = R100_CONTEXT(ctx);
@@ -1370,15 +1329,6 @@ static void radeonStencilOpSeparate( GLcontext *ctx, GLenum face, GLenum fail,
    }
 }
 
-static void radeonClearStencil( GLcontext *ctx, GLint s )
-{
-   r100ContextPtr rmesa = R100_CONTEXT(ctx);
-
-   rmesa->radeon.state.stencil.clear =
-      ((GLuint) (ctx->Stencil.Clear & 0xff) |
-       (0xff << RADEON_STENCIL_MASK_SHIFT) |
-       ((ctx->Stencil.WriteMask[0] & 0xff) << RADEON_STENCIL_WRITEMASK_SHIFT));
-}
 
 
 /* =============================================================
@@ -1396,15 +1346,14 @@ static void radeonClearStencil( GLcontext *ctx, GLint s )
  * Called when window size or position changes or viewport or depth range
  * state is changed.  We update the hardware viewport state here.
  */
-void radeonUpdateWindow( GLcontext *ctx )
+void radeonUpdateWindow( struct gl_context *ctx )
 {
    r100ContextPtr rmesa = R100_CONTEXT(ctx);
    __DRIdrawable *dPriv = radeon_get_drawable(&rmesa->radeon);
-   GLfloat xoffset = dPriv ? (GLfloat) dPriv->x : 0;
-   GLfloat yoffset = dPriv ? (GLfloat) dPriv->y + dPriv->h : 0;
-   const GLfloat *v = ctx->Viewport._WindowMap.m;
-   const GLboolean render_to_fbo = (ctx->DrawBuffer ? (ctx->DrawBuffer->Name != 0) : 0);
-   const GLfloat depthScale = 1.0F / ctx->DrawBuffer->_DepthMaxF;
+   GLfloat xoffset = 0.0;
+   GLfloat yoffset = dPriv ? (GLfloat) dPriv->h : 0;
+   const GLboolean render_to_fbo = (ctx->DrawBuffer ? _mesa_is_user_fbo(ctx->DrawBuffer) : 0);
+   float scale[3], translate[3];
    GLfloat y_scale, y_bias;
 
    if (render_to_fbo) {
@@ -1415,12 +1364,13 @@ void radeonUpdateWindow( GLcontext *ctx )
       y_bias = yoffset;
    }
 
-   float_ui32_type sx = { v[MAT_SX] };
-   float_ui32_type tx = { v[MAT_TX] + xoffset + SUBPIXEL_X };
-   float_ui32_type sy = { v[MAT_SY] * y_scale };
-   float_ui32_type ty = { (v[MAT_TY] * y_scale) + y_bias + SUBPIXEL_Y };
-   float_ui32_type sz = { v[MAT_SZ] * depthScale };
-   float_ui32_type tz = { v[MAT_TZ] * depthScale };
+   _mesa_get_viewport_xform(ctx, 0, scale, translate);
+   float_ui32_type sx = { scale[0] };
+   float_ui32_type sy = { scale[1] * y_scale };
+   float_ui32_type sz = { scale[2] };
+   float_ui32_type tx = { translate[0] + xoffset + SUBPIXEL_X };
+   float_ui32_type ty = { (translate[1] * y_scale) + y_bias + SUBPIXEL_Y };
+   float_ui32_type tz = { translate[2] };
 
    RADEON_STATECHANGE( rmesa, vpt );
 
@@ -1433,8 +1383,7 @@ void radeonUpdateWindow( GLcontext *ctx )
 }
 
 
-static void radeonViewport( GLcontext *ctx, GLint x, GLint y,
-			    GLsizei width, GLsizei height )
+static void radeonViewport(struct gl_context *ctx)
 {
    /* Don't pipeline viewport changes, conflict with window offset
     * setting below.  Could apply deltas to rescue pipelined viewport
@@ -1442,91 +1391,19 @@ static void radeonViewport( GLcontext *ctx, GLint x, GLint y,
     */
    radeonUpdateWindow( ctx );
 
-   radeon_viewport(ctx, x, y, width, height);
+   radeon_viewport(ctx);
 }
 
-static void radeonDepthRange( GLcontext *ctx, GLclampd nearval,
-			      GLclampd farval )
+static void radeonDepthRange(struct gl_context *ctx)
 {
    radeonUpdateWindow( ctx );
 }
 
-void radeonUpdateViewportOffset( GLcontext *ctx )
-{
-   r100ContextPtr rmesa = R100_CONTEXT(ctx);
-   __DRIdrawable *dPriv = radeon_get_drawable(&rmesa->radeon);
-   GLfloat xoffset = (GLfloat)dPriv->x;
-   GLfloat yoffset = (GLfloat)dPriv->y + dPriv->h;
-   const GLfloat *v = ctx->Viewport._WindowMap.m;
-
-   float_ui32_type tx;
-   float_ui32_type ty;
-
-   tx.f = v[MAT_TX] + xoffset + SUBPIXEL_X;
-   ty.f = (- v[MAT_TY]) + yoffset + SUBPIXEL_Y;
-
-   if ( rmesa->hw.vpt.cmd[VPT_SE_VPORT_XOFFSET] != tx.ui32 ||
-	rmesa->hw.vpt.cmd[VPT_SE_VPORT_YOFFSET] != ty.ui32 )
-   {
-      /* Note: this should also modify whatever data the context reset
-       * code uses...
-       */
-      RADEON_STATECHANGE( rmesa, vpt );
-      rmesa->hw.vpt.cmd[VPT_SE_VPORT_XOFFSET] = tx.ui32;
-      rmesa->hw.vpt.cmd[VPT_SE_VPORT_YOFFSET] = ty.ui32;
-
-      /* update polygon stipple x/y screen offset */
-      {
-         GLuint stx, sty;
-         GLuint m = rmesa->hw.msc.cmd[MSC_RE_MISC];
-
-         m &= ~(RADEON_STIPPLE_X_OFFSET_MASK |
-                RADEON_STIPPLE_Y_OFFSET_MASK);
-
-         /* add magic offsets, then invert */
-         stx = 31 - ((dPriv->x - 1) & RADEON_STIPPLE_COORD_MASK);
-         sty = 31 - ((dPriv->y + dPriv->h - 1)
-                     & RADEON_STIPPLE_COORD_MASK);
-
-         m |= ((stx << RADEON_STIPPLE_X_OFFSET_SHIFT) |
-               (sty << RADEON_STIPPLE_Y_OFFSET_SHIFT));
-
-         if ( rmesa->hw.msc.cmd[MSC_RE_MISC] != m ) {
-            RADEON_STATECHANGE( rmesa, msc );
-	    rmesa->hw.msc.cmd[MSC_RE_MISC] = m;
-         }
-      }
-   }
-
-   radeonUpdateScissor( ctx );
-}
-
-
-
 /* =============================================================
  * Miscellaneous
  */
 
-static void radeonClearColor( GLcontext *ctx, const GLfloat color[4] )
-{
-   r100ContextPtr rmesa = R100_CONTEXT(ctx);
-   GLubyte c[4];
-   struct radeon_renderbuffer *rrb;
-
-   rrb = radeon_get_colorbuffer(&rmesa->radeon);
-   if (!rrb)
-     return;
-     
-   CLAMPED_FLOAT_TO_UBYTE(c[0], color[0]);
-   CLAMPED_FLOAT_TO_UBYTE(c[1], color[1]);
-   CLAMPED_FLOAT_TO_UBYTE(c[2], color[2]);
-   CLAMPED_FLOAT_TO_UBYTE(c[3], color[3]);
-   rmesa->radeon.state.color.clear = radeonPackColor( rrb->cpp,
-					       c[0], c[1], c[2], c[3] );
-}
-
-
-static void radeonRenderMode( GLcontext *ctx, GLenum mode )
+static void radeonRenderMode( struct gl_context *ctx, GLenum mode )
 {
    r100ContextPtr rmesa = R100_CONTEXT(ctx);
    FALLBACK( rmesa, RADEON_FALLBACK_RENDER_MODE, (mode != GL_RENDER) );
@@ -1552,12 +1429,12 @@ static GLuint radeon_rop_tab[] = {
    RADEON_ROP_SET,
 };
 
-static void radeonLogicOpCode( GLcontext *ctx, GLenum opcode )
+static void radeonLogicOpCode( struct gl_context *ctx, GLenum opcode )
 {
    r100ContextPtr rmesa = R100_CONTEXT(ctx);
    GLuint rop = (GLuint)opcode - GL_CLEAR;
 
-   ASSERT( rop < 16 );
+   assert( rop < 16 );
 
    RADEON_STATECHANGE( rmesa, msk );
    rmesa->hw.msk.cmd[MSK_RB3D_ROPCNTL] = radeon_rop_tab[rop];
@@ -1567,14 +1444,14 @@ static void radeonLogicOpCode( GLcontext *ctx, GLenum opcode )
  * State enable/disable
  */
 
-static void radeonEnable( GLcontext *ctx, GLenum cap, GLboolean state )
+static void radeonEnable( struct gl_context *ctx, GLenum cap, GLboolean state )
 {
    r100ContextPtr rmesa = R100_CONTEXT(ctx);
    GLuint p, flag;
 
    if ( RADEON_DEBUG & RADEON_STATE )
-      fprintf( stderr, "%s( %s = %s )\n", __FUNCTION__,
-	       _mesa_lookup_enum_by_nr( cap ),
+      fprintf( stderr, "%s( %s = %s )\n", __func__,
+	       _mesa_enum_to_string( cap ),
 	       state ? "GL_TRUE" : "GL_FALSE" );
 
    switch ( cap ) {
@@ -1602,7 +1479,7 @@ static void radeonEnable( GLcontext *ctx, GLenum cap, GLboolean state )
 	 rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] &= ~RADEON_ALPHA_BLEND_ENABLE;
       }
       if ( (ctx->Color.ColorLogicOpEnabled || (ctx->Color.BlendEnabled
-	    && ctx->Color.BlendEquationRGB == GL_LOGIC_OP)) ) {
+	    && ctx->Color.Blend[0].EquationRGB == GL_LOGIC_OP)) ) {
 	 rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] |=  RADEON_ROP_ENABLE;
       } else {
 	 rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] &= ~RADEON_ROP_ENABLE;
@@ -1612,12 +1489,12 @@ static void radeonEnable( GLcontext *ctx, GLenum cap, GLboolean state )
        */
       if (state) {
 	 ctx->Driver.BlendEquationSeparate( ctx,
-					    ctx->Color.BlendEquationRGB,
-					    ctx->Color.BlendEquationA );
-	 ctx->Driver.BlendFuncSeparate( ctx, ctx->Color.BlendSrcRGB,
-					ctx->Color.BlendDstRGB,
-					ctx->Color.BlendSrcA,
-					ctx->Color.BlendDstA );
+					    ctx->Color.Blend[0].EquationRGB,
+					    ctx->Color.Blend[0].EquationA );
+	 ctx->Driver.BlendFuncSeparate( ctx, ctx->Color.Blend[0].SrcRGB,
+					ctx->Color.Blend[0].DstRGB,
+					ctx->Color.Blend[0].SrcA,
+					ctx->Color.Blend[0].DstA );
       }
       else {
 	 FALLBACK( rmesa, RADEON_FALLBACK_BLEND_FUNC, GL_FALSE );
@@ -1741,7 +1618,7 @@ static void radeonEnable( GLcontext *ctx, GLenum cap, GLboolean state )
    case GL_COLOR_LOGIC_OP:
       RADEON_STATECHANGE( rmesa, ctx );
       if ( (ctx->Color.ColorLogicOpEnabled || (ctx->Color.BlendEnabled
-	    && ctx->Color.BlendEquationRGB == GL_LOGIC_OP)) ) {
+	    && ctx->Color.Blend[0].EquationRGB == GL_LOGIC_OP)) ) {
 	 rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] |=  RADEON_ROP_ENABLE;
       } else {
 	 rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] &= ~RADEON_ROP_ENABLE;
@@ -1860,14 +1737,14 @@ static void radeonEnable( GLcontext *ctx, GLenum cap, GLboolean state )
 }
 
 
-static void radeonLightingSpaceChange( GLcontext *ctx )
+static void radeonLightingSpaceChange( struct gl_context *ctx )
 {
    r100ContextPtr rmesa = R100_CONTEXT(ctx);
    GLboolean tmp;
    RADEON_STATECHANGE( rmesa, tcl );
 
    if (RADEON_DEBUG & RADEON_STATE)
-      fprintf(stderr, "%s %d BEFORE %x\n", __FUNCTION__, ctx->_NeedEyeCoords,
+      fprintf(stderr, "%s %d BEFORE %x\n", __func__, ctx->_NeedEyeCoords,
 	      rmesa->hw.tcl.cmd[TCL_LIGHT_MODEL_CTL]);
 
    if (ctx->_NeedEyeCoords)
@@ -1882,7 +1759,7 @@ static void radeonLightingSpaceChange( GLcontext *ctx )
    }
 
    if (RADEON_DEBUG & RADEON_STATE)
-      fprintf(stderr, "%s %d AFTER %x\n", __FUNCTION__, ctx->_NeedEyeCoords,
+      fprintf(stderr, "%s %d AFTER %x\n", __func__, ctx->_NeedEyeCoords,
 	      rmesa->hw.tcl.cmd[TCL_LIGHT_MODEL_CTL]);
 }
 
@@ -1901,7 +1778,7 @@ void radeonUploadTexMatrix( r100ContextPtr rmesa,
    So: if we need the q coord in the end (solely determined by the texture
    target, i.e. 2d / 1d / texrect targets) we swap the third and 4th row.
    Additionally, if we don't have texgen but 4 tex coords submitted, we swap
-   column 3 and 4 (for the 2d / 1d / texrect targets) since the the q coord
+   column 3 and 4 (for the 2d / 1d / texrect targets) since the q coord
    will get submitted in the "wrong", i.e. 3rd, slot.
    If an app submits 3 coords for 2d targets, we assume it is saving on vertex
    size and using the texture matrix to swap the r and q coords around (ut2k3
@@ -1917,11 +1794,13 @@ void radeonUploadTexMatrix( r100ContextPtr rmesa,
    int idx = TEXMAT_0 + unit;
    float *dest = ((float *)RADEON_DB_STATE( mat[idx] )) + MAT_ELT_0;
    int i;
-   struct gl_texture_unit tUnit = rmesa->radeon.glCtx->Texture.Unit[unit];
+   struct gl_texture_unit tUnit = rmesa->radeon.glCtx.Texture.Unit[unit];
    GLfloat *src = rmesa->tmpmat[unit].m;
 
    rmesa->TexMatColSwap &= ~(1 << unit);
-   if ((tUnit._ReallyEnabled & (TEXTURE_3D_BIT | TEXTURE_CUBE_BIT)) == 0) {
+   if (!tUnit._Current ||
+       (tUnit._Current->Target != GL_TEXTURE_3D &&
+        tUnit._Current->Target != GL_TEXTURE_CUBE_MAP)) {
       if (swapcols) {
 	 rmesa->TexMatColSwap |= 1 << unit;
 	 /* attention some elems are swapped 2 times! */
@@ -1995,7 +1874,7 @@ static void upload_matrix_t( r100ContextPtr rmesa, GLfloat *src, int idx )
 }
 
 
-static void update_texturematrix( GLcontext *ctx )
+static void update_texturematrix( struct gl_context *ctx )
 {
    r100ContextPtr rmesa = R100_CONTEXT( ctx );
    GLuint tpc = rmesa->hw.tcl.cmd[TCL_TEXTURE_PROC_CTL];
@@ -2006,7 +1885,7 @@ static void update_texturematrix( GLcontext *ctx )
    rmesa->TexMatColSwap = 0;
 
    for (unit = 0 ; unit < ctx->Const.MaxTextureUnits; unit++) {
-      if (ctx->Texture.Unit[unit]._ReallyEnabled) {
+      if (ctx->Texture.Unit[unit]._Current) {
 	 GLboolean needMatrix = GL_FALSE;
 	 if (ctx->TextureMatrixStack[unit].Top->type != MATRIX_IDENTITY) {
 	    needMatrix = GL_TRUE;
@@ -2061,7 +1940,7 @@ static void update_texturematrix( GLcontext *ctx )
    }
 }
 
-static GLboolean r100ValidateBuffers(GLcontext *ctx)
+GLboolean r100ValidateBuffers(struct gl_context *ctx)
 {
    r100ContextPtr rmesa = R100_CONTEXT(ctx);
    struct radeon_renderbuffer *rrb;
@@ -2084,13 +1963,16 @@ static GLboolean r100ValidateBuffers(GLcontext *ctx)
 				       0, RADEON_GEM_DOMAIN_VRAM);
    }
 
-   for (i = 0; i < ctx->Const.MaxTextureImageUnits; ++i) {
+   for (i = 0; i < ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxTextureImageUnits; ++i) {
       radeonTexObj *t;
 
-      if (!ctx->Texture.Unit[i]._ReallyEnabled)
+      if (!ctx->Texture.Unit[i]._Current)
 	 continue;
 
       t = rmesa->state.texture.unit[i].texobj;
+
+      if (!t)
+	 continue;
       if (t->image_override && t->bo)
 	radeon_cs_space_add_persistent_bo(rmesa->radeon.cmdbuf.cs, t->bo,
 			   RADEON_GEM_DOMAIN_GTT | RADEON_GEM_DOMAIN_VRAM, 0);
@@ -2105,15 +1987,15 @@ static GLboolean r100ValidateBuffers(GLcontext *ctx)
    return GL_TRUE;
 }
 
-GLboolean radeonValidateState( GLcontext *ctx )
+GLboolean radeonValidateState( struct gl_context *ctx )
 {
    r100ContextPtr rmesa = R100_CONTEXT(ctx);
    GLuint new_state = rmesa->radeon.NewGLState;
 
    if (new_state & _NEW_BUFFERS) {
-     _mesa_update_framebuffer(ctx);
+     _mesa_update_framebuffer(ctx, ctx->ReadBuffer, ctx->DrawBuffer);
      /* this updates the DrawBuffer's Width/Height if it's a FBO */
-     _mesa_update_draw_buffer_bounds(ctx);
+     _mesa_update_draw_buffer_bounds(ctx, ctx->DrawBuffer);
      RADEON_STATECHANGE(rmesa, ctx);
    }
 
@@ -2163,7 +2045,7 @@ GLboolean radeonValidateState( GLcontext *ctx )
 }
 
 
-static void radeonInvalidateState( GLcontext *ctx, GLuint new_state )
+static void radeonInvalidateState( struct gl_context *ctx, GLuint new_state )
 {
    _swrast_InvalidateState( ctx, new_state );
    _swsetup_InvalidateState( ctx, new_state );
@@ -2176,7 +2058,7 @@ static void radeonInvalidateState( GLcontext *ctx, GLuint new_state )
 
 /* A hack.  Need a faster way to find this out.
  */
-static GLboolean check_material( GLcontext *ctx )
+static GLboolean check_material( struct gl_context *ctx )
 {
    TNLcontext *tnl = TNL_CONTEXT(ctx);
    GLint i;
@@ -2192,13 +2074,13 @@ static GLboolean check_material( GLcontext *ctx )
 }
 
 
-static void radeonWrapRunPipeline( GLcontext *ctx )
+static void radeonWrapRunPipeline( struct gl_context *ctx )
 {
    r100ContextPtr rmesa = R100_CONTEXT(ctx);
    GLboolean has_material;
 
    if (0)
-      fprintf(stderr, "%s, newstate: %x\n", __FUNCTION__, rmesa->radeon.NewGLState);
+      fprintf(stderr, "%s, newstate: %x\n", __func__, rmesa->radeon.NewGLState);
 
    /* Validate state:
     */
@@ -2221,7 +2103,7 @@ static void radeonWrapRunPipeline( GLcontext *ctx )
    }
 }
 
-static void radeonPolygonStipple( GLcontext *ctx, const GLubyte *mask )
+static void radeonPolygonStipple( struct gl_context *ctx, const GLubyte *mask )
 {
    r100ContextPtr r100 = R100_CONTEXT(ctx);
    GLint i;
@@ -2242,25 +2124,20 @@ static void radeonPolygonStipple( GLcontext *ctx, const GLubyte *mask )
  * Many of the ctx->Driver functions might have been initialized to
  * software defaults in the earlier _mesa_init_driver_functions() call.
  */
-void radeonInitStateFuncs( GLcontext *ctx , GLboolean dri2 )
+void radeonInitStateFuncs( struct gl_context *ctx )
 {
    ctx->Driver.UpdateState		= radeonInvalidateState;
    ctx->Driver.LightingSpaceChange      = radeonLightingSpaceChange;
 
    ctx->Driver.DrawBuffer		= radeonDrawBuffer;
    ctx->Driver.ReadBuffer		= radeonReadBuffer;
-   if (dri2) {
-	   ctx->Driver.CopyPixels               = _mesa_meta_CopyPixels;
-	   ctx->Driver.DrawPixels               = _mesa_meta_DrawPixels;
-	   ctx->Driver.ReadPixels               = radeonReadPixels;
-   }
+   ctx->Driver.CopyPixels               = _mesa_meta_CopyPixels;
+   ctx->Driver.DrawPixels               = _mesa_meta_DrawPixels;
+   ctx->Driver.ReadPixels               = radeonReadPixels;
 
    ctx->Driver.AlphaFunc		= radeonAlphaFunc;
    ctx->Driver.BlendEquationSeparate	= radeonBlendEquationSeparate;
    ctx->Driver.BlendFuncSeparate	= radeonBlendFuncSeparate;
-   ctx->Driver.ClearColor		= radeonClearColor;
-   ctx->Driver.ClearDepth		= radeonClearDepth;
-   ctx->Driver.ClearStencil		= radeonClearStencil;
    ctx->Driver.ClipPlane		= radeonClipPlane;
    ctx->Driver.ColorMask		= radeonColorMask;
    ctx->Driver.CullFace			= radeonCullFace;
@@ -2270,7 +2147,6 @@ void radeonInitStateFuncs( GLcontext *ctx , GLboolean dri2 )
    ctx->Driver.Enable			= radeonEnable;
    ctx->Driver.Fogfv			= radeonFogfv;
    ctx->Driver.FrontFace		= radeonFrontFace;
-   ctx->Driver.Hint			= NULL;
    ctx->Driver.LightModelfv		= radeonLightModelfv;
    ctx->Driver.Lightfv			= radeonLightfv;
    ctx->Driver.LineStipple              = radeonLineStipple;
@@ -2278,10 +2154,7 @@ void radeonInitStateFuncs( GLcontext *ctx , GLboolean dri2 )
    ctx->Driver.LogicOpcode		= radeonLogicOpCode;
    ctx->Driver.PolygonMode		= radeonPolygonMode;
    ctx->Driver.PolygonOffset		= radeonPolygonOffset;
-   if (dri2)
-      ctx->Driver.PolygonStipple		= radeonPolygonStipple;
-   else
-      ctx->Driver.PolygonStipple		= radeonPolygonStipplePreKMS;
+   ctx->Driver.PolygonStipple		= radeonPolygonStipple;
    ctx->Driver.RenderMode		= radeonRenderMode;
    ctx->Driver.Scissor			= radeonScissor;
    ctx->Driver.ShadeModel		= radeonShadeModel;