X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=src%2Fmesa%2Fstate_tracker%2Fst_glsl_to_nir.cpp;h=6b1c1d6c39131008734c86c367de6ea7565115db;hb=2956d53400fdabe7a52d7ca6154827fea160abf2;hp=081f85edf530d49c60cf16ea3d830abedcd57adf;hpb=7d2d7b5d5f3b2eb5fd5d49b1f26989f0c358c3c8;p=mesa.git diff --git a/src/mesa/state_tracker/st_glsl_to_nir.cpp b/src/mesa/state_tracker/st_glsl_to_nir.cpp index 081f85edf53..6b1c1d6c391 100644 --- a/src/mesa/state_tracker/st_glsl_to_nir.cpp +++ b/src/mesa/state_tracker/st_glsl_to_nir.cpp @@ -31,20 +31,23 @@ #include "program/prog_statevars.h" #include "program/prog_parameter.h" #include "program/ir_to_mesa.h" +#include "main/context.h" #include "main/mtypes.h" #include "main/errors.h" +#include "main/glspirv.h" #include "main/shaderapi.h" #include "main/uniforms.h" #include "main/shaderobj.h" #include "st_context.h" -#include "st_glsl_types.h" #include "st_program.h" +#include "st_shader_cache.h" #include "compiler/nir/nir.h" #include "compiler/glsl_types.h" #include "compiler/glsl/glsl_to_nir.h" #include "compiler/glsl/gl_nir.h" +#include "compiler/glsl/gl_nir_linker.h" #include "compiler/glsl/ir.h" #include "compiler/glsl/ir_optimization.h" #include "compiler/glsl/string_to_uint_map.h" @@ -68,6 +71,8 @@ st_nir_fixup_varying_slots(struct st_context *st, struct exec_list *var_list) nir_foreach_variable(var, var_list) { if (var->data.location >= VARYING_SLOT_VAR0) { var->data.location += 9; + } else if (var->data.location == VARYING_SLOT_PNTC) { + var->data.location = VARYING_SLOT_VAR8; } else if ((var->data.location >= VARYING_SLOT_TEX0) && (var->data.location <= VARYING_SLOT_TEX7)) { var->data.location += VARYING_SLOT_VAR0 - VARYING_SLOT_TEX0; @@ -75,23 +80,38 @@ st_nir_fixup_varying_slots(struct st_context *st, struct exec_list *var_list) } } +static void +st_shader_gather_info(nir_shader *nir, struct gl_program *prog) +{ + nir_shader_gather_info(nir, nir_shader_get_entrypoint(nir)); + + /* Copy the info we just generated back into the gl_program */ + const char *prog_name = prog->info.name; + const char *prog_label = prog->info.label; + prog->info = nir->info; + prog->info.name = prog_name; + prog->info.label = prog_label; +} + /* input location assignment for VS inputs must be handled specially, so * that it is aligned w/ st's vbo state. * (This isn't the case with, for ex, FS inputs, which only need to agree * on varying-slot w/ the VS outputs) */ -static void -st_nir_assign_vs_in_locations(nir_shader *nir) +void +st_nir_assign_vs_in_locations(struct nir_shader *nir) { + if (nir->info.stage != MESA_SHADER_VERTEX) + return; + + bool removed_inputs = false; + nir->num_inputs = util_bitcount64(nir->info.inputs_read); - nir_foreach_variable_safe(var, &nir->inputs) { + nir_foreach_shader_in_variable_safe(var, nir) { /* NIR already assigns dual-slot inputs to two locations so all we have * to do is compact everything down. */ - if (var->data.location == VERT_ATTRIB_EDGEFLAG) { - /* bit of a hack, mirroring st_translate_vertex_program */ - var->data.driver_location = nir->num_inputs++; - } else if (nir->info.inputs_read & BITFIELD64_BIT(var->data.location)) { + if (nir->info.inputs_read & BITFIELD64_BIT(var->data.location)) { var->data.driver_location = util_bitcount64(nir->info.inputs_read & BITFIELD64_MASK(var->data.location)); @@ -104,15 +124,32 @@ st_nir_assign_vs_in_locations(nir_shader *nir) exec_node_remove(&var->node); var->data.mode = nir_var_shader_temp; exec_list_push_tail(&nir->globals, &var->node); + removed_inputs = true; } } + + /* Re-lower global vars, to deal with any dead VS inputs. */ + if (removed_inputs) + NIR_PASS_V(nir, nir_lower_global_vars_to_local); } static int -st_nir_lookup_parameter_index(const struct gl_program_parameter_list *params, - const char *name) +st_nir_lookup_parameter_index(struct gl_program *prog, nir_variable *var) { - int loc = _mesa_lookup_parameter_index(params, name); + struct gl_program_parameter_list *params = prog->Parameters; + + /* Lookup the first parameter that the uniform storage that match the + * variable location. + */ + for (unsigned i = 0; i < params->NumParameters; i++) { + int index = params->Parameters[i].MainUniformStorageIndex; + if (index == var->data.location) + return i; + } + + /* TODO: Handle this fallback for SPIR-V. We need this for GLSL e.g. in + * dEQP-GLES2.functional.uniform_api.random.3 + */ /* is there a better way to do this? If we have something like: * @@ -141,19 +178,18 @@ st_nir_lookup_parameter_index(const struct gl_program_parameter_list *params, * needs to work backwards to get base var loc from the param-list * which already has them separated out. */ - if (loc < 0) { - int namelen = strlen(name); + if (!prog->sh.data->spirv) { + int namelen = strlen(var->name); for (unsigned i = 0; i < params->NumParameters; i++) { struct gl_program_parameter *p = ¶ms->Parameters[i]; - if ((strncmp(p->Name, name, namelen) == 0) && + if ((strncmp(p->Name, var->name, namelen) == 0) && ((p->Name[namelen] == '.') || (p->Name[namelen] == '['))) { - loc = i; - break; + return i; } } } - return loc; + return -1; } static void @@ -183,7 +219,7 @@ st_nir_assign_uniform_locations(struct gl_context *ctx, loc = imageidx; imageidx += type_size(uniform->type); } - } else if (strncmp(uniform->name, "gl_", 3) == 0) { + } else if (uniform->state_slots) { const gl_state_index16 *const stateTokens = uniform->state_slots[0].tokens; /* This state reference has already been setup by ir_to_mesa, but we'll * get the same index back here. @@ -204,7 +240,7 @@ st_nir_assign_uniform_locations(struct gl_context *ctx, loc = _mesa_add_state_reference(prog->Parameters, stateTokens); } } else { - loc = st_nir_lookup_parameter_index(prog->Parameters, uniform->name); + loc = st_nir_lookup_parameter_index(prog, uniform); /* We need to check that loc is not -1 here before accessing the * array. It can be negative for example when we have a struct that @@ -220,13 +256,9 @@ st_nir_assign_uniform_locations(struct gl_context *ctx, } void -st_nir_opts(nir_shader *nir, bool scalar) +st_nir_opts(nir_shader *nir) { bool progress; - unsigned lower_flrp = - (nir->options->lower_flrp16 ? 16 : 0) | - (nir->options->lower_flrp32 ? 32 : 0) | - (nir->options->lower_flrp64 ? 64 : 0); do { progress = false; @@ -241,13 +273,14 @@ st_nir_opts(nir_shader *nir, bool scalar) NIR_PASS(progress, nir, nir_remove_dead_variables, (nir_variable_mode)(nir_var_function_temp | nir_var_shader_temp | - nir_var_mem_shared)); + nir_var_mem_shared), + NULL); NIR_PASS(progress, nir, nir_opt_copy_prop_vars); NIR_PASS(progress, nir, nir_opt_dead_write_vars); - if (scalar) { - NIR_PASS_V(nir, nir_lower_alu_to_scalar, NULL); + if (nir->options->lower_to_scalar) { + NIR_PASS_V(nir, nir_lower_alu_to_scalar, NULL, NULL); NIR_PASS_V(nir, nir_lower_phis_to_scalar); } @@ -269,27 +302,32 @@ st_nir_opts(nir_shader *nir, bool scalar) NIR_PASS(progress, nir, nir_opt_algebraic); NIR_PASS(progress, nir, nir_opt_constant_folding); - if (lower_flrp != 0) { - bool lower_flrp_progress = false; - - NIR_PASS(lower_flrp_progress, nir, nir_lower_flrp, - lower_flrp, - false /* always_precise */, - nir->options->lower_ffma); - if (lower_flrp_progress) { - NIR_PASS(progress, nir, - nir_opt_constant_folding); - progress = true; + if (!nir->info.flrp_lowered) { + unsigned lower_flrp = + (nir->options->lower_flrp16 ? 16 : 0) | + (nir->options->lower_flrp32 ? 32 : 0) | + (nir->options->lower_flrp64 ? 64 : 0); + + if (lower_flrp) { + bool lower_flrp_progress = false; + + NIR_PASS(lower_flrp_progress, nir, nir_lower_flrp, + lower_flrp, + false /* always_precise */, + nir->options->lower_ffma); + if (lower_flrp_progress) { + NIR_PASS(progress, nir, + nir_opt_constant_folding); + progress = true; + } } /* Nothing should rematerialize any flrps, so we only need to do this * lowering once. */ - lower_flrp = 0; + nir->info.flrp_lowered = true; } - NIR_PASS(progress, nir, gl_nir_opt_access); - NIR_PASS(progress, nir, nir_opt_undef); NIR_PASS(progress, nir, nir_opt_conditional_discard); if (nir->options->max_unroll_iterations) { @@ -298,28 +336,32 @@ st_nir_opts(nir_shader *nir, bool scalar) } while (progress); } +static void +shared_type_info(const struct glsl_type *type, unsigned *size, unsigned *align) +{ + assert(glsl_type_is_vector_or_scalar(type)); + + uint32_t comp_size = glsl_type_is_boolean(type) + ? 4 : glsl_get_bit_size(type) / 8; + unsigned length = glsl_get_vector_elements(type); + *size = comp_size * length, + *align = comp_size * (length == 3 ? 4 : length); +} + /* First third of converting glsl_to_nir.. this leaves things in a pre- * nir_lower_io state, so that shader variants can more easily insert/ * replace variables, etc. */ -static nir_shader * -st_glsl_to_nir(struct st_context *st, struct gl_program *prog, - struct gl_shader_program *shader_program, - gl_shader_stage stage) +static void +st_nir_preprocess(struct st_context *st, struct gl_program *prog, + struct gl_shader_program *shader_program, + gl_shader_stage stage) { + struct pipe_screen *screen = st->pipe->screen; const nir_shader_compiler_options *options = st->ctx->Const.ShaderCompilerOptions[prog->info.stage].NirOptions; - enum pipe_shader_type type = pipe_shader_type_from_mesa(stage); - struct pipe_screen *screen = st->pipe->screen; - bool is_scalar = screen->get_shader_param(screen, type, PIPE_SHADER_CAP_SCALAR_ISA); assert(options); - bool lower_64bit = - options->lower_int64_options || options->lower_doubles_options; - - if (prog->nir) - return prog->nir; - - nir_shader *nir = glsl_to_nir(st->ctx, shader_program, stage, options); + nir_shader *nir = prog->nir; /* Set the next shader stage hint for VS and TES. */ if (!nir->info.separate_shader && @@ -342,9 +384,16 @@ st_glsl_to_nir(struct st_context *st, struct gl_program *prog, st->ctx->SoftFP64 = glsl_float64_funcs_to_nir(st->ctx, options); } - nir_variable_mode mask = - (nir_variable_mode) (nir_var_shader_in | nir_var_shader_out); - nir_remove_dead_variables(nir, mask); + /* ES has strict SSO validation rules for shader IO matching so we can't + * remove dead IO until the resource list has been built. Here we skip + * removing them until later. This will potentially make the IO lowering + * calls below do a little extra work but should otherwise have no impact. + */ + if (!_mesa_is_gles(st->ctx) || !nir->info.separate_shader) { + nir_variable_mode mask = + (nir_variable_mode) (nir_var_shader_in | nir_var_shader_out); + nir_remove_dead_variables(nir, mask, NULL); + } if (options->lower_all_io_to_temps || nir->info.stage == MESA_SHADER_VERTEX || @@ -352,7 +401,8 @@ st_glsl_to_nir(struct st_context *st, struct gl_program *prog, NIR_PASS_V(nir, nir_lower_io_to_temporaries, nir_shader_get_entrypoint(nir), true, true); - } else if (nir->info.stage == MESA_SHADER_FRAGMENT) { + } else if (nir->info.stage == MESA_SHADER_FRAGMENT || + !screen->get_param(screen, PIPE_CAP_TGSI_CAN_READ_OUTPUTS)) { NIR_PASS_V(nir, nir_lower_io_to_temporaries, nir_shader_get_entrypoint(nir), true, false); @@ -362,34 +412,24 @@ st_glsl_to_nir(struct st_context *st, struct gl_program *prog, NIR_PASS_V(nir, nir_split_var_copies); NIR_PASS_V(nir, nir_lower_var_copies); - if (is_scalar) { - NIR_PASS_V(nir, nir_lower_alu_to_scalar, NULL); + if (options->lower_to_scalar) { + NIR_PASS_V(nir, nir_lower_alu_to_scalar, NULL, NULL); } /* before buffers and vars_to_ssa */ - NIR_PASS_V(nir, gl_nir_lower_bindless_images); - st_nir_opts(nir, is_scalar); + NIR_PASS_V(nir, gl_nir_lower_images, true); + + /* TODO: Change GLSL to not lower shared memory. */ + if (prog->nir->info.stage == MESA_SHADER_COMPUTE && + shader_program->data->spirv) { + NIR_PASS_V(prog->nir, nir_lower_vars_to_explicit_types, + nir_var_mem_shared, shared_type_info); + NIR_PASS_V(prog->nir, nir_lower_explicit_io, + nir_var_mem_shared, nir_address_format_32bit_offset); + } - NIR_PASS_V(nir, gl_nir_lower_buffers, shader_program); /* Do a round of constant folding to clean up address calculations */ NIR_PASS_V(nir, nir_opt_constant_folding); - - if (lower_64bit) { - bool lowered_64bit_ops = false; - if (options->lower_doubles_options) { - NIR_PASS(lowered_64bit_ops, nir, nir_lower_doubles, - st->ctx->SoftFP64, options->lower_doubles_options); - } - if (options->lower_int64_options) { - NIR_PASS(lowered_64bit_ops, nir, nir_lower_int64, - options->lower_int64_options); - } - - if (lowered_64bit_ops) - st_nir_opts(nir, is_scalar); - } - - return nir; } /* Second third of converting glsl_to_nir. This creates uniforms, gathers @@ -409,18 +449,13 @@ st_glsl_to_nir_post_opts(struct st_context *st, struct gl_program *prog, * get sent to the shader. */ nir_foreach_variable(var, &nir->uniforms) { - if (strncmp(var->name, "gl_", 3) == 0) { - const nir_state_slot *const slots = var->state_slots; - assert(var->state_slots != NULL); - + const nir_state_slot *const slots = var->state_slots; + if (slots != NULL) { const struct glsl_type *type = glsl_without_array(var->type); for (unsigned int i = 0; i < var->num_state_slots; i++) { unsigned comps; if (glsl_type_is_struct_or_ifc(type)) { - /* Builtin struct require specical handling for now we just - * make all members vec4. See st_nir_lower_builtin. - */ - comps = 4; + comps = _mesa_program_state_value_size(slots[i].tokens); } else { comps = glsl_get_vector_elements(type); } @@ -451,104 +486,54 @@ st_glsl_to_nir_post_opts(struct st_context *st, struct gl_program *prog, st_set_prog_affected_state_flags(prog); - NIR_PASS_V(nir, st_nir_lower_builtin); + /* None of the builtins being lowered here can be produced by SPIR-V. See + * _mesa_builtin_uniform_desc. Also drivers that support packed uniform + * storage don't need to lower builtins. + */ + if (!shader_program->data->spirv && + !st->ctx->Const.PackedDriverUniformStorage) + NIR_PASS_V(nir, st_nir_lower_builtin); + NIR_PASS_V(nir, gl_nir_lower_atomics, shader_program, true); NIR_PASS_V(nir, nir_opt_intrinsics); - nir_variable_mode mask = nir_var_function_temp; - nir_remove_dead_variables(nir, mask); - - if (st->ctx->_Shader->Flags & GLSL_DUMP) { - _mesa_log("\n"); - _mesa_log("NIR IR for linked %s program %d:\n", - _mesa_shader_stage_to_string(prog->info.stage), - shader_program->Name); - nir_print_shader(nir, _mesa_get_log_file()); - _mesa_log("\n\n"); - } -} + /* Lower 64-bit ops. */ + if (nir->options->lower_int64_options || + nir->options->lower_doubles_options) { + bool lowered_64bit_ops = false; + if (nir->options->lower_doubles_options) { + NIR_PASS(lowered_64bit_ops, nir, nir_lower_doubles, + st->ctx->SoftFP64, nir->options->lower_doubles_options); + } + if (nir->options->lower_int64_options) { + NIR_PASS(lowered_64bit_ops, nir, nir_lower_int64, + nir->options->lower_int64_options); + } -static void -set_st_program(struct gl_program *prog, - struct gl_shader_program *shader_program, - nir_shader *nir) -{ - struct st_vertex_program *stvp; - struct st_common_program *stp; - struct st_fragment_program *stfp; - struct st_compute_program *stcp; - - switch (prog->info.stage) { - case MESA_SHADER_VERTEX: - stvp = (struct st_vertex_program *)prog; - stvp->shader_program = shader_program; - stvp->tgsi.type = PIPE_SHADER_IR_NIR; - stvp->tgsi.ir.nir = nir; - break; - case MESA_SHADER_GEOMETRY: - case MESA_SHADER_TESS_CTRL: - case MESA_SHADER_TESS_EVAL: - stp = (struct st_common_program *)prog; - stp->shader_program = shader_program; - stp->tgsi.type = PIPE_SHADER_IR_NIR; - stp->tgsi.ir.nir = nir; - break; - case MESA_SHADER_FRAGMENT: - stfp = (struct st_fragment_program *)prog; - stfp->shader_program = shader_program; - stfp->tgsi.type = PIPE_SHADER_IR_NIR; - stfp->tgsi.ir.nir = nir; - break; - case MESA_SHADER_COMPUTE: - stcp = (struct st_compute_program *)prog; - stcp->shader_program = shader_program; - stcp->tgsi.ir_type = PIPE_SHADER_IR_NIR; - stcp->tgsi.prog = nir; - break; - default: - unreachable("unknown shader stage"); + if (lowered_64bit_ops) + st_nir_opts(nir); } -} -static void -st_nir_get_mesa_program(struct gl_context *ctx, - struct gl_shader_program *shader_program, - struct gl_linked_shader *shader) -{ - struct st_context *st = st_context(ctx); - struct pipe_screen *pscreen = ctx->st->pipe->screen; - struct gl_program *prog; - - validate_ir_tree(shader->ir); - - prog = shader->Program; + nir_variable_mode mask = (nir_variable_mode) + (nir_var_shader_in | nir_var_shader_out | nir_var_function_temp ); + nir_remove_dead_variables(nir, mask, NULL); - prog->Parameters = _mesa_new_parameter_list(); + if (!st->has_hw_atomics) + NIR_PASS_V(nir, nir_lower_atomics_to_ssbo); - _mesa_copy_linked_program_data(shader_program, shader); - _mesa_generate_parameters_list_for_uniforms(ctx, shader_program, shader, - prog->Parameters); + st_finalize_nir_before_variants(nir); - /* Remove reads from output registers. */ - if (!pscreen->get_param(pscreen, PIPE_CAP_TGSI_CAN_READ_OUTPUTS)) - lower_output_reads(shader->Stage, shader->ir); + if (st->allow_st_finalize_nir_twice) + st_finalize_nir(st, prog, shader_program, nir, true); - if (ctx->_Shader->Flags & GLSL_DUMP) { + if (st->ctx->_Shader->Flags & GLSL_DUMP) { _mesa_log("\n"); - _mesa_log("GLSL IR for linked %s program %d:\n", - _mesa_shader_stage_to_string(shader->Stage), + _mesa_log("NIR IR for linked %s program %d:\n", + _mesa_shader_stage_to_string(prog->info.stage), shader_program->Name); - _mesa_print_ir(_mesa_get_log_file(), shader->ir, NULL); + nir_print_shader(nir, _mesa_get_log_file()); _mesa_log("\n\n"); } - - prog->ExternalSamplersUsed = gl_external_samplers(prog); - _mesa_update_shader_textures_used(shader_program, prog); - - nir_shader *nir = st_glsl_to_nir(st, prog, shader_program, shader->Stage); - - set_st_program(prog, shader_program, nir); - prog->nir = nir; } static void @@ -574,53 +559,39 @@ st_nir_vectorize_io(nir_shader *producer, nir_shader *consumer) } static void -st_nir_link_shaders(nir_shader **producer, nir_shader **consumer, bool scalar) +st_nir_link_shaders(nir_shader *producer, nir_shader *consumer) { - if (scalar) { - NIR_PASS_V(*producer, nir_lower_io_to_scalar_early, nir_var_shader_out); - NIR_PASS_V(*consumer, nir_lower_io_to_scalar_early, nir_var_shader_in); + if (producer->options->lower_to_scalar) { + NIR_PASS_V(producer, nir_lower_io_to_scalar_early, nir_var_shader_out); + NIR_PASS_V(consumer, nir_lower_io_to_scalar_early, nir_var_shader_in); } - nir_lower_io_arrays_to_elements(*producer, *consumer); - - st_nir_opts(*producer, scalar); - st_nir_opts(*consumer, scalar); + nir_lower_io_arrays_to_elements(producer, consumer); - if (nir_link_opt_varyings(*producer, *consumer)) - st_nir_opts(*consumer, scalar); + st_nir_opts(producer); + st_nir_opts(consumer); - NIR_PASS_V(*producer, nir_remove_dead_variables, nir_var_shader_out); - NIR_PASS_V(*consumer, nir_remove_dead_variables, nir_var_shader_in); + if (nir_link_opt_varyings(producer, consumer)) + st_nir_opts(consumer); - if (nir_remove_unused_varyings(*producer, *consumer)) { - NIR_PASS_V(*producer, nir_lower_global_vars_to_local); - NIR_PASS_V(*consumer, nir_lower_global_vars_to_local); + NIR_PASS_V(producer, nir_remove_dead_variables, nir_var_shader_out, NULL); + NIR_PASS_V(consumer, nir_remove_dead_variables, nir_var_shader_in, NULL); - /* The backend might not be able to handle indirects on - * temporaries so we need to lower indirects on any of the - * varyings we have demoted here. - * - * TODO: radeonsi shouldn't need to do this, however LLVM isn't - * currently smart enough to handle indirects without causing excess - * spilling causing the gpu to hang. - * - * See the following thread for more details of the problem: - * https://lists.freedesktop.org/archives/mesa-dev/2017-July/162106.html - */ - nir_variable_mode indirect_mask = nir_var_function_temp; - - NIR_PASS_V(*producer, nir_lower_indirect_derefs, indirect_mask); - NIR_PASS_V(*consumer, nir_lower_indirect_derefs, indirect_mask); + if (nir_remove_unused_varyings(producer, consumer)) { + NIR_PASS_V(producer, nir_lower_global_vars_to_local); + NIR_PASS_V(consumer, nir_lower_global_vars_to_local); - st_nir_opts(*producer, scalar); - st_nir_opts(*consumer, scalar); + st_nir_opts(producer); + st_nir_opts(consumer); - /* Lowering indirects can cause varying to become unused. + /* Optimizations can cause varyings to become unused. * nir_compact_varyings() depends on all dead varyings being removed so * we need to call nir_remove_dead_variables() again here. */ - NIR_PASS_V(*producer, nir_remove_dead_variables, nir_var_shader_out); - NIR_PASS_V(*consumer, nir_remove_dead_variables, nir_var_shader_in); + NIR_PASS_V(producer, nir_remove_dead_variables, nir_var_shader_out, + NULL); + NIR_PASS_V(consumer, nir_remove_dead_variables, nir_var_shader_in, + NULL); } } @@ -686,62 +657,131 @@ st_link_nir(struct gl_context *ctx, struct gl_shader_program *shader_program) { struct st_context *st = st_context(ctx); - struct pipe_screen *screen = st->pipe->screen; - bool is_scalar[MESA_SHADER_STAGES]; + struct gl_linked_shader *linked_shader[MESA_SHADER_STAGES]; + unsigned num_shaders = 0; - unsigned last_stage = 0; for (unsigned i = 0; i < MESA_SHADER_STAGES; i++) { - struct gl_linked_shader *shader = shader_program->_LinkedShaders[i]; - if (shader == NULL) - continue; + if (shader_program->_LinkedShaders[i]) + linked_shader[num_shaders++] = shader_program->_LinkedShaders[i]; + } + + for (unsigned i = 0; i < num_shaders; i++) { + struct gl_linked_shader *shader = linked_shader[i]; + const nir_shader_compiler_options *options = + st->ctx->Const.ShaderCompilerOptions[shader->Stage].NirOptions; + struct gl_program *prog = shader->Program; + struct st_program *stp = (struct st_program *)prog; + + _mesa_copy_linked_program_data(shader_program, shader); - /* Determine scalar property of each shader stage */ - enum pipe_shader_type type = pipe_shader_type_from_mesa(shader->Stage); - is_scalar[i] = screen->get_shader_param(screen, type, - PIPE_SHADER_CAP_SCALAR_ISA); + assert(!prog->nir); + stp->shader_program = shader_program; + stp->state.type = PIPE_SHADER_IR_NIR; + + /* Parameters will be filled during NIR linking. */ + prog->Parameters = _mesa_new_parameter_list(); + + if (shader_program->data->spirv) { + prog->nir = _mesa_spirv_to_nir(ctx, shader_program, shader->Stage, options); + } else { + validate_ir_tree(shader->ir); + + if (ctx->_Shader->Flags & GLSL_DUMP) { + _mesa_log("\n"); + _mesa_log("GLSL IR for linked %s program %d:\n", + _mesa_shader_stage_to_string(shader->Stage), + shader_program->Name); + _mesa_print_ir(_mesa_get_log_file(), shader->ir, NULL); + _mesa_log("\n\n"); + } - st_nir_get_mesa_program(ctx, shader_program, shader); - last_stage = i; + prog->nir = glsl_to_nir(st->ctx, shader_program, shader->Stage, options); + st_nir_preprocess(st, prog, shader_program, shader->Stage); + } - if (is_scalar[i]) { + if (options->lower_to_scalar) { NIR_PASS_V(shader->Program->nir, nir_lower_load_const_to_scalar); } } + st_lower_patch_vertices_in(shader_program); + + /* For SPIR-V, we have to perform the NIR linking before applying + * st_nir_preprocess. + */ + if (shader_program->data->spirv) { + static const gl_nir_linker_options opts = { + true /*fill_parameters */ + }; + if (!gl_nir_link_spirv(ctx, shader_program, &opts)) + return GL_FALSE; + + nir_build_program_resource_list(ctx, shader_program, true); + + for (unsigned i = 0; i < num_shaders; i++) { + struct gl_linked_shader *shader = linked_shader[i]; + struct gl_program *prog = shader->Program; + + prog->ExternalSamplersUsed = gl_external_samplers(prog); + _mesa_update_shader_textures_used(shader_program, prog); + st_nir_preprocess(st, prog, shader_program, shader->Stage); + } + } + /* Linking the stages in the opposite order (from fragment to vertex) * ensures that inter-shader outputs written to in an earlier stage * are eliminated if they are (transitively) not used in a later * stage. */ - int next = last_stage; - for (int i = next - 1; i >= 0; i--) { - struct gl_linked_shader *shader = shader_program->_LinkedShaders[i]; - if (shader == NULL) - continue; - - st_nir_link_shaders(&shader->Program->nir, - &shader_program->_LinkedShaders[next]->Program->nir, - is_scalar[i]); - next = i; + for (int i = num_shaders - 2; i >= 0; i--) { + st_nir_link_shaders(linked_shader[i]->Program->nir, + linked_shader[i + 1]->Program->nir); } + /* Linking shaders also optimizes them. Separate shaders, compute shaders + * and shaders with a fixed-func VS or FS that don't need linking are + * optimized here. + */ + if (num_shaders == 1) + st_nir_opts(linked_shader[0]->Program->nir); - int prev = -1; - for (unsigned i = 0; i < MESA_SHADER_STAGES; i++) { - struct gl_linked_shader *shader = shader_program->_LinkedShaders[i]; - if (shader == NULL) - continue; + if (!shader_program->data->spirv) { + if (!gl_nir_link_glsl(ctx, shader_program)) + return GL_FALSE; + + for (unsigned i = 0; i < num_shaders; i++) { + struct gl_program *prog = linked_shader[i]->Program; + prog->ExternalSamplersUsed = gl_external_samplers(prog); + _mesa_update_shader_textures_used(shader_program, prog); + } + + nir_build_program_resource_list(ctx, shader_program, false); + } + for (unsigned i = 0; i < num_shaders; i++) { + struct gl_linked_shader *shader = linked_shader[i]; nir_shader *nir = shader->Program->nir; + /* This needs to run after the initial pass of nir_lower_vars_to_ssa, so + * that the buffer indices are constants in nir where they where + * constants in GLSL. */ + NIR_PASS_V(nir, gl_nir_lower_buffers, shader_program); + + /* Remap the locations to slots so those requiring two slots will occupy + * two locations. For instance, if we have in the IR code a dvec3 attr0 in + * location 0 and vec4 attr1 in location 1, in NIR attr0 will use + * locations/slots 0 and 1, and attr1 will use location/slot 2 + */ + if (nir->info.stage == MESA_SHADER_VERTEX && !shader_program->data->spirv) + nir_remap_dual_slot_attributes(nir, &shader->Program->DualSlotInputs); + NIR_PASS_V(nir, st_nir_lower_wpos_ytransform, shader->Program, st->pipe->screen); NIR_PASS_V(nir, nir_lower_system_values); NIR_PASS_V(nir, nir_lower_clip_cull_distance_arrays); - nir_shader_gather_info(nir, nir_shader_get_entrypoint(nir)); - shader->Program->info = nir->info; - if (i == MESA_SHADER_VERTEX) { + st_shader_gather_info(nir, shader->Program); + if (shader->Stage == MESA_SHADER_VERTEX) { /* NIR expands dual-slot inputs out to two locations. We need to * compact things back down GL-style single-slot inputs to avoid * confusing the state tracker. @@ -751,9 +791,8 @@ st_link_nir(struct gl_context *ctx, shader->Program->DualSlotInputs); } - if (prev != -1) { - struct gl_program *prev_shader = - shader_program->_LinkedShaders[prev]->Program; + if (i >= 1) { + struct gl_program *prev_shader = linked_shader[i - 1]->Program; /* We can't use nir_compact_varyings with transform feedback, since * the pipe_stream_output->output_register field is based on the @@ -761,33 +800,53 @@ st_link_nir(struct gl_context *ctx, */ if (!(prev_shader->sh.LinkedTransformFeedback && prev_shader->sh.LinkedTransformFeedback->NumVarying > 0)) - nir_compact_varyings(shader_program->_LinkedShaders[prev]->Program->nir, - nir, ctx->API != API_OPENGL_COMPAT); + nir_compact_varyings(prev_shader->nir, + nir, ctx->API != API_OPENGL_COMPAT); - if (ctx->Const.ShaderCompilerOptions[i].NirOptions->vectorize_io) + if (ctx->Const.ShaderCompilerOptions[shader->Stage].NirOptions->vectorize_io) st_nir_vectorize_io(prev_shader->nir, nir); } - prev = i; } - st_lower_patch_vertices_in(shader_program); + struct shader_info *prev_info = NULL; - for (unsigned i = 0; i < MESA_SHADER_STAGES; i++) { - struct gl_linked_shader *shader = shader_program->_LinkedShaders[i]; - if (shader == NULL) - continue; + for (unsigned i = 0; i < num_shaders; i++) { + struct gl_linked_shader *shader = linked_shader[i]; + struct shader_info *info = &shader->Program->nir->info; - st_glsl_to_nir_post_opts(st, shader->Program, shader_program); + if (prev_info && + ctx->Const.ShaderCompilerOptions[shader->Stage].NirOptions->unify_interfaces) { + prev_info->outputs_written |= info->inputs_read & + ~(VARYING_BIT_TESS_LEVEL_INNER | VARYING_BIT_TESS_LEVEL_OUTER); + info->inputs_read |= prev_info->outputs_written & + ~(VARYING_BIT_TESS_LEVEL_INNER | VARYING_BIT_TESS_LEVEL_OUTER); - assert(shader->Program); - if (!ctx->Driver.ProgramStringNotify(ctx, - _mesa_shader_stage_to_program(i), - shader->Program)) { - _mesa_reference_program(ctx, &shader->Program, NULL); - return false; + prev_info->patch_outputs_written |= info->patch_inputs_read; + info->patch_inputs_read |= prev_info->patch_outputs_written; } + prev_info = info; + } + + for (unsigned i = 0; i < num_shaders; i++) { + struct gl_linked_shader *shader = linked_shader[i]; + struct gl_program *prog = shader->Program; + struct st_program *stp = st_program(prog); + st_glsl_to_nir_post_opts(st, prog, shader_program); + + /* Initialize st_vertex_program members. */ + if (shader->Stage == MESA_SHADER_VERTEX) + st_prepare_vertex_program(stp); - nir_sweep(shader->Program->nir); + /* Get pipe_stream_output_info. */ + if (shader->Stage == MESA_SHADER_VERTEX || + shader->Stage == MESA_SHADER_TESS_EVAL || + shader->Stage == MESA_SHADER_GEOMETRY) + st_translate_stream_output_info(prog); + + st_store_ir_in_disk_cache(st, prog, true); + + st_release_variants(st, stp); + st_finalize_program(st, prog); /* The GLSL IR won't be needed anymore. */ ralloc_free(shader->ir); @@ -801,11 +860,6 @@ void st_nir_assign_varying_locations(struct st_context *st, nir_shader *nir) { if (nir->info.stage == MESA_SHADER_VERTEX) { - /* Needs special handling so drvloc matches the vbo state: */ - st_nir_assign_vs_in_locations(nir); - /* Re-lower global vars, to deal with any dead VS inputs. */ - NIR_PASS_V(nir, nir_lower_global_vars_to_local); - nir_assign_io_var_locations(&nir->outputs, &nir->num_outputs, nir->info.stage); @@ -850,6 +904,34 @@ st_nir_lower_samplers(struct pipe_screen *screen, nir_shader *nir, if (prog) { prog->info.textures_used = nir->info.textures_used; prog->info.textures_used_by_txf = nir->info.textures_used_by_txf; + prog->info.images_used = nir->info.images_used; + } +} + +static int +st_packed_uniforms_type_size(const struct glsl_type *type, bool bindless) +{ + return glsl_count_dword_slots(type, bindless); +} + +static int +st_unpacked_uniforms_type_size(const struct glsl_type *type, bool bindless) +{ + return glsl_count_vec4_slots(type, false, bindless); +} + +void +st_nir_lower_uniforms(struct st_context *st, nir_shader *nir) +{ + if (st->ctx->Const.PackedDriverUniformStorage) { + NIR_PASS_V(nir, nir_lower_io, nir_var_uniform, + st_packed_uniforms_type_size, + (nir_lower_io_options)0); + NIR_PASS_V(nir, nir_lower_uniforms_to_ubo, 4); + } else { + NIR_PASS_V(nir, nir_lower_io, nir_var_uniform, + st_unpacked_uniforms_type_size, + (nir_lower_io_options)0); } } @@ -858,44 +940,28 @@ st_nir_lower_samplers(struct pipe_screen *screen, nir_shader *nir, */ void st_finalize_nir(struct st_context *st, struct gl_program *prog, - struct gl_shader_program *shader_program, nir_shader *nir) + struct gl_shader_program *shader_program, + nir_shader *nir, bool finalize_by_driver) { struct pipe_screen *screen = st->pipe->screen; - const nir_shader_compiler_options *options = - st->ctx->Const.ShaderCompilerOptions[prog->info.stage].NirOptions; NIR_PASS_V(nir, nir_split_var_copies); NIR_PASS_V(nir, nir_lower_var_copies); - if (options->lower_all_io_to_temps || - options->lower_all_io_to_elements || - nir->info.stage == MESA_SHADER_VERTEX || - nir->info.stage == MESA_SHADER_GEOMETRY) { - NIR_PASS_V(nir, nir_lower_io_arrays_to_elements_no_indirects, false); - } else if (nir->info.stage == MESA_SHADER_FRAGMENT) { - NIR_PASS_V(nir, nir_lower_io_arrays_to_elements_no_indirects, true); - } st_nir_assign_varying_locations(st, nir); - - NIR_PASS_V(nir, nir_lower_atomics_to_ssbo, - st->ctx->Const.Program[nir->info.stage].MaxAtomicBuffers); - st_nir_assign_uniform_locations(st->ctx, prog, &nir->uniforms); /* Set num_uniforms in number of attribute slots (vec4s) */ nir->num_uniforms = DIV_ROUND_UP(prog->Parameters->NumParameterValues, 4); - if (st->ctx->Const.PackedDriverUniformStorage) { - NIR_PASS_V(nir, nir_lower_io, nir_var_uniform, st_glsl_type_dword_size, - (nir_lower_io_options)0); - NIR_PASS_V(nir, nir_lower_uniforms_to_ubo, 4); - } else { - NIR_PASS_V(nir, nir_lower_io, nir_var_uniform, st_glsl_uniforms_type_size, - (nir_lower_io_options)0); - } - + st_nir_lower_uniforms(st, nir); st_nir_lower_samplers(screen, nir, shader_program, prog); + if (!screen->get_param(screen, PIPE_CAP_NIR_IMAGES_AS_DEREF)) + NIR_PASS_V(nir, gl_nir_lower_images, false); + + if (finalize_by_driver && screen->finalize_nir) + screen->finalize_nir(screen, nir, false); } } /* extern "C" */