X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=src%2Fmesa%2Fstate_tracker%2Fst_glsl_to_tgsi.cpp;h=7564119ac11a55c17e317bae254efc0966815253;hb=a2dc11a7818c04d8dc0324e8fcba98d60baea529;hp=5bc70a4925bcab6f92bb8aa20dc9eedc0f797211;hpb=fef58979e191e4410fbab2f7dd14cafc340712da;p=mesa.git diff --git a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp index 5bc70a4925b..7564119ac11 100644 --- a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp +++ b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp @@ -30,55 +30,36 @@ * Translate GLSL IR to TGSI. */ -#include -#include "main/compiler.h" -#include "ir.h" -#include "ir_visitor.h" -#include "ir_expression_flattening.h" -#include "glsl_types.h" -#include "glsl_parser_extras.h" -#include "../glsl/program.h" -#include "ir_optimization.h" -#include "ast.h" - -#include "main/mtypes.h" +#include "st_glsl_to_tgsi.h" + +#include "compiler/glsl/glsl_parser_extras.h" +#include "compiler/glsl/ir_optimization.h" +#include "compiler/glsl/program.h" + +#include "main/errors.h" #include "main/shaderobj.h" #include "main/uniforms.h" -#include "program/hash_table.h" - -extern "C" { #include "main/shaderapi.h" +#include "main/shaderimage.h" #include "program/prog_instruction.h" -#include "program/prog_optimize.h" -#include "program/prog_print.h" -#include "program/program.h" -#include "program/prog_parameter.h" -#include "program/sampler.h" -#include "pipe/p_compiler.h" #include "pipe/p_context.h" #include "pipe/p_screen.h" -#include "pipe/p_shader_tokens.h" -#include "pipe/p_state.h" -#include "util/u_math.h" #include "tgsi/tgsi_ureg.h" #include "tgsi/tgsi_info.h" -#include "st_context.h" +#include "util/u_math.h" +#include "util/u_memory.h" #include "st_program.h" -#include "st_glsl_to_tgsi.h" #include "st_mesa_to_tgsi.h" -} +#include "st_format.h" +#include "st_glsl_types.h" +#include "st_nir.h" + -#define PROGRAM_IMMEDIATE PROGRAM_FILE_MAX #define PROGRAM_ANY_CONST ((1 << PROGRAM_STATE_VAR) | \ (1 << PROGRAM_CONSTANT) | \ (1 << PROGRAM_UNIFORM)) -/** - * Maximum number of arrays - */ -#define MAX_ARRAYS 256 - #define MAX_GLSL_TEXTURE_OFFSET 4 class st_src_reg; @@ -105,9 +86,12 @@ public: this->reladdr = NULL; this->reladdr2 = NULL; this->has_index2 = false; + this->double_reg2 = false; + this->array_id = 0; + this->is_double_vertex_input = false; } - st_src_reg(gl_register_file file, int index, int type) + st_src_reg(gl_register_file file, int index, enum glsl_base_type type) { this->type = type; this->file = file; @@ -118,9 +102,12 @@ public: this->reladdr = NULL; this->reladdr2 = NULL; this->has_index2 = false; + this->double_reg2 = false; + this->array_id = 0; + this->is_double_vertex_input = false; } - st_src_reg(gl_register_file file, int index, int type, int index2D) + st_src_reg(gl_register_file file, int index, enum glsl_base_type type, int index2D) { this->type = type; this->file = file; @@ -131,6 +118,9 @@ public: this->reladdr = NULL; this->reladdr2 = NULL; this->has_index2 = false; + this->double_reg2 = false; + this->array_id = 0; + this->is_double_vertex_input = false; } st_src_reg() @@ -144,6 +134,9 @@ public: this->reladdr = NULL; this->reladdr2 = NULL; this->has_index2 = false; + this->double_reg2 = false; + this->array_id = 0; + this->is_double_vertex_input = false; } explicit st_src_reg(st_dst_reg reg); @@ -153,33 +146,46 @@ public: int index2D; GLuint swizzle; /**< SWIZZLE_XYZWONEZERO swizzles from Mesa. */ int negate; /**< NEGATE_XYZW mask from mesa */ - int type; /** GLSL_TYPE_* from GLSL IR (enum glsl_base_type) */ + enum glsl_base_type type; /** GLSL_TYPE_* from GLSL IR (enum glsl_base_type) */ /** Register index should be offset by the integer in this reg. */ st_src_reg *reladdr; st_src_reg *reladdr2; bool has_index2; + /* + * Is this the second half of a double register pair? + * currently used for input mapping only. + */ + bool double_reg2; + unsigned array_id; + bool is_double_vertex_input; }; class st_dst_reg { public: - st_dst_reg(gl_register_file file, int writemask, int type, int index) + st_dst_reg(gl_register_file file, int writemask, enum glsl_base_type type, int index) { this->file = file; this->index = index; + this->index2D = 0; this->writemask = writemask; - this->cond_mask = COND_TR; this->reladdr = NULL; + this->reladdr2 = NULL; + this->has_index2 = false; this->type = type; + this->array_id = 0; } - st_dst_reg(gl_register_file file, int writemask, int type) + st_dst_reg(gl_register_file file, int writemask, enum glsl_base_type type) { this->file = file; this->index = 0; + this->index2D = 0; this->writemask = writemask; - this->cond_mask = COND_TR; this->reladdr = NULL; + this->reladdr2 = NULL; + this->has_index2 = false; this->type = type; + this->array_id = 0; } st_dst_reg() @@ -187,20 +193,26 @@ public: this->type = GLSL_TYPE_ERROR; this->file = PROGRAM_UNDEFINED; this->index = 0; + this->index2D = 0; this->writemask = 0; - this->cond_mask = COND_TR; this->reladdr = NULL; + this->reladdr2 = NULL; + this->has_index2 = false; + this->array_id = 0; } explicit st_dst_reg(st_src_reg reg); gl_register_file file; /**< PROGRAM_* from Mesa */ int index; /**< temporary index, VERT_ATTRIB_*, VARYING_SLOT_*, etc. */ + int index2D; int writemask; /**< Bitfield of WRITEMASK_[XYZW] */ - GLuint cond_mask:4; - int type; /** GLSL_TYPE_* from GLSL IR (enum glsl_base_type) */ + enum glsl_base_type type; /** GLSL_TYPE_* from GLSL IR (enum glsl_base_type) */ /** Register index should be offset by the integer in this reg. */ st_src_reg *reladdr; + st_src_reg *reladdr2; + bool has_index2; + unsigned array_id; }; st_src_reg::st_src_reg(st_dst_reg reg) @@ -211,9 +223,12 @@ st_src_reg::st_src_reg(st_dst_reg reg) this->swizzle = SWIZZLE_XYZW; this->negate = 0; this->reladdr = reg.reladdr; - this->index2D = 0; - this->reladdr2 = NULL; - this->has_index2 = false; + this->index2D = reg.index2D; + this->reladdr2 = reg.reladdr2; + this->has_index2 = reg.has_index2; + this->double_reg2 = false; + this->array_id = reg.array_id; + this->is_double_vertex_input = false; } st_dst_reg::st_dst_reg(st_src_reg reg) @@ -222,8 +237,11 @@ st_dst_reg::st_dst_reg(st_src_reg reg) this->file = reg.file; this->index = reg.index; this->writemask = WRITEMASK_XYZW; - this->cond_mask = COND_TR; this->reladdr = reg.reladdr; + this->index2D = reg.index2D; + this->reladdr2 = reg.reladdr2; + this->has_index2 = reg.has_index2; + this->array_id = reg.array_id; } class glsl_to_tgsi_instruction : public exec_node { @@ -231,28 +249,36 @@ public: DECLARE_RALLOC_CXX_OPERATORS(glsl_to_tgsi_instruction) unsigned op; - st_dst_reg dst; + st_dst_reg dst[2]; st_src_reg src[4]; /** Pointer to the ir source this tree came from for debugging */ ir_instruction *ir; GLboolean cond_update; bool saturate; st_src_reg sampler; /**< sampler register */ + int sampler_base; int sampler_array_size; /**< 1-based size of sampler array, 1 if not array */ int tex_target; /**< One of TEXTURE_*_INDEX */ + glsl_base_type tex_type; GLboolean tex_shadow; + unsigned image_format; st_src_reg tex_offsets[MAX_GLSL_TEXTURE_OFFSET]; unsigned tex_offset_num_offset; int dead_mask; /**< Used in dead code elimination */ + st_src_reg buffer; /**< buffer register */ + unsigned buffer_access; /**< buffer access type */ + class function_entry *function; /* Set on TGSI_OPCODE_CAL or TGSI_OPCODE_BGNSUB */ + const struct tgsi_opcode_info *info; }; class variable_storage : public exec_node { public: - variable_storage(ir_variable *var, gl_register_file file, int index) - : file(file), index(index), var(var) + variable_storage(ir_variable *var, gl_register_file file, int index, + unsigned array_id = 0) + : file(file), index(index), var(var), array_id(array_id) { /* empty */ } @@ -260,20 +286,22 @@ public: gl_register_file file; int index; ir_variable *var; /* variable that maps to this, if any */ + unsigned array_id; }; class immediate_storage : public exec_node { public: - immediate_storage(gl_constant_value *values, int size, int type) + immediate_storage(gl_constant_value *values, int size32, int type) { - memcpy(this->values, values, size * sizeof(gl_constant_value)); - this->size = size; + memcpy(this->values, values, size32 * sizeof(gl_constant_value)); + this->size32 = size32; this->type = type; } - + + /* doubles are stored across 2 gl_constant_values */ gl_constant_value values[4]; - int size; /**< Number of components (1-4) */ - int type; /**< GL_FLOAT, GL_INT, GL_BOOL, or GL_UNSIGNED_INT */ + int size32; /**< Number of 32-bit components (1-4) */ + int type; /**< GL_DOUBLE, GL_FLOAT, GL_INT, GL_BOOL, or GL_UNSIGNED_INT */ }; class function_entry : public exec_node { @@ -308,6 +336,36 @@ public: st_src_reg return_reg; }; +static st_src_reg undef_src = st_src_reg(PROGRAM_UNDEFINED, 0, GLSL_TYPE_ERROR); +static st_dst_reg undef_dst = st_dst_reg(PROGRAM_UNDEFINED, SWIZZLE_NOOP, GLSL_TYPE_ERROR); + +struct array_decl { + unsigned mesa_index; + unsigned array_id; + unsigned array_size; + enum glsl_base_type array_type; +}; + +static enum glsl_base_type +find_array_type(struct array_decl *arrays, unsigned count, unsigned array_id) +{ + unsigned i; + + for (i = 0; i < count; i++) { + struct array_decl *decl = &arrays[i]; + + if (array_id == decl->array_id) { + return decl->array_type; + } + } + return GLSL_TYPE_ERROR; +} + +struct rename_reg_pair { + int old_reg; + int new_reg; +}; + struct glsl_to_tgsi_visitor : public ir_visitor { public: glsl_to_tgsi_visitor(); @@ -318,25 +376,40 @@ public: struct gl_context *ctx; struct gl_program *prog; struct gl_shader_program *shader_program; - struct gl_shader *shader; + struct gl_linked_shader *shader; struct gl_shader_compiler_options *options; int next_temp; - unsigned array_sizes[MAX_ARRAYS]; + unsigned *array_sizes; + unsigned max_num_arrays; unsigned next_array; + struct array_decl input_arrays[PIPE_MAX_SHADER_INPUTS]; + unsigned num_input_arrays; + struct array_decl output_arrays[PIPE_MAX_SHADER_OUTPUTS]; + unsigned num_output_arrays; + int num_address_regs; - int samplers_used; + uint32_t samplers_used; + glsl_base_type sampler_types[PIPE_MAX_SAMPLERS]; + int sampler_targets[PIPE_MAX_SAMPLERS]; /**< One of TGSI_TEXTURE_* */ + int buffers_used; + int images_used; + int image_targets[PIPE_MAX_SHADER_IMAGES]; + unsigned image_formats[PIPE_MAX_SHADER_IMAGES]; bool indirect_addr_consts; - + int wpos_transform_const; + int glsl_version; bool native_integers; bool have_sqrt; + bool have_fma; + bool use_shared_memory; variable_storage *find_variable_storage(ir_variable *var); - int add_constant(gl_register_file file, gl_constant_value values[4], + int add_constant(gl_register_file file, gl_constant_value values[8], int size, int datatype, GLuint *swizzle_out); function_entry *get_function_signature(ir_function_signature *sig); @@ -344,9 +417,10 @@ public: st_src_reg get_temp(const glsl_type *type); void reladdr_to_temp(ir_instruction *ir, st_src_reg *reg, int *num_reladdr); + st_src_reg st_src_reg_for_double(double val); st_src_reg st_src_reg_for_float(float val); st_src_reg st_src_reg_for_int(int val); - st_src_reg st_src_reg_for_type(int type, int val); + st_src_reg st_src_reg_for_type(enum glsl_base_type type, int val); /** * \name Visit methods @@ -375,8 +449,17 @@ public: virtual void visit(ir_if *); virtual void visit(ir_emit_vertex *); virtual void visit(ir_end_primitive *); + virtual void visit(ir_barrier *); /*@}*/ + void visit_expression(ir_expression *, st_src_reg *) ATTRIBUTE_NOINLINE; + + void visit_atomic_counter_intrinsic(ir_call *); + void visit_ssbo_intrinsic(ir_call *); + void visit_membar_intrinsic(ir_call *); + void visit_shared_intrinsic(ir_call *); + void visit_image_intrinsic(ir_call *); + st_src_reg result; /** List of variable_storage */ @@ -393,22 +476,19 @@ public: /** List of glsl_to_tgsi_instruction */ exec_list instructions; - glsl_to_tgsi_instruction *emit(ir_instruction *ir, unsigned op); + glsl_to_tgsi_instruction *emit_asm(ir_instruction *ir, unsigned op, + st_dst_reg dst = undef_dst, + st_src_reg src0 = undef_src, + st_src_reg src1 = undef_src, + st_src_reg src2 = undef_src, + st_src_reg src3 = undef_src); - glsl_to_tgsi_instruction *emit(ir_instruction *ir, unsigned op, - st_dst_reg dst, st_src_reg src0); - - glsl_to_tgsi_instruction *emit(ir_instruction *ir, unsigned op, - st_dst_reg dst, st_src_reg src0, st_src_reg src1); - - glsl_to_tgsi_instruction *emit(ir_instruction *ir, unsigned op, - st_dst_reg dst, - st_src_reg src0, st_src_reg src1, st_src_reg src2); - - glsl_to_tgsi_instruction *emit(ir_instruction *ir, unsigned op, - st_dst_reg dst, - st_src_reg src0, st_src_reg src1, - st_src_reg src2, st_src_reg src3); + glsl_to_tgsi_instruction *emit_asm(ir_instruction *ir, unsigned op, + st_dst_reg dst, st_dst_reg dst1, + st_src_reg src0 = undef_src, + st_src_reg src1 = undef_src, + st_src_reg src2 = undef_src, + st_src_reg src3 = undef_src); unsigned get_opcode(ir_instruction *ir, unsigned op, st_dst_reg dst, @@ -424,15 +504,25 @@ public: unsigned elements); void emit_scalar(ir_instruction *ir, unsigned op, - st_dst_reg dst, st_src_reg src0); + st_dst_reg dst, st_src_reg src0); void emit_scalar(ir_instruction *ir, unsigned op, - st_dst_reg dst, st_src_reg src0, st_src_reg src1); + st_dst_reg dst, st_src_reg src0, st_src_reg src1); void emit_arl(ir_instruction *ir, st_dst_reg dst, st_src_reg src0); - void emit_scs(ir_instruction *ir, unsigned op, - st_dst_reg dst, const st_src_reg &src); + void get_deref_offsets(ir_dereference *ir, + unsigned *array_size, + unsigned *base, + unsigned *index, + st_src_reg *reladdr); + void calc_deref_offsets(ir_dereference *head, + ir_dereference *tail, + unsigned *array_elements, + unsigned *base, + unsigned *index, + st_src_reg *indirect, + unsigned *location); bool try_emit_mad(ir_expression *ir, int mul_operand); @@ -445,27 +535,25 @@ public: void simplify_cmp(void); - void rename_temp_register(int index, int new_index); - int get_first_temp_read(int index); - int get_first_temp_write(int index); - int get_last_temp_read(int index); - int get_last_temp_write(int index); + void rename_temp_registers(int num_renames, struct rename_reg_pair *renames); + void get_first_temp_read(int *first_reads); + void get_last_temp_read_first_temp_write(int *last_reads, int *first_writes); + void get_last_temp_write(int *last_writes); void copy_propagate(void); int eliminate_dead_code(void); + + void merge_two_dsts(void); void merge_registers(void); void renumber_registers(void); void emit_block_mov(ir_assignment *ir, const struct glsl_type *type, - st_dst_reg *l, st_src_reg *r); + st_dst_reg *l, st_src_reg *r, + st_src_reg *cond, bool cond_swap); void *mem_ctx; }; -static st_src_reg undef_src = st_src_reg(PROGRAM_UNDEFINED, 0, GLSL_TYPE_ERROR); - -static st_dst_reg undef_dst = st_dst_reg(PROGRAM_UNDEFINED, SWIZZLE_NOOP, GLSL_TYPE_ERROR); - static st_dst_reg address_reg = st_dst_reg(PROGRAM_ADDRESS, WRITEMASK_X, GLSL_TYPE_FLOAT, 0); static st_dst_reg address_reg2 = st_dst_reg(PROGRAM_ADDRESS, WRITEMASK_X, GLSL_TYPE_FLOAT, 1); static st_dst_reg sampler_reladdr = st_dst_reg(PROGRAM_ADDRESS, WRITEMASK_X, GLSL_TYPE_FLOAT, 2); @@ -487,7 +575,7 @@ fail_link(struct gl_shader_program *prog, const char *fmt, ...) static int swizzle_for_size(int size) { - int size_swizzles[4] = { + static const int size_swizzles[4] = { MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_X, SWIZZLE_X, SWIZZLE_X), MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Y, SWIZZLE_Y), MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Z, SWIZZLE_Z), @@ -499,42 +587,58 @@ swizzle_for_size(int size) } static bool -is_tex_instruction(unsigned opcode) +is_resource_instruction(unsigned opcode) { - const tgsi_opcode_info* info = tgsi_get_opcode_info(opcode); - return info->is_tex; + switch (opcode) { + case TGSI_OPCODE_RESQ: + case TGSI_OPCODE_LOAD: + case TGSI_OPCODE_ATOMUADD: + case TGSI_OPCODE_ATOMXCHG: + case TGSI_OPCODE_ATOMCAS: + case TGSI_OPCODE_ATOMAND: + case TGSI_OPCODE_ATOMOR: + case TGSI_OPCODE_ATOMXOR: + case TGSI_OPCODE_ATOMUMIN: + case TGSI_OPCODE_ATOMUMAX: + case TGSI_OPCODE_ATOMIMIN: + case TGSI_OPCODE_ATOMIMAX: + return true; + default: + return false; + } } static unsigned -num_inst_dst_regs(unsigned opcode) +num_inst_dst_regs(const glsl_to_tgsi_instruction *op) { - const tgsi_opcode_info* info = tgsi_get_opcode_info(opcode); - return info->num_dst; + return op->info->num_dst; } static unsigned -num_inst_src_regs(unsigned opcode) +num_inst_src_regs(const glsl_to_tgsi_instruction *op) { - const tgsi_opcode_info* info = tgsi_get_opcode_info(opcode); - return info->is_tex ? info->num_src - 1 : info->num_src; + return op->info->is_tex || is_resource_instruction(op->op) ? + op->info->num_src - 1 : op->info->num_src; } glsl_to_tgsi_instruction * -glsl_to_tgsi_visitor::emit(ir_instruction *ir, unsigned op, - st_dst_reg dst, - st_src_reg src0, st_src_reg src1, - st_src_reg src2, st_src_reg src3) +glsl_to_tgsi_visitor::emit_asm(ir_instruction *ir, unsigned op, + st_dst_reg dst, st_dst_reg dst1, + st_src_reg src0, st_src_reg src1, + st_src_reg src2, st_src_reg src3) { glsl_to_tgsi_instruction *inst = new(mem_ctx) glsl_to_tgsi_instruction(); - int num_reladdr = 0, i; - + int num_reladdr = 0, i, j; + bool dst_is_64bit[2]; + op = get_opcode(ir, op, dst, src0, src1); /* If we have to do relative addressing, we want to load the ARL * reg directly for one of the regs, and preload the other reladdr * sources into temps. */ - num_reladdr += dst.reladdr != NULL; + num_reladdr += dst.reladdr != NULL || dst.reladdr2; + num_reladdr += dst1.reladdr != NULL || dst1.reladdr2; num_reladdr += src0.reladdr != NULL || src0.reladdr2 != NULL; num_reladdr += src1.reladdr != NULL || src1.reladdr2 != NULL; num_reladdr += src2.reladdr != NULL || src2.reladdr2 != NULL; @@ -545,25 +649,38 @@ glsl_to_tgsi_visitor::emit(ir_instruction *ir, unsigned op, reladdr_to_temp(ir, &src1, &num_reladdr); reladdr_to_temp(ir, &src0, &num_reladdr); - if (dst.reladdr) { - emit_arl(ir, address_reg, *dst.reladdr); + if (dst.reladdr || dst.reladdr2) { + if (dst.reladdr) + emit_arl(ir, address_reg, *dst.reladdr); + if (dst.reladdr2) + emit_arl(ir, address_reg2, *dst.reladdr2); + num_reladdr--; + } + if (dst1.reladdr) { + emit_arl(ir, address_reg, *dst1.reladdr); num_reladdr--; } assert(num_reladdr == 0); inst->op = op; - inst->dst = dst; + inst->info = tgsi_get_opcode_info(op); + inst->dst[0] = dst; + inst->dst[1] = dst1; inst->src[0] = src0; inst->src[1] = src1; inst->src[2] = src2; inst->src[3] = src3; inst->ir = ir; inst->dead_mask = 0; + /* default to float, for paths where this is not initialized + * (since 0==UINT which is likely wrong): + */ + inst->tex_type = GLSL_TYPE_FLOAT; inst->function = NULL; - + /* Update indirect addressing status used by TGSI */ - if (dst.reladdr) { + if (dst.reladdr || dst.reladdr2) { switch(dst.file) { case PROGRAM_STATE_VAR: case PROGRAM_CONSTANT: @@ -578,7 +695,7 @@ glsl_to_tgsi_visitor::emit(ir_instruction *ir, unsigned op, } } else { - for (i=0; i<4; i++) { + for (i = 0; i < 4; i++) { if(inst->src[i].reladdr) { switch(inst->src[i].file) { case PROGRAM_STATE_VAR: @@ -596,50 +713,158 @@ glsl_to_tgsi_visitor::emit(ir_instruction *ir, unsigned op, } } - this->instructions.push_tail(inst); + /* + * This section contains the double processing. + * GLSL just represents doubles as single channel values, + * however most HW and TGSI represent doubles as pairs of register channels. + * + * so we have to fixup destination writemask/index and src swizzle/indexes. + * dest writemasks need to translate from single channel write mask + * to a dual-channel writemask, but also need to modify the index, + * if we are touching the Z,W fields in the pre-translated writemask. + * + * src channels have similiar index modifications along with swizzle + * changes to we pick the XY, ZW pairs from the correct index. + * + * GLSL [0].x -> TGSI [0].xy + * GLSL [0].y -> TGSI [0].zw + * GLSL [0].z -> TGSI [1].xy + * GLSL [0].w -> TGSI [1].zw + */ + for (j = 0; j < 2; j++) { + dst_is_64bit[j] = glsl_base_type_is_64bit(inst->dst[j].type); + if (!dst_is_64bit[j] && inst->dst[j].file == PROGRAM_OUTPUT && inst->dst[j].type == GLSL_TYPE_ARRAY) { + enum glsl_base_type type = find_array_type(this->output_arrays, this->num_output_arrays, inst->dst[j].array_id); + if (glsl_base_type_is_64bit(type)) + dst_is_64bit[j] = true; + } + } - return inst; -} + if (dst_is_64bit[0] || dst_is_64bit[1] || + glsl_base_type_is_64bit(inst->src[0].type)) { + glsl_to_tgsi_instruction *dinst = NULL; + int initial_src_swz[4], initial_src_idx[4]; + int initial_dst_idx[2], initial_dst_writemask[2]; + /* select the writemask for dst0 or dst1 */ + unsigned writemask = inst->dst[1].file == PROGRAM_UNDEFINED ? inst->dst[0].writemask : inst->dst[1].writemask; -glsl_to_tgsi_instruction * -glsl_to_tgsi_visitor::emit(ir_instruction *ir, unsigned op, - st_dst_reg dst, st_src_reg src0, - st_src_reg src1, st_src_reg src2) -{ - return emit(ir, op, dst, src0, src1, src2, undef_src); -} + /* copy out the writemask, index and swizzles for all src/dsts. */ + for (j = 0; j < 2; j++) { + initial_dst_writemask[j] = inst->dst[j].writemask; + initial_dst_idx[j] = inst->dst[j].index; + } -glsl_to_tgsi_instruction * -glsl_to_tgsi_visitor::emit(ir_instruction *ir, unsigned op, - st_dst_reg dst, st_src_reg src0, st_src_reg src1) -{ - return emit(ir, op, dst, src0, src1, undef_src, undef_src); -} + for (j = 0; j < 4; j++) { + initial_src_swz[j] = inst->src[j].swizzle; + initial_src_idx[j] = inst->src[j].index; + } -glsl_to_tgsi_instruction * -glsl_to_tgsi_visitor::emit(ir_instruction *ir, unsigned op, - st_dst_reg dst, st_src_reg src0) -{ - assert(dst.writemask != 0); - return emit(ir, op, dst, src0, undef_src, undef_src, undef_src); + /* + * scan all the components in the dst writemask + * generate an instruction for each of them if required. + */ + st_src_reg addr; + while (writemask) { + + int i = u_bit_scan(&writemask); + + /* before emitting the instruction, see if we have to adjust store + * address */ + if (i > 1 && inst->op == TGSI_OPCODE_STORE && + addr.file == PROGRAM_UNDEFINED) { + /* We have to advance the buffer address by 16 */ + addr = get_temp(glsl_type::uint_type); + emit_asm(ir, TGSI_OPCODE_UADD, st_dst_reg(addr), + inst->src[0], st_src_reg_for_int(16)); + } + + + /* first time use previous instruction */ + if (dinst == NULL) { + dinst = inst; + } else { + /* create a new instructions for subsequent attempts */ + dinst = new(mem_ctx) glsl_to_tgsi_instruction(); + *dinst = *inst; + dinst->next = NULL; + dinst->prev = NULL; + } + this->instructions.push_tail(dinst); + + /* modify the destination if we are splitting */ + for (j = 0; j < 2; j++) { + if (dst_is_64bit[j]) { + dinst->dst[j].writemask = (i & 1) ? WRITEMASK_ZW : WRITEMASK_XY; + dinst->dst[j].index = initial_dst_idx[j]; + if (i > 1) { + if (dinst->op == TGSI_OPCODE_STORE) { + dinst->src[0] = addr; + } else { + dinst->dst[j].index++; + } + } + } else { + /* if we aren't writing to a double, just get the bit of the initial writemask + for this channel */ + dinst->dst[j].writemask = initial_dst_writemask[j] & (1 << i); + } + } + + /* modify the src registers */ + for (j = 0; j < 4; j++) { + int swz = GET_SWZ(initial_src_swz[j], i); + + if (glsl_base_type_is_64bit(dinst->src[j].type)) { + dinst->src[j].index = initial_src_idx[j]; + if (swz > 1) { + dinst->src[j].double_reg2 = true; + dinst->src[j].index++; + } + + if (swz & 1) + dinst->src[j].swizzle = MAKE_SWIZZLE4(SWIZZLE_Z, SWIZZLE_W, SWIZZLE_Z, SWIZZLE_W); + else + dinst->src[j].swizzle = MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_X, SWIZZLE_Y); + + } else { + /* some opcodes are special case in what they use as sources + - F2D is a float src0, DLDEXP is integer src1 */ + if (op == TGSI_OPCODE_F2D || + op == TGSI_OPCODE_DLDEXP || + (op == TGSI_OPCODE_UCMP && dst_is_64bit[0])) { + dinst->src[j].swizzle = MAKE_SWIZZLE4(swz, swz, swz, swz); + } + } + } + } + inst = dinst; + } else { + this->instructions.push_tail(inst); + } + + + return inst; } glsl_to_tgsi_instruction * -glsl_to_tgsi_visitor::emit(ir_instruction *ir, unsigned op) +glsl_to_tgsi_visitor::emit_asm(ir_instruction *ir, unsigned op, + st_dst_reg dst, + st_src_reg src0, st_src_reg src1, + st_src_reg src2, st_src_reg src3) { - return emit(ir, op, undef_dst, undef_src, undef_src, undef_src, undef_src); + return emit_asm(ir, op, dst, undef_dst, src0, src1, src2, src3); } /** - * Determines whether to use an integer, unsigned integer, or float opcode + * Determines whether to use an integer, unsigned integer, or float opcode * based on the operands and input opcode, then emits the result. */ unsigned glsl_to_tgsi_visitor::get_opcode(ir_instruction *ir, unsigned op, - st_dst_reg dst, - st_src_reg src0, st_src_reg src1) + st_dst_reg dst, + st_src_reg src0, st_src_reg src1) { - int type = GLSL_TYPE_FLOAT; + enum glsl_base_type type = GLSL_TYPE_FLOAT; if (op == TGSI_OPCODE_MOV) return op; @@ -649,12 +874,28 @@ glsl_to_tgsi_visitor::get_opcode(ir_instruction *ir, unsigned op, assert(src1.type != GLSL_TYPE_ARRAY); assert(src1.type != GLSL_TYPE_STRUCT); - if (src0.type == GLSL_TYPE_FLOAT || src1.type == GLSL_TYPE_FLOAT) + if (is_resource_instruction(op)) + type = src1.type; + else if (src0.type == GLSL_TYPE_DOUBLE || src1.type == GLSL_TYPE_DOUBLE) + type = GLSL_TYPE_DOUBLE; + else if (src0.type == GLSL_TYPE_FLOAT || src1.type == GLSL_TYPE_FLOAT) type = GLSL_TYPE_FLOAT; else if (native_integers) type = src0.type == GLSL_TYPE_BOOL ? GLSL_TYPE_INT : src0.type; -#define case4(c, f, i, u) \ +#define case5(c, f, i, u, d) \ + case TGSI_OPCODE_##c: \ + if (type == GLSL_TYPE_DOUBLE) \ + op = TGSI_OPCODE_##d; \ + else if (type == GLSL_TYPE_INT) \ + op = TGSI_OPCODE_##i; \ + else if (type == GLSL_TYPE_UINT) \ + op = TGSI_OPCODE_##u; \ + else \ + op = TGSI_OPCODE_##f; \ + break; + +#define case4(c, f, i, u) \ case TGSI_OPCODE_##c: \ if (type == GLSL_TYPE_INT) \ op = TGSI_OPCODE_##i; \ @@ -665,12 +906,16 @@ glsl_to_tgsi_visitor::get_opcode(ir_instruction *ir, unsigned op, break; #define case3(f, i, u) case4(f, f, i, u) +#define case4d(f, i, u, d) case5(f, f, i, u, d) +#define case3fid(f, i, d) case5(f, f, i, i, d) #define case2fi(f, i) case4(f, f, i, i) #define case2iu(i, u) case4(i, LAST, i, u) -#define casecomp(c, f, i, u) \ +#define casecomp(c, f, i, u, d) \ case TGSI_OPCODE_##c: \ - if (type == GLSL_TYPE_INT) \ + if (type == GLSL_TYPE_DOUBLE) \ + op = TGSI_OPCODE_##d; \ + else if (type == GLSL_TYPE_INT || type == GLSL_TYPE_SUBROUTINE) \ op = TGSI_OPCODE_##i; \ else if (type == GLSL_TYPE_UINT) \ op = TGSI_OPCODE_##u; \ @@ -681,44 +926,60 @@ glsl_to_tgsi_visitor::get_opcode(ir_instruction *ir, unsigned op, break; switch(op) { - case2fi(ADD, UADD); - case2fi(MUL, UMUL); - case2fi(MAD, UMAD); + case3fid(ADD, UADD, DADD); + case3fid(MUL, UMUL, DMUL); + case3fid(MAD, UMAD, DMAD); + case3fid(FMA, UMAD, DFMA); case3(DIV, IDIV, UDIV); - case3(MAX, IMAX, UMAX); - case3(MIN, IMIN, UMIN); + case4d(MAX, IMAX, UMAX, DMAX); + case4d(MIN, IMIN, UMIN, DMIN); case2iu(MOD, UMOD); - casecomp(SEQ, FSEQ, USEQ, USEQ); - casecomp(SNE, FSNE, USNE, USNE); - casecomp(SGE, FSGE, ISGE, USGE); - casecomp(SLT, FSLT, ISLT, USLT); + casecomp(SEQ, FSEQ, USEQ, USEQ, DSEQ); + casecomp(SNE, FSNE, USNE, USNE, DSNE); + casecomp(SGE, FSGE, ISGE, USGE, DSGE); + casecomp(SLT, FSLT, ISLT, USLT, DSLT); case2iu(ISHR, USHR); - case2fi(SSG, ISSG); - case3(ABS, IABS, IABS); + case3fid(SSG, ISSG, DSSG); + case3fid(ABS, IABS, DABS); case2iu(IBFE, UBFE); case2iu(IMSB, UMSB); case2iu(IMUL_HI, UMUL_HI); + + case3fid(SQRT, SQRT, DSQRT); + + case3fid(RCP, RCP, DRCP); + case3fid(RSQ, RSQ, DRSQ); + + case3fid(FRC, FRC, DFRAC); + case3fid(TRUNC, TRUNC, DTRUNC); + case3fid(CEIL, CEIL, DCEIL); + case3fid(FLR, FLR, DFLR); + case3fid(ROUND, ROUND, DROUND); + + case2iu(ATOMIMAX, ATOMUMAX); + case2iu(ATOMIMIN, ATOMUMIN); + default: break; } - + assert(op != TGSI_OPCODE_LAST); return op; } glsl_to_tgsi_instruction * glsl_to_tgsi_visitor::emit_dp(ir_instruction *ir, - st_dst_reg dst, st_src_reg src0, st_src_reg src1, - unsigned elements) + st_dst_reg dst, st_src_reg src0, st_src_reg src1, + unsigned elements) { static const unsigned dot_opcodes[] = { TGSI_OPCODE_DP2, TGSI_OPCODE_DP3, TGSI_OPCODE_DP4 }; - return emit(ir, dot_opcodes[elements - 2], dst, src0, src1); + return emit_asm(ir, dot_opcodes[elements - 2], dst, src0, src1); } /** @@ -731,8 +992,8 @@ glsl_to_tgsi_visitor::emit_dp(ir_instruction *ir, */ void glsl_to_tgsi_visitor::emit_scalar(ir_instruction *ir, unsigned op, - st_dst_reg dst, - st_src_reg orig_src0, st_src_reg orig_src1) + st_dst_reg dst, + st_src_reg orig_src0, st_src_reg orig_src1) { int i, j; int done_mask = ~dst.writemask; @@ -743,7 +1004,6 @@ glsl_to_tgsi_visitor::emit_scalar(ir_instruction *ir, unsigned op, */ for (i = 0; i < 4; i++) { GLuint this_mask = (1 << i); - glsl_to_tgsi_instruction *inst; st_src_reg src0 = orig_src0; st_src_reg src1 = orig_src1; @@ -764,19 +1024,19 @@ glsl_to_tgsi_visitor::emit_scalar(ir_instruction *ir, unsigned op, } } src0.swizzle = MAKE_SWIZZLE4(src0_swiz, src0_swiz, - src0_swiz, src0_swiz); + src0_swiz, src0_swiz); src1.swizzle = MAKE_SWIZZLE4(src1_swiz, src1_swiz, - src1_swiz, src1_swiz); + src1_swiz, src1_swiz); - inst = emit(ir, op, dst, src0, src1); - inst->dst.writemask = this_mask; + dst.writemask = this_mask; + emit_asm(ir, op, dst, src0, src1); done_mask |= this_mask; } } void glsl_to_tgsi_visitor::emit_scalar(ir_instruction *ir, unsigned op, - st_dst_reg dst, st_src_reg src0) + st_dst_reg dst, st_src_reg src0) { st_src_reg undef = undef_src; @@ -787,7 +1047,7 @@ glsl_to_tgsi_visitor::emit_scalar(ir_instruction *ir, unsigned op, void glsl_to_tgsi_visitor::emit_arl(ir_instruction *ir, - st_dst_reg dst, st_src_reg src0) + st_dst_reg dst, st_src_reg src0) { int op = TGSI_OPCODE_ARL; @@ -798,135 +1058,59 @@ glsl_to_tgsi_visitor::emit_arl(ir_instruction *ir, if (dst.index >= this->num_address_regs) this->num_address_regs = dst.index + 1; - emit(NULL, op, dst, src0); + emit_asm(NULL, op, dst, src0); } -/** - * Emit an TGSI_OPCODE_SCS instruction - * - * The \c SCS opcode functions a bit differently than the other TGSI opcodes. - * Instead of splatting its result across all four components of the - * destination, it writes one value to the \c x component and another value to - * the \c y component. - * - * \param ir IR instruction being processed - * \param op Either \c TGSI_OPCODE_SIN or \c TGSI_OPCODE_COS depending - * on which value is desired. - * \param dst Destination register - * \param src Source register - */ -void -glsl_to_tgsi_visitor::emit_scs(ir_instruction *ir, unsigned op, - st_dst_reg dst, - const st_src_reg &src) +int +glsl_to_tgsi_visitor::add_constant(gl_register_file file, + gl_constant_value values[8], int size, int datatype, + GLuint *swizzle_out) { - /* Vertex programs cannot use the SCS opcode. - */ - if (this->prog->Target == GL_VERTEX_PROGRAM_ARB) { - emit_scalar(ir, op, dst, src); - return; + if (file == PROGRAM_CONSTANT) { + return _mesa_add_typed_unnamed_constant(this->prog->Parameters, values, + size, datatype, swizzle_out); } - const unsigned component = (op == TGSI_OPCODE_SIN) ? 0 : 1; - const unsigned scs_mask = (1U << component); - int done_mask = ~dst.writemask; - st_src_reg tmp; + assert(file == PROGRAM_IMMEDIATE); - assert(op == TGSI_OPCODE_SIN || op == TGSI_OPCODE_COS); + int index = 0; + immediate_storage *entry; + int size32 = size * (datatype == GL_DOUBLE ? 2 : 1); + int i; - /* If there are compnents in the destination that differ from the component - * that will be written by the SCS instrution, we'll need a temporary. + /* Search immediate storage to see if we already have an identical + * immediate that we can use instead of adding a duplicate entry. */ - if (scs_mask != unsigned(dst.writemask)) { - tmp = get_temp(glsl_type::vec4_type); - } - - for (unsigned i = 0; i < 4; i++) { - unsigned this_mask = (1U << i); - st_src_reg src0 = src; - - if ((done_mask & this_mask) != 0) - continue; + foreach_in_list(immediate_storage, entry, &this->immediates) { + immediate_storage *tmp = entry; - /* The source swizzle specified which component of the source generates - * sine / cosine for the current component in the destination. The SCS - * instruction requires that this value be swizzle to the X component. - * Replace the current swizzle with a swizzle that puts the source in - * the X component. - */ - unsigned src0_swiz = GET_SWZ(src.swizzle, i); + for (i = 0; i * 4 < size32; i++) { + int slot_size = MIN2(size32 - (i * 4), 4); + if (tmp->type != datatype || tmp->size32 != slot_size) + break; + if (memcmp(tmp->values, &values[i * 4], + slot_size * sizeof(gl_constant_value))) + break; - src0.swizzle = MAKE_SWIZZLE4(src0_swiz, src0_swiz, - src0_swiz, src0_swiz); - for (unsigned j = i + 1; j < 4; j++) { - /* If there is another enabled component in the destination that is - * derived from the same inputs, generate its value on this pass as - * well. - */ - if (!(done_mask & (1 << j)) && - GET_SWZ(src0.swizzle, j) == src0_swiz) { - this_mask |= (1 << j); - } + /* Everything matches, keep going until the full size is matched */ + tmp = (immediate_storage *)tmp->next; } - if (this_mask != scs_mask) { - glsl_to_tgsi_instruction *inst; - st_dst_reg tmp_dst = st_dst_reg(tmp); - - /* Emit the SCS instruction. - */ - inst = emit(ir, TGSI_OPCODE_SCS, tmp_dst, src0); - inst->dst.writemask = scs_mask; - - /* Move the result of the SCS instruction to the desired location in - * the destination. - */ - tmp.swizzle = MAKE_SWIZZLE4(component, component, - component, component); - inst = emit(ir, TGSI_OPCODE_SCS, dst, tmp); - inst->dst.writemask = this_mask; - } else { - /* Emit the SCS instruction to write directly to the destination. - */ - glsl_to_tgsi_instruction *inst = emit(ir, TGSI_OPCODE_SCS, dst, src0); - inst->dst.writemask = scs_mask; - } + /* The full value matched */ + if (i * 4 >= size32) + return index; - done_mask |= this_mask; + index++; } -} - -int -glsl_to_tgsi_visitor::add_constant(gl_register_file file, - gl_constant_value values[4], int size, int datatype, - GLuint *swizzle_out) -{ - if (file == PROGRAM_CONSTANT) { - return _mesa_add_typed_unnamed_constant(this->prog->Parameters, values, - size, datatype, swizzle_out); - } else { - int index = 0; - immediate_storage *entry; - assert(file == PROGRAM_IMMEDIATE); - /* Search immediate storage to see if we already have an identical - * immediate that we can use instead of adding a duplicate entry. - */ - foreach_in_list(immediate_storage, entry, &this->immediates) { - if (entry->size == size && - entry->type == datatype && - !memcmp(entry->values, values, size * sizeof(gl_constant_value))) { - return index; - } - index++; - } - + for (i = 0; i * 4 < size32; i++) { + int slot_size = MIN2(size32 - (i * 4), 4); /* Add this immediate to the list. */ - entry = new(mem_ctx) immediate_storage(values, size, datatype); + entry = new(mem_ctx) immediate_storage(&values[i * 4], slot_size, datatype); this->immediates.push_tail(entry); this->num_immediates++; - return index; } + return index; } st_src_reg @@ -941,12 +1125,25 @@ glsl_to_tgsi_visitor::st_src_reg_for_float(float val) return src; } +st_src_reg +glsl_to_tgsi_visitor::st_src_reg_for_double(double val) +{ + st_src_reg src(PROGRAM_IMMEDIATE, -1, GLSL_TYPE_DOUBLE); + union gl_constant_value uval[2]; + + uval[0].u = *(uint32_t *)&val; + uval[1].u = *(((uint32_t *)&val) + 1); + src.index = add_constant(src.file, uval, 1, GL_DOUBLE, &src.swizzle); + + return src; +} + st_src_reg glsl_to_tgsi_visitor::st_src_reg_for_int(int val) { st_src_reg src(PROGRAM_IMMEDIATE, -1, GLSL_TYPE_INT); union gl_constant_value uval; - + assert(native_integers); uval.i = val; @@ -956,61 +1153,54 @@ glsl_to_tgsi_visitor::st_src_reg_for_int(int val) } st_src_reg -glsl_to_tgsi_visitor::st_src_reg_for_type(int type, int val) +glsl_to_tgsi_visitor::st_src_reg_for_type(enum glsl_base_type type, int val) { if (native_integers) - return type == GLSL_TYPE_FLOAT ? st_src_reg_for_float(val) : + return type == GLSL_TYPE_FLOAT ? st_src_reg_for_float(val) : st_src_reg_for_int(val); else return st_src_reg_for_float(val); } +static int +attrib_type_size(const struct glsl_type *type, bool is_vs_input) +{ + return st_glsl_attrib_type_size(type, is_vs_input); +} + static int type_size(const struct glsl_type *type) { - unsigned int i; - int size; + return st_glsl_type_size(type); +} - switch (type->base_type) { - case GLSL_TYPE_UINT: - case GLSL_TYPE_INT: - case GLSL_TYPE_FLOAT: - case GLSL_TYPE_BOOL: - if (type->is_matrix()) { - return type->matrix_columns; - } else { - /* Regardless of size of vector, it gets a vec4. This is bad - * packing for things like floats, but otherwise arrays become a - * mess. Hopefully a later pass over the code can pack scalars - * down if appropriate. - */ - return 1; - } - case GLSL_TYPE_ARRAY: - assert(type->length > 0); - return type_size(type->fields.array) * type->length; - case GLSL_TYPE_STRUCT: - size = 0; - for (i = 0; i < type->length; i++) { - size += type_size(type->fields.structure[i].type); - } - return size; - case GLSL_TYPE_SAMPLER: - case GLSL_TYPE_IMAGE: - /* Samplers take up one slot in UNIFORMS[], but they're baked in - * at link time. - */ - return 1; - case GLSL_TYPE_ATOMIC_UINT: - case GLSL_TYPE_INTERFACE: - case GLSL_TYPE_VOID: - case GLSL_TYPE_ERROR: - assert(!"Invalid type in type_size"); - break; +/** + * If the given GLSL type is an array or matrix or a structure containing + * an array/matrix member, return true. Else return false. + * + * This is used to determine which kind of temp storage (PROGRAM_TEMPORARY + * or PROGRAM_ARRAY) should be used for variables of this type. Anytime + * we have an array that might be indexed with a variable, we need to use + * the later storage type. + */ +static bool +type_has_array_or_matrix(const glsl_type *type) +{ + if (type->is_array() || type->is_matrix()) + return true; + + if (type->is_record()) { + for (unsigned i = 0; i < type->length; i++) { + if (type_has_array_or_matrix(type->fields.structure[i].type)) { + return true; + } + } } - return 0; + + return false; } + /** * In the initial pass of codegen, we assign temporary numbers to * intermediate results. (not SSA -- variable assignments will reuse @@ -1025,8 +1215,12 @@ glsl_to_tgsi_visitor::get_temp(const glsl_type *type) src.reladdr = NULL; src.negate = 0; - if (!options->EmitNoIndirectTemp && - (type->is_array() || type->is_matrix())) { + if (!options->EmitNoIndirectTemp && type_has_array_or_matrix(type)) { + if (next_array >= max_num_arrays) { + max_num_arrays += 32; + array_sizes = (unsigned*) + realloc(array_sizes, sizeof(array_sizes[0]) * max_num_arrays); + } src.file = PROGRAM_ARRAY; src.index = next_array << 16 | 0x8000; @@ -1051,7 +1245,7 @@ glsl_to_tgsi_visitor::get_temp(const glsl_type *type) variable_storage * glsl_to_tgsi_visitor::find_variable_storage(ir_variable *var) { - + foreach_in_list(variable_storage, entry, &this->variables) { if (entry->var == var) return entry; @@ -1112,7 +1306,7 @@ glsl_to_tgsi_visitor::visit(ir_variable *ir) for (unsigned int i = 0; i < ir->get_num_state_slots(); i++) { int index = _mesa_add_state_reference(this->prog->Parameters, - (gl_state_index *)slots[i].tokens); + (gl_state_index *)slots[i].tokens); if (storage->file == PROGRAM_STATE_VAR) { if (storage->index == -1) { @@ -1121,14 +1315,14 @@ glsl_to_tgsi_visitor::visit(ir_variable *ir) assert(index == storage->index + (int)i); } } else { - /* We use GLSL_TYPE_FLOAT here regardless of the actual type of - * the data being moved since MOV does not care about the type of - * data it is moving, and we don't want to declare registers with - * array or struct types. - */ + /* We use GLSL_TYPE_FLOAT here regardless of the actual type of + * the data being moved since MOV does not care about the type of + * data it is moving, and we don't want to declare registers with + * array or struct types. + */ st_src_reg src(PROGRAM_STATE_VAR, index, GLSL_TYPE_FLOAT); src.swizzle = slots[i].swizzle; - emit(ir, TGSI_OPCODE_MOV, dst, src); + emit_asm(ir, TGSI_OPCODE_MOV, dst, src); /* even a float takes up a whole vec4 reg in a struct/array. */ dst.index++; } @@ -1137,9 +1331,9 @@ glsl_to_tgsi_visitor::visit(ir_variable *ir) if (storage->file == PROGRAM_TEMPORARY && dst.index != storage->index + (int) ir->get_num_state_slots()) { fail_link(this->shader_program, - "failed to load builtin uniform `%s' (%d/%d regs loaded)\n", - ir->name, dst.index - storage->index, - type_size(ir->type)); + "failed to load builtin uniform `%s' (%d/%d regs loaded)\n", + ir->name, dst.index - storage->index, + type_size(ir->type)); } } } @@ -1147,11 +1341,11 @@ glsl_to_tgsi_visitor::visit(ir_variable *ir) void glsl_to_tgsi_visitor::visit(ir_loop *ir) { - emit(NULL, TGSI_OPCODE_BGNLOOP); + emit_asm(NULL, TGSI_OPCODE_BGNLOOP); visit_exec_list(&ir->body_instructions, this); - emit(NULL, TGSI_OPCODE_ENDLOOP); + emit_asm(NULL, TGSI_OPCODE_ENDLOOP); } void @@ -1159,10 +1353,10 @@ glsl_to_tgsi_visitor::visit(ir_loop_jump *ir) { switch (ir->mode) { case ir_loop_jump::jump_break: - emit(NULL, TGSI_OPCODE_BRK); + emit_asm(NULL, TGSI_OPCODE_BRK); break; case ir_loop_jump::jump_continue: - emit(NULL, TGSI_OPCODE_CONT); + emit_asm(NULL, TGSI_OPCODE_CONT); break; } } @@ -1216,7 +1410,7 @@ glsl_to_tgsi_visitor::try_emit_mad(ir_expression *ir, int mul_operand) this->result = get_temp(ir->type); result_dst = st_dst_reg(this->result); result_dst.writemask = (1 << ir->type->vector_elements) - 1; - emit(ir, TGSI_OPCODE_MAD, result_dst, a, b, c); + emit_asm(ir, TGSI_OPCODE_MAD, result_dst, a, b, c); return true; } @@ -1256,14 +1450,14 @@ glsl_to_tgsi_visitor::try_emit_mad_for_and_not(ir_expression *ir, int try_operan b.negate = ~b.negate; this->result = get_temp(ir->type); - emit(ir, TGSI_OPCODE_MAD, st_dst_reg(this->result), a, b, a); + emit_asm(ir, TGSI_OPCODE_MAD, st_dst_reg(this->result), a, b, a); return true; } void glsl_to_tgsi_visitor::reladdr_to_temp(ir_instruction *ir, - st_src_reg *reg, int *num_reladdr) + st_src_reg *reg, int *num_reladdr) { if (!reg->reladdr && !reg->reladdr2) return; @@ -1272,9 +1466,9 @@ glsl_to_tgsi_visitor::reladdr_to_temp(ir_instruction *ir, if (reg->reladdr2) emit_arl(ir, address_reg2, *reg->reladdr2); if (*num_reladdr != 1) { - st_src_reg temp = get_temp(glsl_type::vec4_type); + st_src_reg temp = get_temp(reg->type == GLSL_TYPE_DOUBLE ? glsl_type::dvec4_type : glsl_type::vec4_type); - emit(ir, TGSI_OPCODE_MOV, st_dst_reg(temp), *reg); + emit_asm(ir, TGSI_OPCODE_MOV, st_dst_reg(temp), *reg); *reg = temp; } @@ -1284,10 +1478,7 @@ glsl_to_tgsi_visitor::reladdr_to_temp(ir_instruction *ir, void glsl_to_tgsi_visitor::visit(ir_expression *ir) { - unsigned int operand; - st_src_reg op[Elements(ir->operands)]; - st_src_reg result_src; - st_dst_reg result_dst; + st_src_reg op[ARRAY_SIZE(ir->operands)]; /* Quick peephole: Emit MAD(a, b, c) instead of ADD(MUL(a, b), c) */ @@ -1302,15 +1493,15 @@ glsl_to_tgsi_visitor::visit(ir_expression *ir) */ if (!native_integers && ir->operation == ir_binop_logic_and) { if (try_emit_mad_for_and_not(ir, 1)) - return; + return; if (try_emit_mad_for_and_not(ir, 0)) - return; + return; } if (ir->operation == ir_quadop_vector) assert(!"ir_quadop_vector should have been lowered"); - for (operand = 0; operand < ir->get_num_operands(); operand++) { + for (unsigned int operand = 0; operand < ir->get_num_operands(); operand++) { this->result.file = PROGRAM_UNDEFINED; ir->operands[operand]->accept(this); if (this->result.file == PROGRAM_UNDEFINED) { @@ -1327,10 +1518,23 @@ glsl_to_tgsi_visitor::visit(ir_expression *ir) assert(!ir->operands[operand]->type->is_matrix()); } + visit_expression(ir, op); +} + +/* The non-recursive part of the expression visitor lives in a separate + * function and should be prevented from being inlined, to avoid a stack + * explosion when deeply nested expressions are visited. + */ +void +glsl_to_tgsi_visitor::visit_expression(ir_expression* ir, st_src_reg *op) +{ + st_src_reg result_src; + st_dst_reg result_dst; + int vector_elements = ir->operands[0]->type->vector_elements; if (ir->operands[1]) { vector_elements = MAX2(vector_elements, - ir->operands[1]->type->vector_elements); + ir->operands[1]->type->vector_elements); } this->result.file = PROGRAM_UNDEFINED; @@ -1350,7 +1554,7 @@ glsl_to_tgsi_visitor::visit(ir_expression *ir) switch (ir->operation) { case ir_unop_logic_not: if (result_dst.type != GLSL_TYPE_FLOAT) - emit(ir, TGSI_OPCODE_NOT, result_dst, op[0]); + emit_asm(ir, TGSI_OPCODE_NOT, result_dst, op[0]); else { /* Previously 'SEQ dst, src, 0.0' was used for this. However, many * older GPUs implement SEQ using multiple instructions (i915 uses two @@ -1358,22 +1562,27 @@ glsl_to_tgsi_visitor::visit(ir_expression *ir) * 0.0 and 1.0, 1-x also implements !x. */ op[0].negate = ~op[0].negate; - emit(ir, TGSI_OPCODE_ADD, result_dst, op[0], st_src_reg_for_float(1.0)); + emit_asm(ir, TGSI_OPCODE_ADD, result_dst, op[0], st_src_reg_for_float(1.0)); } break; case ir_unop_neg: if (result_dst.type == GLSL_TYPE_INT || result_dst.type == GLSL_TYPE_UINT) - emit(ir, TGSI_OPCODE_INEG, result_dst, op[0]); + emit_asm(ir, TGSI_OPCODE_INEG, result_dst, op[0]); + else if (result_dst.type == GLSL_TYPE_DOUBLE) + emit_asm(ir, TGSI_OPCODE_DNEG, result_dst, op[0]); else { op[0].negate = ~op[0].negate; result_src = op[0]; } break; + case ir_unop_subroutine_to_int: + emit_asm(ir, TGSI_OPCODE_MOV, result_dst, op[0]); + break; case ir_unop_abs: - emit(ir, TGSI_OPCODE_ABS, result_dst, op[0]); + emit_asm(ir, TGSI_OPCODE_ABS, result_dst, op[0]); break; case ir_unop_sign: - emit(ir, TGSI_OPCODE_SSG, result_dst, op[0]); + emit_asm(ir, TGSI_OPCODE_SSG, result_dst, op[0]); break; case ir_unop_rcp: emit_scalar(ir, TGSI_OPCODE_RCP, result_dst, op[0]); @@ -1395,25 +1604,19 @@ glsl_to_tgsi_visitor::visit(ir_expression *ir) case ir_unop_cos: emit_scalar(ir, TGSI_OPCODE_COS, result_dst, op[0]); break; - case ir_unop_sin_reduced: - emit_scs(ir, TGSI_OPCODE_SIN, result_dst, op[0]); - break; - case ir_unop_cos_reduced: - emit_scs(ir, TGSI_OPCODE_COS, result_dst, op[0]); - break; case ir_unop_saturate: { glsl_to_tgsi_instruction *inst; - inst = emit(ir, TGSI_OPCODE_MOV, result_dst, op[0]); + inst = emit_asm(ir, TGSI_OPCODE_MOV, result_dst, op[0]); inst->saturate = true; break; } case ir_unop_dFdx: case ir_unop_dFdx_coarse: - emit(ir, TGSI_OPCODE_DDX, result_dst, op[0]); + emit_asm(ir, TGSI_OPCODE_DDX, result_dst, op[0]); break; case ir_unop_dFdx_fine: - emit(ir, TGSI_OPCODE_DDX_FINE, result_dst, op[0]); + emit_asm(ir, TGSI_OPCODE_DDX_FINE, result_dst, op[0]); break; case ir_unop_dFdy: case ir_unop_dFdy_coarse: @@ -1437,12 +1640,20 @@ glsl_to_tgsi_visitor::visit(ir_expression *ir) st_src_reg temp = get_temp(glsl_type::vec4_type); - emit(ir, TGSI_OPCODE_MUL, st_dst_reg(temp), transform_y, op[0]); - emit(ir, ir->operation == ir_unop_dFdy_fine ? + emit_asm(ir, TGSI_OPCODE_MUL, st_dst_reg(temp), transform_y, op[0]); + emit_asm(ir, ir->operation == ir_unop_dFdy_fine ? TGSI_OPCODE_DDY_FINE : TGSI_OPCODE_DDY, result_dst, temp); break; } + case ir_unop_frexp_sig: + emit_asm(ir, TGSI_OPCODE_DFRACEXP, result_dst, undef_dst, op[0]); + break; + + case ir_unop_frexp_exp: + emit_asm(ir, TGSI_OPCODE_DFRACEXP, undef_dst, result_dst, op[0]); + break; + case ir_unop_noise: { /* At some point, a motivated person could add a better * implementation of noise. Currently not even the nvidia @@ -1450,65 +1661,71 @@ glsl_to_tgsi_visitor::visit(ir_expression *ir) * place to do this is in the GL state tracker, not the poor * driver. */ - emit(ir, TGSI_OPCODE_MOV, result_dst, st_src_reg_for_float(0.5)); + emit_asm(ir, TGSI_OPCODE_MOV, result_dst, st_src_reg_for_float(0.5)); break; } case ir_binop_add: - emit(ir, TGSI_OPCODE_ADD, result_dst, op[0], op[1]); + emit_asm(ir, TGSI_OPCODE_ADD, result_dst, op[0], op[1]); break; case ir_binop_sub: - emit(ir, TGSI_OPCODE_SUB, result_dst, op[0], op[1]); + emit_asm(ir, TGSI_OPCODE_SUB, result_dst, op[0], op[1]); break; case ir_binop_mul: - emit(ir, TGSI_OPCODE_MUL, result_dst, op[0], op[1]); + emit_asm(ir, TGSI_OPCODE_MUL, result_dst, op[0], op[1]); break; case ir_binop_div: - if (result_dst.type == GLSL_TYPE_FLOAT) + if (result_dst.type == GLSL_TYPE_FLOAT || result_dst.type == GLSL_TYPE_DOUBLE) assert(!"not reached: should be handled by ir_div_to_mul_rcp"); else - emit(ir, TGSI_OPCODE_DIV, result_dst, op[0], op[1]); + emit_asm(ir, TGSI_OPCODE_DIV, result_dst, op[0], op[1]); break; case ir_binop_mod: if (result_dst.type == GLSL_TYPE_FLOAT) assert(!"ir_binop_mod should have been converted to b * fract(a/b)"); else - emit(ir, TGSI_OPCODE_MOD, result_dst, op[0], op[1]); + emit_asm(ir, TGSI_OPCODE_MOD, result_dst, op[0], op[1]); break; case ir_binop_less: - emit(ir, TGSI_OPCODE_SLT, result_dst, op[0], op[1]); + emit_asm(ir, TGSI_OPCODE_SLT, result_dst, op[0], op[1]); break; case ir_binop_greater: - emit(ir, TGSI_OPCODE_SLT, result_dst, op[1], op[0]); + emit_asm(ir, TGSI_OPCODE_SLT, result_dst, op[1], op[0]); break; case ir_binop_lequal: - emit(ir, TGSI_OPCODE_SGE, result_dst, op[1], op[0]); + emit_asm(ir, TGSI_OPCODE_SGE, result_dst, op[1], op[0]); break; case ir_binop_gequal: - emit(ir, TGSI_OPCODE_SGE, result_dst, op[0], op[1]); + emit_asm(ir, TGSI_OPCODE_SGE, result_dst, op[0], op[1]); break; case ir_binop_equal: - emit(ir, TGSI_OPCODE_SEQ, result_dst, op[0], op[1]); + emit_asm(ir, TGSI_OPCODE_SEQ, result_dst, op[0], op[1]); break; case ir_binop_nequal: - emit(ir, TGSI_OPCODE_SNE, result_dst, op[0], op[1]); + emit_asm(ir, TGSI_OPCODE_SNE, result_dst, op[0], op[1]); break; case ir_binop_all_equal: /* "==" operator producing a scalar boolean. */ if (ir->operands[0]->type->is_vector() || ir->operands[1]->type->is_vector()) { st_src_reg temp = get_temp(native_integers ? - glsl_type::get_instance(ir->operands[0]->type->base_type, 4, 1) : - glsl_type::vec4_type); - + glsl_type::uvec4_type : + glsl_type::vec4_type); + if (native_integers) { st_dst_reg temp_dst = st_dst_reg(temp); st_src_reg temp1 = st_src_reg(temp), temp2 = st_src_reg(temp); - - emit(ir, TGSI_OPCODE_SEQ, st_dst_reg(temp), op[0], op[1]); - + + if (ir->operands[0]->type->is_boolean() && + ir->operands[1]->as_constant() && + ir->operands[1]->as_constant()->is_one()) { + emit_asm(ir, TGSI_OPCODE_MOV, st_dst_reg(temp), op[0]); + } else { + emit_asm(ir, TGSI_OPCODE_SEQ, st_dst_reg(temp), op[0], op[1]); + } + /* Emit 1-3 AND operations to combine the SEQ results. */ switch (ir->operands[0]->type->vector_elements) { case 2: @@ -1517,25 +1734,25 @@ glsl_to_tgsi_visitor::visit(ir_expression *ir) temp_dst.writemask = WRITEMASK_Y; temp1.swizzle = SWIZZLE_YYYY; temp2.swizzle = SWIZZLE_ZZZZ; - emit(ir, TGSI_OPCODE_AND, temp_dst, temp1, temp2); + emit_asm(ir, TGSI_OPCODE_AND, temp_dst, temp1, temp2); break; case 4: temp_dst.writemask = WRITEMASK_X; temp1.swizzle = SWIZZLE_XXXX; temp2.swizzle = SWIZZLE_YYYY; - emit(ir, TGSI_OPCODE_AND, temp_dst, temp1, temp2); + emit_asm(ir, TGSI_OPCODE_AND, temp_dst, temp1, temp2); temp_dst.writemask = WRITEMASK_Y; temp1.swizzle = SWIZZLE_ZZZZ; temp2.swizzle = SWIZZLE_WWWW; - emit(ir, TGSI_OPCODE_AND, temp_dst, temp1, temp2); + emit_asm(ir, TGSI_OPCODE_AND, temp_dst, temp1, temp2); } - + temp1.swizzle = SWIZZLE_XXXX; temp2.swizzle = SWIZZLE_YYYY; - emit(ir, TGSI_OPCODE_AND, result_dst, temp1, temp2); + emit_asm(ir, TGSI_OPCODE_AND, result_dst, temp1, temp2); } else { - emit(ir, TGSI_OPCODE_SNE, st_dst_reg(temp), op[0], op[1]); - + emit_asm(ir, TGSI_OPCODE_SNE, st_dst_reg(temp), op[0], op[1]); + /* After the dot-product, the value will be an integer on the * range [0,4]. Zero becomes 1.0, and positive values become zero. */ @@ -1547,10 +1764,10 @@ glsl_to_tgsi_visitor::visit(ir_expression *ir) */ st_src_reg sge_src = result_src; sge_src.negate = ~sge_src.negate; - emit(ir, TGSI_OPCODE_SGE, result_dst, sge_src, st_src_reg_for_float(0.0)); + emit_asm(ir, TGSI_OPCODE_SGE, result_dst, sge_src, st_src_reg_for_float(0.0)); } } else { - emit(ir, TGSI_OPCODE_SEQ, result_dst, op[0], op[1]); + emit_asm(ir, TGSI_OPCODE_SEQ, result_dst, op[0], op[1]); } break; case ir_binop_any_nequal: @@ -1558,14 +1775,20 @@ glsl_to_tgsi_visitor::visit(ir_expression *ir) if (ir->operands[0]->type->is_vector() || ir->operands[1]->type->is_vector()) { st_src_reg temp = get_temp(native_integers ? - glsl_type::get_instance(ir->operands[0]->type->base_type, 4, 1) : - glsl_type::vec4_type); - emit(ir, TGSI_OPCODE_SNE, st_dst_reg(temp), op[0], op[1]); + glsl_type::uvec4_type : + glsl_type::vec4_type); + if (ir->operands[0]->type->is_boolean() && + ir->operands[1]->as_constant() && + ir->operands[1]->as_constant()->is_zero()) { + emit_asm(ir, TGSI_OPCODE_MOV, st_dst_reg(temp), op[0]); + } else { + emit_asm(ir, TGSI_OPCODE_SNE, st_dst_reg(temp), op[0], op[1]); + } if (native_integers) { st_dst_reg temp_dst = st_dst_reg(temp); st_src_reg temp1 = st_src_reg(temp), temp2 = st_src_reg(temp); - + /* Emit 1-3 OR operations to combine the SNE results. */ switch (ir->operands[0]->type->vector_elements) { case 2: @@ -1574,22 +1797,22 @@ glsl_to_tgsi_visitor::visit(ir_expression *ir) temp_dst.writemask = WRITEMASK_Y; temp1.swizzle = SWIZZLE_YYYY; temp2.swizzle = SWIZZLE_ZZZZ; - emit(ir, TGSI_OPCODE_OR, temp_dst, temp1, temp2); + emit_asm(ir, TGSI_OPCODE_OR, temp_dst, temp1, temp2); break; case 4: temp_dst.writemask = WRITEMASK_X; temp1.swizzle = SWIZZLE_XXXX; temp2.swizzle = SWIZZLE_YYYY; - emit(ir, TGSI_OPCODE_OR, temp_dst, temp1, temp2); + emit_asm(ir, TGSI_OPCODE_OR, temp_dst, temp1, temp2); temp_dst.writemask = WRITEMASK_Y; temp1.swizzle = SWIZZLE_ZZZZ; temp2.swizzle = SWIZZLE_WWWW; - emit(ir, TGSI_OPCODE_OR, temp_dst, temp1, temp2); + emit_asm(ir, TGSI_OPCODE_OR, temp_dst, temp1, temp2); } - + temp1.swizzle = SWIZZLE_XXXX; temp2.swizzle = SWIZZLE_YYYY; - emit(ir, TGSI_OPCODE_OR, result_dst, temp1, temp2); + emit_asm(ir, TGSI_OPCODE_OR, result_dst, temp1, temp2); } else { /* After the dot-product, the value will be an integer on the * range [0,4]. Zero stays zero, and positive values become 1.0. @@ -1608,117 +1831,34 @@ glsl_to_tgsi_visitor::visit(ir_expression *ir) */ st_src_reg slt_src = result_src; slt_src.negate = ~slt_src.negate; - emit(ir, TGSI_OPCODE_SLT, result_dst, slt_src, st_src_reg_for_float(0.0)); + emit_asm(ir, TGSI_OPCODE_SLT, result_dst, slt_src, st_src_reg_for_float(0.0)); } } } else { - emit(ir, TGSI_OPCODE_SNE, result_dst, op[0], op[1]); + emit_asm(ir, TGSI_OPCODE_SNE, result_dst, op[0], op[1]); } break; - case ir_unop_any: { - assert(ir->operands[0]->type->is_vector()); + case ir_binop_logic_xor: + if (native_integers) + emit_asm(ir, TGSI_OPCODE_XOR, result_dst, op[0], op[1]); + else + emit_asm(ir, TGSI_OPCODE_SNE, result_dst, op[0], op[1]); + break; + case ir_binop_logic_or: { if (native_integers) { - int dst_swizzle = 0, op0_swizzle, i; - st_src_reg accum = op[0]; - - op0_swizzle = op[0].swizzle; - accum.swizzle = MAKE_SWIZZLE4(GET_SWZ(op0_swizzle, 0), - GET_SWZ(op0_swizzle, 0), - GET_SWZ(op0_swizzle, 0), - GET_SWZ(op0_swizzle, 0)); - for (i = 0; i < 4; i++) { - if (result_dst.writemask & (1 << i)) { - dst_swizzle = MAKE_SWIZZLE4(i, i, i, i); - break; - } - } - assert(i != 4); - assert(ir->operands[0]->type->is_boolean()); - - /* OR all the components together, since they should be either 0 or ~0 - */ - switch (ir->operands[0]->type->vector_elements) { - case 4: - op[0].swizzle = MAKE_SWIZZLE4(GET_SWZ(op0_swizzle, 3), - GET_SWZ(op0_swizzle, 3), - GET_SWZ(op0_swizzle, 3), - GET_SWZ(op0_swizzle, 3)); - emit(ir, TGSI_OPCODE_OR, result_dst, accum, op[0]); - accum = st_src_reg(result_dst); - accum.swizzle = dst_swizzle; - /* fallthrough */ - case 3: - op[0].swizzle = MAKE_SWIZZLE4(GET_SWZ(op0_swizzle, 2), - GET_SWZ(op0_swizzle, 2), - GET_SWZ(op0_swizzle, 2), - GET_SWZ(op0_swizzle, 2)); - emit(ir, TGSI_OPCODE_OR, result_dst, accum, op[0]); - accum = st_src_reg(result_dst); - accum.swizzle = dst_swizzle; - /* fallthrough */ - case 2: - op[0].swizzle = MAKE_SWIZZLE4(GET_SWZ(op0_swizzle, 1), - GET_SWZ(op0_swizzle, 1), - GET_SWZ(op0_swizzle, 1), - GET_SWZ(op0_swizzle, 1)); - emit(ir, TGSI_OPCODE_OR, result_dst, accum, op[0]); - break; - default: - assert(!"Unexpected vector size"); - break; - } - } else { - /* After the dot-product, the value will be an integer on the - * range [0,4]. Zero stays zero, and positive values become 1.0. - */ - glsl_to_tgsi_instruction *const dp = - emit_dp(ir, result_dst, op[0], op[0], - ir->operands[0]->type->vector_elements); - if (this->prog->Target == GL_FRAGMENT_PROGRAM_ARB && - result_dst.type == GLSL_TYPE_FLOAT) { - /* The clamping to [0,1] can be done for free in the fragment - * shader with a saturate. - */ - dp->saturate = true; - } else if (result_dst.type == GLSL_TYPE_FLOAT) { - /* Negating the result of the dot-product gives values on the range - * [-4, 0]. Zero stays zero, and negative values become 1.0. This - * is achieved using SLT. - */ - st_src_reg slt_src = result_src; - slt_src.negate = ~slt_src.negate; - emit(ir, TGSI_OPCODE_SLT, result_dst, slt_src, st_src_reg_for_float(0.0)); - } - else { - /* Use SNE 0 if integers are being used as boolean values. */ - emit(ir, TGSI_OPCODE_SNE, result_dst, result_src, st_src_reg_for_int(0)); - } - } - break; - } - - case ir_binop_logic_xor: - if (native_integers) - emit(ir, TGSI_OPCODE_XOR, result_dst, op[0], op[1]); - else - emit(ir, TGSI_OPCODE_SNE, result_dst, op[0], op[1]); - break; - - case ir_binop_logic_or: { - if (native_integers) { - /* If integers are used as booleans, we can use an actual "or" - * instruction. + /* If integers are used as booleans, we can use an actual "or" + * instruction. */ assert(native_integers); - emit(ir, TGSI_OPCODE_OR, result_dst, op[0], op[1]); + emit_asm(ir, TGSI_OPCODE_OR, result_dst, op[0], op[1]); } else { /* After the addition, the value will be an integer on the * range [0,2]. Zero stays zero, and positive values become 1.0. */ glsl_to_tgsi_instruction *add = - emit(ir, TGSI_OPCODE_ADD, result_dst, op[0], op[1]); + emit_asm(ir, TGSI_OPCODE_ADD, result_dst, op[0], op[1]); if (this->prog->Target == GL_FRAGMENT_PROGRAM_ARB) { /* The clamping to [0,1] can be done for free in the fragment * shader with a saturate if floats are being used as boolean values. @@ -1731,7 +1871,7 @@ glsl_to_tgsi_visitor::visit(ir_expression *ir) */ st_src_reg slt_src = result_src; slt_src.negate = ~slt_src.negate; - emit(ir, TGSI_OPCODE_SLT, result_dst, slt_src, st_src_reg_for_float(0.0)); + emit_asm(ir, TGSI_OPCODE_SLT, result_dst, slt_src, st_src_reg_for_float(0.0)); } } break; @@ -1743,9 +1883,9 @@ glsl_to_tgsi_visitor::visit(ir_expression *ir) * actual AND opcode. */ if (native_integers) - emit(ir, TGSI_OPCODE_AND, result_dst, op[0], op[1]); + emit_asm(ir, TGSI_OPCODE_AND, result_dst, op[0], op[1]); else - emit(ir, TGSI_OPCODE_MUL, result_dst, op[0], op[1]); + emit_asm(ir, TGSI_OPCODE_MUL, result_dst, op[0], op[1]); break; case ir_binop_dot: @@ -1758,15 +1898,16 @@ glsl_to_tgsi_visitor::visit(ir_expression *ir) case ir_unop_sqrt: if (have_sqrt) { emit_scalar(ir, TGSI_OPCODE_SQRT, result_dst, op[0]); - } - else { - /* sqrt(x) = x * rsq(x). */ - emit_scalar(ir, TGSI_OPCODE_RSQ, result_dst, op[0]); - emit(ir, TGSI_OPCODE_MUL, result_dst, result_src, op[0]); - /* For incoming channels <= 0, set the result to 0. */ - op[0].negate = ~op[0].negate; - emit(ir, TGSI_OPCODE_CMP, result_dst, - op[0], result_src, st_src_reg_for_float(0.0)); + } else { + /* This is the only instruction sequence that makes the game "Risen" + * render correctly. ABS is not required for the game, but since GLSL + * declares negative values as "undefined", allowing us to do whatever + * we want, I choose to use ABS to match DX9 and pre-GLSL RSQ + * behavior. + */ + emit_scalar(ir, TGSI_OPCODE_ABS, result_dst, op[0]); + emit_scalar(ir, TGSI_OPCODE_RSQ, result_dst, result_src); + emit_scalar(ir, TGSI_OPCODE_RCP, result_dst, result_src); } break; case ir_unop_rsq: @@ -1774,13 +1915,13 @@ glsl_to_tgsi_visitor::visit(ir_expression *ir) break; case ir_unop_i2f: if (native_integers) { - emit(ir, TGSI_OPCODE_I2F, result_dst, op[0]); + emit_asm(ir, TGSI_OPCODE_I2F, result_dst, op[0]); break; } /* fallthrough to next case otherwise */ case ir_unop_b2f: if (native_integers) { - emit(ir, TGSI_OPCODE_AND, result_dst, op[0], st_src_reg_for_float(1.0)); + emit_asm(ir, TGSI_OPCODE_AND, result_dst, op[0], st_src_reg_for_float(1.0)); break; } /* fallthrough to next case otherwise */ @@ -1788,6 +1929,7 @@ glsl_to_tgsi_visitor::visit(ir_expression *ir) case ir_unop_u2i: /* Converting between signed and unsigned integers is a no-op. */ result_src = op[0]; + result_src.type = result_dst.type; break; case ir_unop_b2i: if (native_integers) { @@ -1795,9 +1937,9 @@ glsl_to_tgsi_visitor::visit(ir_expression *ir) * GLSL requires that int(bool) return 1 for true and 0 for false. * This conversion is done with AND, but it could be done with NEG. */ - emit(ir, TGSI_OPCODE_AND, result_dst, op[0], st_src_reg_for_int(1)); + emit_asm(ir, TGSI_OPCODE_AND, result_dst, op[0], st_src_reg_for_int(1)); } else { - /* Booleans and integers are both stored as floats when native + /* Booleans and integers are both stored as floats when native * integers are disabled. */ result_src = op[0]; @@ -1805,23 +1947,25 @@ glsl_to_tgsi_visitor::visit(ir_expression *ir) break; case ir_unop_f2i: if (native_integers) - emit(ir, TGSI_OPCODE_F2I, result_dst, op[0]); + emit_asm(ir, TGSI_OPCODE_F2I, result_dst, op[0]); else - emit(ir, TGSI_OPCODE_TRUNC, result_dst, op[0]); + emit_asm(ir, TGSI_OPCODE_TRUNC, result_dst, op[0]); break; case ir_unop_f2u: if (native_integers) - emit(ir, TGSI_OPCODE_F2U, result_dst, op[0]); + emit_asm(ir, TGSI_OPCODE_F2U, result_dst, op[0]); else - emit(ir, TGSI_OPCODE_TRUNC, result_dst, op[0]); + emit_asm(ir, TGSI_OPCODE_TRUNC, result_dst, op[0]); break; case ir_unop_bitcast_f2i: - result_src = op[0]; - result_src.type = GLSL_TYPE_INT; - break; case ir_unop_bitcast_f2u: - result_src = op[0]; - result_src.type = GLSL_TYPE_UINT; + /* Make sure we don't propagate the negate modifier to integer opcodes. */ + if (op[0].negate) + emit_asm(ir, TGSI_OPCODE_MOV, result_dst, op[0]); + else + result_src = op[0]; + result_src.type = ir->operation == ir_unop_bitcast_f2i ? GLSL_TYPE_INT : + GLSL_TYPE_UINT; break; case ir_unop_bitcast_i2f: case ir_unop_bitcast_u2f: @@ -1829,35 +1973,38 @@ glsl_to_tgsi_visitor::visit(ir_expression *ir) result_src.type = GLSL_TYPE_FLOAT; break; case ir_unop_f2b: - emit(ir, TGSI_OPCODE_SNE, result_dst, op[0], st_src_reg_for_float(0.0)); + emit_asm(ir, TGSI_OPCODE_SNE, result_dst, op[0], st_src_reg_for_float(0.0)); + break; + case ir_unop_d2b: + emit_asm(ir, TGSI_OPCODE_SNE, result_dst, op[0], st_src_reg_for_double(0.0)); break; case ir_unop_i2b: if (native_integers) - emit(ir, TGSI_OPCODE_INEG, result_dst, op[0]); + emit_asm(ir, TGSI_OPCODE_USNE, result_dst, op[0], st_src_reg_for_int(0)); else - emit(ir, TGSI_OPCODE_SNE, result_dst, op[0], st_src_reg_for_float(0.0)); + emit_asm(ir, TGSI_OPCODE_SNE, result_dst, op[0], st_src_reg_for_float(0.0)); break; case ir_unop_trunc: - emit(ir, TGSI_OPCODE_TRUNC, result_dst, op[0]); + emit_asm(ir, TGSI_OPCODE_TRUNC, result_dst, op[0]); break; case ir_unop_ceil: - emit(ir, TGSI_OPCODE_CEIL, result_dst, op[0]); + emit_asm(ir, TGSI_OPCODE_CEIL, result_dst, op[0]); break; case ir_unop_floor: - emit(ir, TGSI_OPCODE_FLR, result_dst, op[0]); + emit_asm(ir, TGSI_OPCODE_FLR, result_dst, op[0]); break; case ir_unop_round_even: - emit(ir, TGSI_OPCODE_ROUND, result_dst, op[0]); + emit_asm(ir, TGSI_OPCODE_ROUND, result_dst, op[0]); break; case ir_unop_fract: - emit(ir, TGSI_OPCODE_FRC, result_dst, op[0]); + emit_asm(ir, TGSI_OPCODE_FRC, result_dst, op[0]); break; case ir_binop_min: - emit(ir, TGSI_OPCODE_MIN, result_dst, op[0], op[1]); + emit_asm(ir, TGSI_OPCODE_MIN, result_dst, op[0], op[1]); break; case ir_binop_max: - emit(ir, TGSI_OPCODE_MAX, result_dst, op[0], op[1]); + emit_asm(ir, TGSI_OPCODE_MAX, result_dst, op[0], op[1]); break; case ir_binop_pow: emit_scalar(ir, TGSI_OPCODE_POW, result_dst, op[0], op[1]); @@ -1865,37 +2012,37 @@ glsl_to_tgsi_visitor::visit(ir_expression *ir) case ir_unop_bit_not: if (native_integers) { - emit(ir, TGSI_OPCODE_NOT, result_dst, op[0]); + emit_asm(ir, TGSI_OPCODE_NOT, result_dst, op[0]); break; } case ir_unop_u2f: if (native_integers) { - emit(ir, TGSI_OPCODE_U2F, result_dst, op[0]); + emit_asm(ir, TGSI_OPCODE_U2F, result_dst, op[0]); break; } case ir_binop_lshift: if (native_integers) { - emit(ir, TGSI_OPCODE_SHL, result_dst, op[0], op[1]); + emit_asm(ir, TGSI_OPCODE_SHL, result_dst, op[0], op[1]); break; } case ir_binop_rshift: if (native_integers) { - emit(ir, TGSI_OPCODE_ISHR, result_dst, op[0], op[1]); + emit_asm(ir, TGSI_OPCODE_ISHR, result_dst, op[0], op[1]); break; } case ir_binop_bit_and: if (native_integers) { - emit(ir, TGSI_OPCODE_AND, result_dst, op[0], op[1]); + emit_asm(ir, TGSI_OPCODE_AND, result_dst, op[0], op[1]); break; } case ir_binop_bit_xor: if (native_integers) { - emit(ir, TGSI_OPCODE_XOR, result_dst, op[0], op[1]); + emit_asm(ir, TGSI_OPCODE_XOR, result_dst, op[0], op[1]); break; } case ir_binop_bit_or: if (native_integers) { - emit(ir, TGSI_OPCODE_OR, result_dst, op[0], op[1]); + emit_asm(ir, TGSI_OPCODE_OR, result_dst, op[0], op[1]); break; } @@ -1910,12 +2057,12 @@ glsl_to_tgsi_visitor::visit(ir_expression *ir) st_src_reg index_reg = get_temp(glsl_type::uint_type); st_src_reg cbuf; - cbuf.type = glsl_type::vec4_type->base_type; + cbuf.type = ir->type->base_type; cbuf.file = PROGRAM_CONSTANT; cbuf.index = 0; cbuf.reladdr = NULL; cbuf.negate = 0; - + assert(ir->type->is_vector() || ir->type->is_scalar()); if (const_offset_ir) { @@ -1925,7 +2072,7 @@ glsl_to_tgsi_visitor::visit(ir_expression *ir) } else { /* Relative/variable index into constant buffer */ - emit(ir, TGSI_OPCODE_USHR, st_dst_reg(index_reg), op[1], + emit_asm(ir, TGSI_OPCODE_USHR, st_dst_reg(index_reg), op[1], st_src_reg_for_int(4)); cbuf.reladdr = ralloc(mem_ctx, st_src_reg); memcpy(cbuf.reladdr, &index_reg, sizeof(index_reg)); @@ -1946,87 +2093,174 @@ glsl_to_tgsi_visitor::visit(ir_expression *ir) } cbuf.swizzle = swizzle_for_size(ir->type->vector_elements); - cbuf.swizzle += MAKE_SWIZZLE4(const_offset % 16 / 4, - const_offset % 16 / 4, - const_offset % 16 / 4, - const_offset % 16 / 4); + if (glsl_base_type_is_64bit(cbuf.type)) + cbuf.swizzle += MAKE_SWIZZLE4(const_offset % 16 / 8, + const_offset % 16 / 8, + const_offset % 16 / 8, + const_offset % 16 / 8); + else + cbuf.swizzle += MAKE_SWIZZLE4(const_offset % 16 / 4, + const_offset % 16 / 4, + const_offset % 16 / 4, + const_offset % 16 / 4); if (ir->type->base_type == GLSL_TYPE_BOOL) { - emit(ir, TGSI_OPCODE_USNE, result_dst, cbuf, st_src_reg_for_int(0)); + emit_asm(ir, TGSI_OPCODE_USNE, result_dst, cbuf, st_src_reg_for_int(0)); } else { - emit(ir, TGSI_OPCODE_MOV, result_dst, cbuf); + emit_asm(ir, TGSI_OPCODE_MOV, result_dst, cbuf); } break; } case ir_triop_lrp: /* note: we have to reorder the three args here */ - emit(ir, TGSI_OPCODE_LRP, result_dst, op[2], op[1], op[0]); + emit_asm(ir, TGSI_OPCODE_LRP, result_dst, op[2], op[1], op[0]); break; case ir_triop_csel: if (this->ctx->Const.NativeIntegers) - emit(ir, TGSI_OPCODE_UCMP, result_dst, op[0], op[1], op[2]); + emit_asm(ir, TGSI_OPCODE_UCMP, result_dst, op[0], op[1], op[2]); else { op[0].negate = ~op[0].negate; - emit(ir, TGSI_OPCODE_CMP, result_dst, op[0], op[1], op[2]); + emit_asm(ir, TGSI_OPCODE_CMP, result_dst, op[0], op[1], op[2]); } break; case ir_triop_bitfield_extract: - emit(ir, TGSI_OPCODE_IBFE, result_dst, op[0], op[1], op[2]); + emit_asm(ir, TGSI_OPCODE_IBFE, result_dst, op[0], op[1], op[2]); break; case ir_quadop_bitfield_insert: - emit(ir, TGSI_OPCODE_BFI, result_dst, op[0], op[1], op[2], op[3]); + emit_asm(ir, TGSI_OPCODE_BFI, result_dst, op[0], op[1], op[2], op[3]); break; case ir_unop_bitfield_reverse: - emit(ir, TGSI_OPCODE_BREV, result_dst, op[0]); + emit_asm(ir, TGSI_OPCODE_BREV, result_dst, op[0]); break; case ir_unop_bit_count: - emit(ir, TGSI_OPCODE_POPC, result_dst, op[0]); + emit_asm(ir, TGSI_OPCODE_POPC, result_dst, op[0]); break; case ir_unop_find_msb: - emit(ir, TGSI_OPCODE_IMSB, result_dst, op[0]); + emit_asm(ir, TGSI_OPCODE_IMSB, result_dst, op[0]); break; case ir_unop_find_lsb: - emit(ir, TGSI_OPCODE_LSB, result_dst, op[0]); + emit_asm(ir, TGSI_OPCODE_LSB, result_dst, op[0]); break; case ir_binop_imul_high: - emit(ir, TGSI_OPCODE_IMUL_HI, result_dst, op[0], op[1]); + emit_asm(ir, TGSI_OPCODE_IMUL_HI, result_dst, op[0], op[1]); break; case ir_triop_fma: - /* NOTE: Perhaps there should be a special opcode that enforces fused - * mul-add. Just use MAD for now. - */ - emit(ir, TGSI_OPCODE_MAD, result_dst, op[0], op[1], op[2]); + /* In theory, MAD is incorrect here. */ + if (have_fma) + emit_asm(ir, TGSI_OPCODE_FMA, result_dst, op[0], op[1], op[2]); + else + emit_asm(ir, TGSI_OPCODE_MAD, result_dst, op[0], op[1], op[2]); break; case ir_unop_interpolate_at_centroid: - emit(ir, TGSI_OPCODE_INTERP_CENTROID, result_dst, op[0]); + emit_asm(ir, TGSI_OPCODE_INTERP_CENTROID, result_dst, op[0]); break; - case ir_binop_interpolate_at_offset: - emit(ir, TGSI_OPCODE_INTERP_OFFSET, result_dst, op[0], op[1]); + case ir_binop_interpolate_at_offset: { + /* The y coordinate needs to be flipped for the default fb */ + static const gl_state_index transform_y_state[STATE_LENGTH] + = { STATE_INTERNAL, STATE_FB_WPOS_Y_TRANSFORM }; + + unsigned transform_y_index = + _mesa_add_state_reference(this->prog->Parameters, + transform_y_state); + + st_src_reg transform_y = st_src_reg(PROGRAM_STATE_VAR, + transform_y_index, + glsl_type::vec4_type); + transform_y.swizzle = SWIZZLE_XXXX; + + st_src_reg temp = get_temp(glsl_type::vec2_type); + st_dst_reg temp_dst = st_dst_reg(temp); + + emit_asm(ir, TGSI_OPCODE_MOV, temp_dst, op[1]); + temp_dst.writemask = WRITEMASK_Y; + emit_asm(ir, TGSI_OPCODE_MUL, temp_dst, transform_y, op[1]); + emit_asm(ir, TGSI_OPCODE_INTERP_OFFSET, result_dst, op[0], temp); break; + } case ir_binop_interpolate_at_sample: - emit(ir, TGSI_OPCODE_INTERP_SAMPLE, result_dst, op[0], op[1]); + emit_asm(ir, TGSI_OPCODE_INTERP_SAMPLE, result_dst, op[0], op[1]); + break; + + case ir_unop_d2f: + emit_asm(ir, TGSI_OPCODE_D2F, result_dst, op[0]); break; + case ir_unop_f2d: + emit_asm(ir, TGSI_OPCODE_F2D, result_dst, op[0]); + break; + case ir_unop_d2i: + emit_asm(ir, TGSI_OPCODE_D2I, result_dst, op[0]); + break; + case ir_unop_i2d: + emit_asm(ir, TGSI_OPCODE_I2D, result_dst, op[0]); + break; + case ir_unop_d2u: + emit_asm(ir, TGSI_OPCODE_D2U, result_dst, op[0]); + break; + case ir_unop_u2d: + emit_asm(ir, TGSI_OPCODE_U2D, result_dst, op[0]); + break; + case ir_unop_unpack_double_2x32: + case ir_unop_pack_double_2x32: + emit_asm(ir, TGSI_OPCODE_MOV, result_dst, op[0]); + break; + + case ir_binop_ldexp: + if (ir->operands[0]->type->base_type == GLSL_TYPE_DOUBLE) { + emit_asm(ir, TGSI_OPCODE_DLDEXP, result_dst, op[0], op[1]); + } else { + assert(!"Invalid ldexp for non-double opcode in glsl_to_tgsi_visitor::visit()"); + } + break; + + case ir_unop_pack_half_2x16: + emit_asm(ir, TGSI_OPCODE_PK2H, result_dst, op[0]); + break; + case ir_unop_unpack_half_2x16: + emit_asm(ir, TGSI_OPCODE_UP2H, result_dst, op[0]); + break; + + case ir_unop_get_buffer_size: { + ir_constant *const_offset = ir->operands[0]->as_constant(); + st_src_reg buffer( + PROGRAM_BUFFER, + ctx->Const.Program[shader->Stage].MaxAtomicBuffers + + (const_offset ? const_offset->value.u[0] : 0), + GLSL_TYPE_UINT); + if (!const_offset) { + buffer.reladdr = ralloc(mem_ctx, st_src_reg); + *buffer.reladdr = op[0]; + emit_arl(ir, sampler_reladdr, op[0]); + } + emit_asm(ir, TGSI_OPCODE_RESQ, result_dst)->buffer = buffer; + break; + } + + case ir_unop_vote_any: + emit_asm(ir, TGSI_OPCODE_VOTE_ANY, result_dst, op[0]); + break; + case ir_unop_vote_all: + emit_asm(ir, TGSI_OPCODE_VOTE_ALL, result_dst, op[0]); + break; + case ir_unop_vote_eq: + emit_asm(ir, TGSI_OPCODE_VOTE_EQ, result_dst, op[0]); + break; + case ir_unop_pack_snorm_2x16: case ir_unop_pack_unorm_2x16: - case ir_unop_pack_half_2x16: case ir_unop_pack_snorm_4x8: case ir_unop_pack_unorm_4x8: + case ir_unop_unpack_snorm_2x16: case ir_unop_unpack_unorm_2x16: - case ir_unop_unpack_half_2x16: - case ir_unop_unpack_half_2x16_split_x: - case ir_unop_unpack_half_2x16_split_y: case ir_unop_unpack_snorm_4x8: case ir_unop_unpack_unorm_4x8: - case ir_binop_pack_half_2x16_split: - case ir_binop_bfm: - case ir_triop_bfi: + case ir_quadop_vector: case ir_binop_vector_extract: case ir_triop_vector_insert: - case ir_binop_ldexp: case ir_binop_carry: case ir_binop_borrow: + case ir_unop_ssbo_unsized_array_length: /* This operation is not supported, or should have already been handled. */ assert(!"Invalid ir opcode in glsl_to_tgsi_visitor::visit()"); @@ -2052,6 +2286,7 @@ glsl_to_tgsi_visitor::visit(ir_swizzle *ir) ir->val->accept(this); src = this->result; assert(src.file != PROGRAM_UNDEFINED); + assert(ir->type->vector_elements > 0); for (i = 0; i < 4; i++) { if (i < ir->type->vector_elements) { @@ -2082,17 +2317,47 @@ glsl_to_tgsi_visitor::visit(ir_swizzle *ir) this->result = src; } +/* Test if the variable is an array. Note that geometry and + * tessellation shader inputs are outputs are always arrays (except + * for patch inputs), so only the array element type is considered. + */ +static bool +is_inout_array(unsigned stage, ir_variable *var, bool *is_2d) +{ + const glsl_type *type = var->type; + + if ((stage == MESA_SHADER_VERTEX && var->data.mode == ir_var_shader_in) || + (stage == MESA_SHADER_FRAGMENT && var->data.mode == ir_var_shader_out)) + return false; + + *is_2d = false; + + if (((stage == MESA_SHADER_GEOMETRY && var->data.mode == ir_var_shader_in) || + (stage == MESA_SHADER_TESS_EVAL && var->data.mode == ir_var_shader_in) || + stage == MESA_SHADER_TESS_CTRL) && + !var->data.patch) { + if (!var->type->is_array()) + return false; /* a system value probably */ + + type = var->type->fields.array; + *is_2d = true; + } + + return type->is_array() || type->is_matrix(); +} + void glsl_to_tgsi_visitor::visit(ir_dereference_variable *ir) { variable_storage *entry = find_variable_storage(ir->var); ir_variable *var = ir->var; + bool is_2d; if (!entry) { switch (var->data.mode) { case ir_var_uniform: entry = new(mem_ctx) variable_storage(var, PROGRAM_UNIFORM, - var->data.location); + var->data.param_index); this->variables.push_tail(entry); break; case ir_var_shader_in: @@ -2102,16 +2367,62 @@ glsl_to_tgsi_visitor::visit(ir_dereference_variable *ir) * user-defined varyings. */ assert(var->data.location != -1); - entry = new(mem_ctx) variable_storage(var, - PROGRAM_INPUT, - var->data.location); + + if (is_inout_array(shader->Stage, var, &is_2d)) { + struct array_decl *decl = &input_arrays[num_input_arrays]; + + decl->mesa_index = var->data.location; + decl->array_id = num_input_arrays + 1; + if (is_2d) { + decl->array_size = type_size(var->type->fields.array); + decl->array_type = var->type->fields.array->without_array()->base_type; + } else { + decl->array_size = type_size(var->type); + decl->array_type = var->type->without_array()->base_type; + } + num_input_arrays++; + + entry = new(mem_ctx) variable_storage(var, + PROGRAM_INPUT, + var->data.location, + decl->array_id); + } + else { + entry = new(mem_ctx) variable_storage(var, + PROGRAM_INPUT, + var->data.location); + } + this->variables.push_tail(entry); break; case ir_var_shader_out: assert(var->data.location != -1); - entry = new(mem_ctx) variable_storage(var, - PROGRAM_OUTPUT, - var->data.location - + var->data.index); + + if (is_inout_array(shader->Stage, var, &is_2d)) { + struct array_decl *decl = &output_arrays[num_output_arrays]; + + decl->mesa_index = var->data.location; + decl->array_id = num_output_arrays + 1; + if (is_2d) { + decl->array_size = type_size(var->type->fields.array); + decl->array_type = var->type->fields.array->without_array()->base_type; + } else { + decl->array_size = type_size(var->type); + decl->array_type = var->type->without_array()->base_type; + } + num_output_arrays++; + + entry = new(mem_ctx) variable_storage(var, + PROGRAM_OUTPUT, + var->data.location, + decl->array_id); + } + else { + entry = new(mem_ctx) variable_storage(var, + PROGRAM_OUTPUT, + var->data.location + + var->data.index); + } + this->variables.push_tail(entry); break; case ir_var_system_value: entry = new(mem_ctx) variable_storage(var, @@ -2135,32 +2446,104 @@ glsl_to_tgsi_visitor::visit(ir_dereference_variable *ir) } this->result = st_src_reg(entry->file, entry->index, var->type); + this->result.array_id = entry->array_id; + if (this->shader->Stage == MESA_SHADER_VERTEX && var->data.mode == ir_var_shader_in && var->type->is_double()) + this->result.is_double_vertex_input = true; if (!native_integers) this->result.type = GLSL_TYPE_FLOAT; } +static void +shrink_array_declarations(struct array_decl *arrays, unsigned count, + GLbitfield64 usage_mask, + GLbitfield64 double_usage_mask, + GLbitfield patch_usage_mask) +{ + unsigned i; + int j; + + /* Fix array declarations by removing unused array elements at both ends + * of the arrays. For example, mat4[3] where only mat[1] is used. + */ + for (i = 0; i < count; i++) { + struct array_decl *decl = &arrays[i]; + + /* Shrink the beginning. */ + for (j = 0; j < (int)decl->array_size; j++) { + if (decl->mesa_index >= VARYING_SLOT_PATCH0) { + if (patch_usage_mask & + BITFIELD64_BIT(decl->mesa_index - VARYING_SLOT_PATCH0 + j)) + break; + } + else { + if (usage_mask & BITFIELD64_BIT(decl->mesa_index+j)) + break; + if (double_usage_mask & BITFIELD64_BIT(decl->mesa_index+j-1)) + break; + } + + decl->mesa_index++; + decl->array_size--; + j--; + } + + /* Shrink the end. */ + for (j = decl->array_size-1; j >= 0; j--) { + if (decl->mesa_index >= VARYING_SLOT_PATCH0) { + if (patch_usage_mask & + BITFIELD64_BIT(decl->mesa_index - VARYING_SLOT_PATCH0 + j)) + break; + } + else { + if (usage_mask & BITFIELD64_BIT(decl->mesa_index+j)) + break; + if (double_usage_mask & BITFIELD64_BIT(decl->mesa_index+j-1)) + break; + } + + decl->array_size--; + } + } +} + void glsl_to_tgsi_visitor::visit(ir_dereference_array *ir) { ir_constant *index; st_src_reg src; int element_size = type_size(ir->type); - bool is_2D_input; + bool is_2D = false; index = ir->array_index->constant_expression_value(); ir->array->accept(this); src = this->result; - is_2D_input = this->prog->Target == GL_GEOMETRY_PROGRAM_NV && - src.file == PROGRAM_INPUT && - ir->array->ir_type != ir_type_dereference_array; + if (ir->array->ir_type != ir_type_dereference_array) { + switch (this->prog->Target) { + case GL_TESS_CONTROL_PROGRAM_NV: + is_2D = (src.file == PROGRAM_INPUT || src.file == PROGRAM_OUTPUT) && + !ir->variable_referenced()->data.patch; + break; + case GL_TESS_EVALUATION_PROGRAM_NV: + is_2D = src.file == PROGRAM_INPUT && + !ir->variable_referenced()->data.patch; + break; + case GL_GEOMETRY_PROGRAM_NV: + is_2D = src.file == PROGRAM_INPUT; + break; + } + } - if (is_2D_input) + if (is_2D) element_size = 1; if (index) { - if (is_2D_input) { + + if (this->prog->Target == GL_VERTEX_PROGRAM_ARB && + src.file == PROGRAM_INPUT) + element_size = attrib_type_size(ir->type, true); + if (is_2D) { src.index2D = index->value.i[0]; src.has_index2 = true; } else @@ -2180,24 +2563,24 @@ glsl_to_tgsi_visitor::visit(ir_dereference_array *ir) index_reg = get_temp(native_integers ? glsl_type::int_type : glsl_type::float_type); - emit(ir, TGSI_OPCODE_MUL, st_dst_reg(index_reg), + emit_asm(ir, TGSI_OPCODE_MUL, st_dst_reg(index_reg), this->result, st_src_reg_for_type(index_reg.type, element_size)); } /* If there was already a relative address register involved, add the * new and the old together to get the new offset. */ - if (!is_2D_input && src.reladdr != NULL) { + if (!is_2D && src.reladdr != NULL) { st_src_reg accum_reg = get_temp(native_integers ? glsl_type::int_type : glsl_type::float_type); - emit(ir, TGSI_OPCODE_ADD, st_dst_reg(accum_reg), + emit_asm(ir, TGSI_OPCODE_ADD, st_dst_reg(accum_reg), index_reg, *src.reladdr); index_reg = accum_reg; } - if (is_2D_input) { + if (is_2D) { src.reladdr2 = ralloc(mem_ctx, st_src_reg); memcpy(src.reladdr2, &index_reg, sizeof(index_reg)); src.index2D = 0; @@ -2390,18 +2773,20 @@ glsl_to_tgsi_visitor::process_move_condition(ir_rvalue *ir) void glsl_to_tgsi_visitor::emit_block_mov(ir_assignment *ir, const struct glsl_type *type, - st_dst_reg *l, st_src_reg *r) + st_dst_reg *l, st_src_reg *r, + st_src_reg *cond, bool cond_swap) { if (type->base_type == GLSL_TYPE_STRUCT) { for (unsigned int i = 0; i < type->length; i++) { - emit_block_mov(ir, type->fields.structure[i].type, l, r); + emit_block_mov(ir, type->fields.structure[i].type, l, r, + cond, cond_swap); } return; } if (type->is_array()) { for (unsigned int i = 0; i < type->length; i++) { - emit_block_mov(ir, type->fields.array, l, r); + emit_block_mov(ir, type->fields.array, l, r, cond, cond_swap); } return; } @@ -2409,11 +2794,11 @@ glsl_to_tgsi_visitor::emit_block_mov(ir_assignment *ir, const struct glsl_type * if (type->is_matrix()) { const struct glsl_type *vec_type; - vec_type = glsl_type::get_instance(GLSL_TYPE_FLOAT, + vec_type = glsl_type::get_instance(type->is_double() ? GLSL_TYPE_DOUBLE : GLSL_TYPE_FLOAT, type->vector_elements, 1); for (int i = 0; i < type->matrix_columns; i++) { - emit_block_mov(ir, vec_type, l, r); + emit_block_mov(ir, vec_type, l, r, cond, cond_swap); } return; } @@ -2421,9 +2806,29 @@ glsl_to_tgsi_visitor::emit_block_mov(ir_assignment *ir, const struct glsl_type * assert(type->is_scalar() || type->is_vector()); r->type = type->base_type; - emit(ir, TGSI_OPCODE_MOV, *l, *r); + if (cond) { + st_src_reg l_src = st_src_reg(*l); + l_src.swizzle = swizzle_for_size(type->vector_elements); + + if (native_integers) { + emit_asm(ir, TGSI_OPCODE_UCMP, *l, *cond, + cond_swap ? l_src : *r, + cond_swap ? *r : l_src); + } else { + emit_asm(ir, TGSI_OPCODE_CMP, *l, *cond, + cond_swap ? l_src : *r, + cond_swap ? *r : l_src); + } + } else { + emit_asm(ir, TGSI_OPCODE_MOV, *l, *r); + } l->index++; r->index++; + if (type->is_dual_slot()) { + l->index++; + if (r->is_double_vertex_input == false) + r->index++; + } } void @@ -2431,7 +2836,6 @@ glsl_to_tgsi_visitor::visit(ir_assignment *ir) { st_dst_reg l; st_src_reg r; - int i; ir->rhs->accept(this); r = this->result; @@ -2444,8 +2848,28 @@ glsl_to_tgsi_visitor::visit(ir_assignment *ir) */ if (ir->write_mask == 0) { assert(!ir->lhs->type->is_scalar() && !ir->lhs->type->is_vector()); - l.writemask = WRITEMASK_XYZW; + + if (ir->lhs->type->is_array() || ir->lhs->type->without_array()->is_matrix()) { + if (ir->lhs->type->without_array()->is_64bit()) { + switch (ir->lhs->type->without_array()->vector_elements) { + case 1: + l.writemask = WRITEMASK_X; + break; + case 2: + l.writemask = WRITEMASK_XY; + break; + case 3: + l.writemask = WRITEMASK_XYZ; + break; + case 4: + l.writemask = WRITEMASK_XYZW; + break; + } + } else + l.writemask = WRITEMASK_XYZW; + } } else if (ir->lhs->type->is_scalar() && + !ir->lhs->type->is_64bit() && ir->lhs->variable_referenced()->data.mode == ir_var_shader_out) { /* FINISHME: This hack makes writing to gl_FragDepth, which lives in the * FINISHME: W component of fragment shader output zero, work correctly. @@ -2488,46 +2912,24 @@ glsl_to_tgsi_visitor::visit(ir_assignment *ir) const bool switch_order = this->process_move_condition(ir->condition); st_src_reg condition = this->result; - for (i = 0; i < type_size(ir->lhs->type); i++) { - st_src_reg l_src = st_src_reg(l); - st_src_reg condition_temp = condition; - st_src_reg op1, op2; - l_src.swizzle = swizzle_for_size(ir->lhs->type->vector_elements); - - op1 = r; - op2 = l_src; - if (switch_order) { - op1 = l_src; - op2 = r; - } - - if (native_integers) { - emit(ir, TGSI_OPCODE_UCMP, l, condition_temp, op1, op2); - } - else { - emit(ir, TGSI_OPCODE_CMP, l, condition_temp, op1, op2); - } - - l.index++; - r.index++; - } + emit_block_mov(ir, ir->lhs->type, &l, &r, &condition, switch_order); } else if (ir->rhs->as_expression() && this->instructions.get_tail() && ir->rhs == ((glsl_to_tgsi_instruction *)this->instructions.get_tail())->ir && type_size(ir->lhs->type) == 1 && - l.writemask == ((glsl_to_tgsi_instruction *)this->instructions.get_tail())->dst.writemask) { - /* To avoid emitting an extra MOV when assigning an expression to a + l.writemask == ((glsl_to_tgsi_instruction *)this->instructions.get_tail())->dst[0].writemask) { + /* To avoid emitting an extra MOV when assigning an expression to a * variable, emit the last instruction of the expression again, but * replace the destination register with the target of the assignment. * Dead code elimination will remove the original instruction. */ glsl_to_tgsi_instruction *inst, *new_inst; inst = (glsl_to_tgsi_instruction *)this->instructions.get_tail(); - new_inst = emit(ir, inst->op, l, inst->src[0], inst->src[1], inst->src[2]); + new_inst = emit_asm(ir, inst->op, l, inst->src[0], inst->src[1], inst->src[2], inst->src[3]); new_inst->saturate = inst->saturate; - inst->dead_mask = inst->dst.writemask; + inst->dead_mask = inst->dst[0].writemask; } else { - emit_block_mov(ir, ir->rhs->type, &l, &r); + emit_block_mov(ir, ir->rhs->type, &l, &r, NULL, false); } } @@ -2536,7 +2938,7 @@ void glsl_to_tgsi_visitor::visit(ir_constant *ir) { st_src_reg src; - GLfloat stack_vals[4] = { 0 }; + GLdouble stack_vals[4] = { 0 }; gl_constant_value *values = (gl_constant_value *) stack_vals; GLenum gl_type = GL_NONE; unsigned int i; @@ -2561,7 +2963,7 @@ glsl_to_tgsi_visitor::visit(ir_constant *ir) src = this->result; for (i = 0; i < (unsigned int)size; i++) { - emit(ir, TGSI_OPCODE_MOV, temp, src); + emit_asm(ir, TGSI_OPCODE_MOV, temp, src); src.index++; temp.index++; @@ -2583,7 +2985,7 @@ glsl_to_tgsi_visitor::visit(ir_constant *ir) ir->array_elements[i]->accept(this); src = this->result; for (int j = 0; j < size; j++) { - emit(ir, TGSI_OPCODE_MOV, temp, src); + emit_asm(ir, TGSI_OPCODE_MOV, temp, src); src.index++; temp.index++; @@ -2599,20 +3001,57 @@ glsl_to_tgsi_visitor::visit(ir_constant *ir) st_dst_reg mat_column = st_dst_reg(mat); for (i = 0; i < ir->type->matrix_columns; i++) { - assert(ir->type->base_type == GLSL_TYPE_FLOAT); - values = (gl_constant_value *) &ir->value.f[i * ir->type->vector_elements]; - - src = st_src_reg(file, -1, ir->type->base_type); - src.index = add_constant(file, - values, - ir->type->vector_elements, - GL_FLOAT, - &src.swizzle); - emit(ir, TGSI_OPCODE_MOV, mat_column, src); + switch (ir->type->base_type) { + case GLSL_TYPE_FLOAT: + values = (gl_constant_value *) &ir->value.f[i * ir->type->vector_elements]; + src = st_src_reg(file, -1, ir->type->base_type); + src.index = add_constant(file, + values, + ir->type->vector_elements, + GL_FLOAT, + &src.swizzle); + emit_asm(ir, TGSI_OPCODE_MOV, mat_column, src); + break; + case GLSL_TYPE_DOUBLE: + values = (gl_constant_value *) &ir->value.d[i * ir->type->vector_elements]; + src = st_src_reg(file, -1, ir->type->base_type); + src.index = add_constant(file, + values, + ir->type->vector_elements, + GL_DOUBLE, + &src.swizzle); + if (ir->type->vector_elements >= 2) { + mat_column.writemask = WRITEMASK_XY; + src.swizzle = MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_X, SWIZZLE_Y); + emit_asm(ir, TGSI_OPCODE_MOV, mat_column, src); + } else { + mat_column.writemask = WRITEMASK_X; + src.swizzle = MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_X, SWIZZLE_X, SWIZZLE_X); + emit_asm(ir, TGSI_OPCODE_MOV, mat_column, src); + } + src.index++; + if (ir->type->vector_elements > 2) { + if (ir->type->vector_elements == 4) { + mat_column.writemask = WRITEMASK_ZW; + src.swizzle = MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_X, SWIZZLE_Y); + emit_asm(ir, TGSI_OPCODE_MOV, mat_column, src); + } else { + mat_column.writemask = WRITEMASK_Z; + src.swizzle = MAKE_SWIZZLE4(SWIZZLE_Y, SWIZZLE_Y, SWIZZLE_Y, SWIZZLE_Y); + emit_asm(ir, TGSI_OPCODE_MOV, mat_column, src); + mat_column.writemask = WRITEMASK_XYZW; + src.swizzle = SWIZZLE_XYZW; + } + mat_column.index++; + } + break; + default: + unreachable("Illegal matrix constant type.\n"); + break; + } mat_column.index++; } - this->result = mat; return; } @@ -2624,6 +3063,13 @@ glsl_to_tgsi_visitor::visit(ir_constant *ir) values[i].f = ir->value.f[i]; } break; + case GLSL_TYPE_DOUBLE: + gl_type = GL_DOUBLE; + for (i = 0; i < ir->type->vector_elements; i++) { + values[i * 2].i = *(uint32_t *)&ir->value.d[i]; + values[i * 2 + 1].i = *(((uint32_t *)&ir->value.d[i]) + 1); + } + break; case GLSL_TYPE_UINT: gl_type = native_integers ? GL_UNSIGNED_INT : GL_FLOAT; for (i = 0; i < ir->type->vector_elements; i++) { @@ -2696,14 +3142,558 @@ glsl_to_tgsi_visitor::get_function_signature(ir_function_signature *sig) return entry; } +void +glsl_to_tgsi_visitor::visit_atomic_counter_intrinsic(ir_call *ir) +{ + const char *callee = ir->callee->function_name(); + exec_node *param = ir->actual_parameters.get_head(); + ir_dereference *deref = static_cast(param); + ir_variable *location = deref->variable_referenced(); + + st_src_reg buffer( + PROGRAM_BUFFER, location->data.binding, GLSL_TYPE_ATOMIC_UINT); + + /* Calculate the surface offset */ + st_src_reg offset; + unsigned array_size = 0, base = 0, index = 0; + + get_deref_offsets(deref, &array_size, &base, &index, &offset); + + if (offset.file != PROGRAM_UNDEFINED) { + emit_asm(ir, TGSI_OPCODE_MUL, st_dst_reg(offset), + offset, st_src_reg_for_int(ATOMIC_COUNTER_SIZE)); + emit_asm(ir, TGSI_OPCODE_ADD, st_dst_reg(offset), + offset, st_src_reg_for_int(location->data.offset + index * ATOMIC_COUNTER_SIZE)); + } else { + offset = st_src_reg_for_int(location->data.offset + index * ATOMIC_COUNTER_SIZE); + } + + ir->return_deref->accept(this); + st_dst_reg dst(this->result); + dst.writemask = WRITEMASK_X; + + glsl_to_tgsi_instruction *inst; + + if (!strcmp("__intrinsic_atomic_read", callee)) { + inst = emit_asm(ir, TGSI_OPCODE_LOAD, dst, offset); + } else if (!strcmp("__intrinsic_atomic_increment", callee)) { + inst = emit_asm(ir, TGSI_OPCODE_ATOMUADD, dst, offset, + st_src_reg_for_int(1)); + } else if (!strcmp("__intrinsic_atomic_predecrement", callee)) { + inst = emit_asm(ir, TGSI_OPCODE_ATOMUADD, dst, offset, + st_src_reg_for_int(-1)); + emit_asm(ir, TGSI_OPCODE_ADD, dst, this->result, st_src_reg_for_int(-1)); + } else { + param = param->get_next(); + ir_rvalue *val = ((ir_instruction *)param)->as_rvalue(); + val->accept(this); + + st_src_reg data = this->result, data2 = undef_src; + unsigned opcode; + if (!strcmp("__intrinsic_atomic_add", callee)) + opcode = TGSI_OPCODE_ATOMUADD; + else if (!strcmp("__intrinsic_atomic_min", callee)) + opcode = TGSI_OPCODE_ATOMIMIN; + else if (!strcmp("__intrinsic_atomic_max", callee)) + opcode = TGSI_OPCODE_ATOMIMAX; + else if (!strcmp("__intrinsic_atomic_and", callee)) + opcode = TGSI_OPCODE_ATOMAND; + else if (!strcmp("__intrinsic_atomic_or", callee)) + opcode = TGSI_OPCODE_ATOMOR; + else if (!strcmp("__intrinsic_atomic_xor", callee)) + opcode = TGSI_OPCODE_ATOMXOR; + else if (!strcmp("__intrinsic_atomic_exchange", callee)) + opcode = TGSI_OPCODE_ATOMXCHG; + else if (!strcmp("__intrinsic_atomic_comp_swap", callee)) { + opcode = TGSI_OPCODE_ATOMCAS; + param = param->get_next(); + val = ((ir_instruction *)param)->as_rvalue(); + val->accept(this); + data2 = this->result; + } else if (!strcmp("__intrinsic_atomic_sub", callee)) { + opcode = TGSI_OPCODE_ATOMUADD; + st_src_reg res = get_temp(glsl_type::uvec4_type); + st_dst_reg dstres = st_dst_reg(res); + dstres.writemask = dst.writemask; + emit_asm(ir, TGSI_OPCODE_INEG, dstres, data); + data = res; + } else { + assert(!"Unexpected intrinsic"); + return; + } + + inst = emit_asm(ir, opcode, dst, offset, data, data2); + } + + inst->buffer = buffer; +} + +void +glsl_to_tgsi_visitor::visit_ssbo_intrinsic(ir_call *ir) +{ + const char *callee = ir->callee->function_name(); + exec_node *param = ir->actual_parameters.get_head(); + + ir_rvalue *block = ((ir_instruction *)param)->as_rvalue(); + + param = param->get_next(); + ir_rvalue *offset = ((ir_instruction *)param)->as_rvalue(); + + ir_constant *const_block = block->as_constant(); + + st_src_reg buffer( + PROGRAM_BUFFER, + ctx->Const.Program[shader->Stage].MaxAtomicBuffers + + (const_block ? const_block->value.u[0] : 0), + GLSL_TYPE_UINT); + + if (!const_block) { + block->accept(this); + buffer.reladdr = ralloc(mem_ctx, st_src_reg); + *buffer.reladdr = this->result; + emit_arl(ir, sampler_reladdr, this->result); + } + + /* Calculate the surface offset */ + offset->accept(this); + st_src_reg off = this->result; + + st_dst_reg dst = undef_dst; + if (ir->return_deref) { + ir->return_deref->accept(this); + dst = st_dst_reg(this->result); + dst.writemask = (1 << ir->return_deref->type->vector_elements) - 1; + } + + glsl_to_tgsi_instruction *inst; + + if (!strcmp("__intrinsic_load_ssbo", callee)) { + inst = emit_asm(ir, TGSI_OPCODE_LOAD, dst, off); + if (dst.type == GLSL_TYPE_BOOL) + emit_asm(ir, TGSI_OPCODE_USNE, dst, st_src_reg(dst), st_src_reg_for_int(0)); + } else if (!strcmp("__intrinsic_store_ssbo", callee)) { + param = param->get_next(); + ir_rvalue *val = ((ir_instruction *)param)->as_rvalue(); + val->accept(this); + + param = param->get_next(); + ir_constant *write_mask = ((ir_instruction *)param)->as_constant(); + assert(write_mask); + dst.writemask = write_mask->value.u[0]; + + dst.type = this->result.type; + inst = emit_asm(ir, TGSI_OPCODE_STORE, dst, off, this->result); + } else { + param = param->get_next(); + ir_rvalue *val = ((ir_instruction *)param)->as_rvalue(); + val->accept(this); + + st_src_reg data = this->result, data2 = undef_src; + unsigned opcode; + if (!strcmp("__intrinsic_atomic_add_ssbo", callee)) + opcode = TGSI_OPCODE_ATOMUADD; + else if (!strcmp("__intrinsic_atomic_min_ssbo", callee)) + opcode = TGSI_OPCODE_ATOMIMIN; + else if (!strcmp("__intrinsic_atomic_max_ssbo", callee)) + opcode = TGSI_OPCODE_ATOMIMAX; + else if (!strcmp("__intrinsic_atomic_and_ssbo", callee)) + opcode = TGSI_OPCODE_ATOMAND; + else if (!strcmp("__intrinsic_atomic_or_ssbo", callee)) + opcode = TGSI_OPCODE_ATOMOR; + else if (!strcmp("__intrinsic_atomic_xor_ssbo", callee)) + opcode = TGSI_OPCODE_ATOMXOR; + else if (!strcmp("__intrinsic_atomic_exchange_ssbo", callee)) + opcode = TGSI_OPCODE_ATOMXCHG; + else if (!strcmp("__intrinsic_atomic_comp_swap_ssbo", callee)) { + opcode = TGSI_OPCODE_ATOMCAS; + param = param->get_next(); + val = ((ir_instruction *)param)->as_rvalue(); + val->accept(this); + data2 = this->result; + } else { + assert(!"Unexpected intrinsic"); + return; + } + + inst = emit_asm(ir, opcode, dst, off, data, data2); + } + + param = param->get_next(); + ir_constant *access = NULL; + if (!param->is_tail_sentinel()) { + access = ((ir_instruction *)param)->as_constant(); + assert(access); + } + + /* The emit_asm() might have actually split the op into pieces, e.g. for + * double stores. We have to go back and fix up all the generated ops. + */ + unsigned op = inst->op; + do { + inst->buffer = buffer; + if (access) + inst->buffer_access = access->value.u[0]; + inst = (glsl_to_tgsi_instruction *)inst->get_prev(); + if (inst->op == TGSI_OPCODE_UADD) + inst = (glsl_to_tgsi_instruction *)inst->get_prev(); + } while (inst && inst->op == op && inst->buffer.file == PROGRAM_UNDEFINED); +} + +void +glsl_to_tgsi_visitor::visit_membar_intrinsic(ir_call *ir) +{ + const char *callee = ir->callee->function_name(); + + if (!strcmp("__intrinsic_memory_barrier", callee)) + emit_asm(ir, TGSI_OPCODE_MEMBAR, undef_dst, + st_src_reg_for_int(TGSI_MEMBAR_SHADER_BUFFER | + TGSI_MEMBAR_ATOMIC_BUFFER | + TGSI_MEMBAR_SHADER_IMAGE | + TGSI_MEMBAR_SHARED)); + else if (!strcmp("__intrinsic_memory_barrier_atomic_counter", callee)) + emit_asm(ir, TGSI_OPCODE_MEMBAR, undef_dst, + st_src_reg_for_int(TGSI_MEMBAR_ATOMIC_BUFFER)); + else if (!strcmp("__intrinsic_memory_barrier_buffer", callee)) + emit_asm(ir, TGSI_OPCODE_MEMBAR, undef_dst, + st_src_reg_for_int(TGSI_MEMBAR_SHADER_BUFFER)); + else if (!strcmp("__intrinsic_memory_barrier_image", callee)) + emit_asm(ir, TGSI_OPCODE_MEMBAR, undef_dst, + st_src_reg_for_int(TGSI_MEMBAR_SHADER_IMAGE)); + else if (!strcmp("__intrinsic_memory_barrier_shared", callee)) + emit_asm(ir, TGSI_OPCODE_MEMBAR, undef_dst, + st_src_reg_for_int(TGSI_MEMBAR_SHARED)); + else if (!strcmp("__intrinsic_group_memory_barrier", callee)) + emit_asm(ir, TGSI_OPCODE_MEMBAR, undef_dst, + st_src_reg_for_int(TGSI_MEMBAR_SHADER_BUFFER | + TGSI_MEMBAR_ATOMIC_BUFFER | + TGSI_MEMBAR_SHADER_IMAGE | + TGSI_MEMBAR_SHARED | + TGSI_MEMBAR_THREAD_GROUP)); + else + assert(!"Unexpected memory barrier intrinsic"); +} + +void +glsl_to_tgsi_visitor::visit_shared_intrinsic(ir_call *ir) +{ + const char *callee = ir->callee->function_name(); + exec_node *param = ir->actual_parameters.get_head(); + + ir_rvalue *offset = ((ir_instruction *)param)->as_rvalue(); + + st_src_reg buffer(PROGRAM_MEMORY, 0, GLSL_TYPE_UINT); + + /* Calculate the surface offset */ + offset->accept(this); + st_src_reg off = this->result; + + st_dst_reg dst = undef_dst; + if (ir->return_deref) { + ir->return_deref->accept(this); + dst = st_dst_reg(this->result); + dst.writemask = (1 << ir->return_deref->type->vector_elements) - 1; + } + + glsl_to_tgsi_instruction *inst; + + if (!strcmp("__intrinsic_load_shared", callee)) { + inst = emit_asm(ir, TGSI_OPCODE_LOAD, dst, off); + inst->buffer = buffer; + } else if (!strcmp("__intrinsic_store_shared", callee)) { + param = param->get_next(); + ir_rvalue *val = ((ir_instruction *)param)->as_rvalue(); + val->accept(this); + + param = param->get_next(); + ir_constant *write_mask = ((ir_instruction *)param)->as_constant(); + assert(write_mask); + dst.writemask = write_mask->value.u[0]; + + dst.type = this->result.type; + inst = emit_asm(ir, TGSI_OPCODE_STORE, dst, off, this->result); + inst->buffer = buffer; + } else { + param = param->get_next(); + ir_rvalue *val = ((ir_instruction *)param)->as_rvalue(); + val->accept(this); + + st_src_reg data = this->result, data2 = undef_src; + unsigned opcode; + if (!strcmp("__intrinsic_atomic_add_shared", callee)) + opcode = TGSI_OPCODE_ATOMUADD; + else if (!strcmp("__intrinsic_atomic_min_shared", callee)) + opcode = TGSI_OPCODE_ATOMIMIN; + else if (!strcmp("__intrinsic_atomic_max_shared", callee)) + opcode = TGSI_OPCODE_ATOMIMAX; + else if (!strcmp("__intrinsic_atomic_and_shared", callee)) + opcode = TGSI_OPCODE_ATOMAND; + else if (!strcmp("__intrinsic_atomic_or_shared", callee)) + opcode = TGSI_OPCODE_ATOMOR; + else if (!strcmp("__intrinsic_atomic_xor_shared", callee)) + opcode = TGSI_OPCODE_ATOMXOR; + else if (!strcmp("__intrinsic_atomic_exchange_shared", callee)) + opcode = TGSI_OPCODE_ATOMXCHG; + else if (!strcmp("__intrinsic_atomic_comp_swap_shared", callee)) { + opcode = TGSI_OPCODE_ATOMCAS; + param = param->get_next(); + val = ((ir_instruction *)param)->as_rvalue(); + val->accept(this); + data2 = this->result; + } else { + assert(!"Unexpected intrinsic"); + return; + } + + inst = emit_asm(ir, opcode, dst, off, data, data2); + inst->buffer = buffer; + } +} + +void +glsl_to_tgsi_visitor::visit_image_intrinsic(ir_call *ir) +{ + const char *callee = ir->callee->function_name(); + exec_node *param = ir->actual_parameters.get_head(); + + ir_dereference *img = (ir_dereference *)param; + const ir_variable *imgvar = img->variable_referenced(); + const glsl_type *type = imgvar->type->without_array(); + unsigned sampler_array_size = 1, sampler_base = 0; + + st_src_reg reladdr; + st_src_reg image(PROGRAM_IMAGE, 0, GLSL_TYPE_UINT); + + get_deref_offsets(img, &sampler_array_size, &sampler_base, + (unsigned int *)&image.index, &reladdr); + if (reladdr.file != PROGRAM_UNDEFINED) { + image.reladdr = ralloc(mem_ctx, st_src_reg); + *image.reladdr = reladdr; + emit_arl(ir, sampler_reladdr, reladdr); + } + + st_dst_reg dst = undef_dst; + if (ir->return_deref) { + ir->return_deref->accept(this); + dst = st_dst_reg(this->result); + dst.writemask = (1 << ir->return_deref->type->vector_elements) - 1; + } + + glsl_to_tgsi_instruction *inst; + + if (!strcmp("__intrinsic_image_size", callee)) { + dst.writemask = WRITEMASK_XYZ; + inst = emit_asm(ir, TGSI_OPCODE_RESQ, dst); + } else if (!strcmp("__intrinsic_image_samples", callee)) { + st_src_reg res = get_temp(glsl_type::ivec4_type); + st_dst_reg dstres = st_dst_reg(res); + dstres.writemask = WRITEMASK_W; + inst = emit_asm(ir, TGSI_OPCODE_RESQ, dstres); + res.swizzle = SWIZZLE_WWWW; + emit_asm(ir, TGSI_OPCODE_MOV, dst, res); + } else { + st_src_reg arg1 = undef_src, arg2 = undef_src; + st_src_reg coord; + st_dst_reg coord_dst; + coord = get_temp(glsl_type::ivec4_type); + coord_dst = st_dst_reg(coord); + coord_dst.writemask = (1 << type->coordinate_components()) - 1; + param = param->get_next(); + ((ir_dereference *)param)->accept(this); + emit_asm(ir, TGSI_OPCODE_MOV, coord_dst, this->result); + coord.swizzle = SWIZZLE_XXXX; + switch (type->coordinate_components()) { + case 4: assert(!"unexpected coord count"); + /* fallthrough */ + case 3: coord.swizzle |= SWIZZLE_Z << 6; + /* fallthrough */ + case 2: coord.swizzle |= SWIZZLE_Y << 3; + } + + if (type->sampler_dimensionality == GLSL_SAMPLER_DIM_MS) { + param = param->get_next(); + ((ir_dereference *)param)->accept(this); + st_src_reg sample = this->result; + sample.swizzle = SWIZZLE_XXXX; + coord_dst.writemask = WRITEMASK_W; + emit_asm(ir, TGSI_OPCODE_MOV, coord_dst, sample); + coord.swizzle |= SWIZZLE_W << 9; + } + + param = param->get_next(); + if (!param->is_tail_sentinel()) { + ((ir_dereference *)param)->accept(this); + arg1 = this->result; + param = param->get_next(); + } + + if (!param->is_tail_sentinel()) { + ((ir_dereference *)param)->accept(this); + arg2 = this->result; + param = param->get_next(); + } + + assert(param->is_tail_sentinel()); + + unsigned opcode; + if (!strcmp("__intrinsic_image_load", callee)) + opcode = TGSI_OPCODE_LOAD; + else if (!strcmp("__intrinsic_image_store", callee)) + opcode = TGSI_OPCODE_STORE; + else if (!strcmp("__intrinsic_image_atomic_add", callee)) + opcode = TGSI_OPCODE_ATOMUADD; + else if (!strcmp("__intrinsic_image_atomic_min", callee)) + opcode = TGSI_OPCODE_ATOMIMIN; + else if (!strcmp("__intrinsic_image_atomic_max", callee)) + opcode = TGSI_OPCODE_ATOMIMAX; + else if (!strcmp("__intrinsic_image_atomic_and", callee)) + opcode = TGSI_OPCODE_ATOMAND; + else if (!strcmp("__intrinsic_image_atomic_or", callee)) + opcode = TGSI_OPCODE_ATOMOR; + else if (!strcmp("__intrinsic_image_atomic_xor", callee)) + opcode = TGSI_OPCODE_ATOMXOR; + else if (!strcmp("__intrinsic_image_atomic_exchange", callee)) + opcode = TGSI_OPCODE_ATOMXCHG; + else if (!strcmp("__intrinsic_image_atomic_comp_swap", callee)) + opcode = TGSI_OPCODE_ATOMCAS; + else { + assert(!"Unexpected intrinsic"); + return; + } + + inst = emit_asm(ir, opcode, dst, coord, arg1, arg2); + if (opcode == TGSI_OPCODE_STORE) + inst->dst[0].writemask = WRITEMASK_XYZW; + } + + inst->buffer = image; + inst->sampler_array_size = sampler_array_size; + inst->sampler_base = sampler_base; + + switch (type->sampler_dimensionality) { + case GLSL_SAMPLER_DIM_1D: + inst->tex_target = (type->sampler_array) + ? TEXTURE_1D_ARRAY_INDEX : TEXTURE_1D_INDEX; + break; + case GLSL_SAMPLER_DIM_2D: + inst->tex_target = (type->sampler_array) + ? TEXTURE_2D_ARRAY_INDEX : TEXTURE_2D_INDEX; + break; + case GLSL_SAMPLER_DIM_3D: + inst->tex_target = TEXTURE_3D_INDEX; + break; + case GLSL_SAMPLER_DIM_CUBE: + inst->tex_target = (type->sampler_array) + ? TEXTURE_CUBE_ARRAY_INDEX : TEXTURE_CUBE_INDEX; + break; + case GLSL_SAMPLER_DIM_RECT: + inst->tex_target = TEXTURE_RECT_INDEX; + break; + case GLSL_SAMPLER_DIM_BUF: + inst->tex_target = TEXTURE_BUFFER_INDEX; + break; + case GLSL_SAMPLER_DIM_EXTERNAL: + inst->tex_target = TEXTURE_EXTERNAL_INDEX; + break; + case GLSL_SAMPLER_DIM_MS: + inst->tex_target = (type->sampler_array) + ? TEXTURE_2D_MULTISAMPLE_ARRAY_INDEX : TEXTURE_2D_MULTISAMPLE_INDEX; + break; + default: + assert(!"Should not get here."); + } + + inst->image_format = st_mesa_format_to_pipe_format(st_context(ctx), + _mesa_get_shader_image_format(imgvar->data.image_format)); + + if (imgvar->data.image_coherent) + inst->buffer_access |= TGSI_MEMORY_COHERENT; + if (imgvar->data.image_restrict) + inst->buffer_access |= TGSI_MEMORY_RESTRICT; + if (imgvar->data.image_volatile) + inst->buffer_access |= TGSI_MEMORY_VOLATILE; +} + void glsl_to_tgsi_visitor::visit(ir_call *ir) { glsl_to_tgsi_instruction *call_inst; ir_function_signature *sig = ir->callee; - function_entry *entry = get_function_signature(sig); + const char *callee = sig->function_name(); + function_entry *entry; int i; + /* Filter out intrinsics */ + if (!strcmp("__intrinsic_atomic_read", callee) || + !strcmp("__intrinsic_atomic_increment", callee) || + !strcmp("__intrinsic_atomic_predecrement", callee) || + !strcmp("__intrinsic_atomic_add", callee) || + !strcmp("__intrinsic_atomic_sub", callee) || + !strcmp("__intrinsic_atomic_min", callee) || + !strcmp("__intrinsic_atomic_max", callee) || + !strcmp("__intrinsic_atomic_and", callee) || + !strcmp("__intrinsic_atomic_or", callee) || + !strcmp("__intrinsic_atomic_xor", callee) || + !strcmp("__intrinsic_atomic_exchange", callee) || + !strcmp("__intrinsic_atomic_comp_swap", callee)) { + visit_atomic_counter_intrinsic(ir); + return; + } + + if (!strcmp("__intrinsic_load_ssbo", callee) || + !strcmp("__intrinsic_store_ssbo", callee) || + !strcmp("__intrinsic_atomic_add_ssbo", callee) || + !strcmp("__intrinsic_atomic_min_ssbo", callee) || + !strcmp("__intrinsic_atomic_max_ssbo", callee) || + !strcmp("__intrinsic_atomic_and_ssbo", callee) || + !strcmp("__intrinsic_atomic_or_ssbo", callee) || + !strcmp("__intrinsic_atomic_xor_ssbo", callee) || + !strcmp("__intrinsic_atomic_exchange_ssbo", callee) || + !strcmp("__intrinsic_atomic_comp_swap_ssbo", callee)) { + visit_ssbo_intrinsic(ir); + return; + } + + if (!strcmp("__intrinsic_memory_barrier", callee) || + !strcmp("__intrinsic_memory_barrier_atomic_counter", callee) || + !strcmp("__intrinsic_memory_barrier_buffer", callee) || + !strcmp("__intrinsic_memory_barrier_image", callee) || + !strcmp("__intrinsic_memory_barrier_shared", callee) || + !strcmp("__intrinsic_group_memory_barrier", callee)) { + visit_membar_intrinsic(ir); + return; + } + + if (!strcmp("__intrinsic_load_shared", callee) || + !strcmp("__intrinsic_store_shared", callee) || + !strcmp("__intrinsic_atomic_add_shared", callee) || + !strcmp("__intrinsic_atomic_min_shared", callee) || + !strcmp("__intrinsic_atomic_max_shared", callee) || + !strcmp("__intrinsic_atomic_and_shared", callee) || + !strcmp("__intrinsic_atomic_or_shared", callee) || + !strcmp("__intrinsic_atomic_xor_shared", callee) || + !strcmp("__intrinsic_atomic_exchange_shared", callee) || + !strcmp("__intrinsic_atomic_comp_swap_shared", callee)) { + visit_shared_intrinsic(ir); + return; + } + + if (!strcmp("__intrinsic_image_load", callee) || + !strcmp("__intrinsic_image_store", callee) || + !strcmp("__intrinsic_image_atomic_add", callee) || + !strcmp("__intrinsic_image_atomic_min", callee) || + !strcmp("__intrinsic_image_atomic_max", callee) || + !strcmp("__intrinsic_image_atomic_and", callee) || + !strcmp("__intrinsic_image_atomic_or", callee) || + !strcmp("__intrinsic_image_atomic_xor", callee) || + !strcmp("__intrinsic_image_atomic_exchange", callee) || + !strcmp("__intrinsic_image_atomic_comp_swap", callee) || + !strcmp("__intrinsic_image_size", callee) || + !strcmp("__intrinsic_image_samples", callee)) { + visit_image_intrinsic(ir); + return; + } + + entry = get_function_signature(sig); /* Process in parameters. */ foreach_two_lists(formal_node, &sig->parameters, actual_node, &ir->actual_parameters) { @@ -2723,10 +3713,9 @@ glsl_to_tgsi_visitor::visit(ir_call *ir) l.index = storage->index; l.reladdr = NULL; l.writemask = WRITEMASK_XYZW; - l.cond_mask = COND_TR; for (i = 0; i < type_size(param->type); i++) { - emit(ir, TGSI_OPCODE_MOV, l, r); + emit_asm(ir, TGSI_OPCODE_MOV, l, r); l.index++; r.index++; } @@ -2734,7 +3723,7 @@ glsl_to_tgsi_visitor::visit(ir_call *ir) } /* Emit call instruction */ - call_inst = emit(ir, TGSI_OPCODE_CAL); + call_inst = emit_asm(ir, TGSI_OPCODE_CAL); call_inst->function = entry; /* Process out parameters. */ @@ -2759,7 +3748,7 @@ glsl_to_tgsi_visitor::visit(ir_call *ir) st_dst_reg l = st_dst_reg(this->result); for (i = 0; i < type_size(param->type); i++) { - emit(ir, TGSI_OPCODE_MOV, l, r); + emit_asm(ir, TGSI_OPCODE_MOV, l, r); l.index++; r.index++; } @@ -2770,18 +3759,113 @@ glsl_to_tgsi_visitor::visit(ir_call *ir) this->result = entry->return_reg; } +void +glsl_to_tgsi_visitor::calc_deref_offsets(ir_dereference *head, + ir_dereference *tail, + unsigned *array_elements, + unsigned *base, + unsigned *index, + st_src_reg *indirect, + unsigned *location) +{ + switch (tail->ir_type) { + case ir_type_dereference_record: { + ir_dereference_record *deref_record = tail->as_dereference_record(); + const glsl_type *struct_type = deref_record->record->type; + int field_index = deref_record->record->type->field_index(deref_record->field); + + calc_deref_offsets(head, deref_record->record->as_dereference(), array_elements, base, index, indirect, location); + + assert(field_index >= 0); + *location += struct_type->record_location_offset(field_index); + break; + } + + case ir_type_dereference_array: { + ir_dereference_array *deref_arr = tail->as_dereference_array(); + ir_constant *array_index = deref_arr->array_index->constant_expression_value(); + + if (!array_index) { + st_src_reg temp_reg; + st_dst_reg temp_dst; + + temp_reg = get_temp(glsl_type::uint_type); + temp_dst = st_dst_reg(temp_reg); + temp_dst.writemask = 1; + + deref_arr->array_index->accept(this); + if (*array_elements != 1) + emit_asm(NULL, TGSI_OPCODE_MUL, temp_dst, this->result, st_src_reg_for_int(*array_elements)); + else + emit_asm(NULL, TGSI_OPCODE_MOV, temp_dst, this->result); + + if (indirect->file == PROGRAM_UNDEFINED) + *indirect = temp_reg; + else { + temp_dst = st_dst_reg(*indirect); + temp_dst.writemask = 1; + emit_asm(NULL, TGSI_OPCODE_ADD, temp_dst, *indirect, temp_reg); + } + } else + *index += array_index->value.u[0] * *array_elements; + + *array_elements *= deref_arr->array->type->length; + + calc_deref_offsets(head, deref_arr->array->as_dereference(), array_elements, base, index, indirect, location); + break; + } + default: + break; + } +} + +void +glsl_to_tgsi_visitor::get_deref_offsets(ir_dereference *ir, + unsigned *array_size, + unsigned *base, + unsigned *index, + st_src_reg *reladdr) +{ + GLuint shader = _mesa_program_enum_to_shader_stage(this->prog->Target); + unsigned location = 0; + ir_variable *var = ir->variable_referenced(); + + memset(reladdr, 0, sizeof(*reladdr)); + reladdr->file = PROGRAM_UNDEFINED; + + *base = 0; + *array_size = 1; + + assert(var); + location = var->data.location; + calc_deref_offsets(ir, ir, array_size, base, index, reladdr, &location); + + /* + * If we end up with no indirect then adjust the base to the index, + * and set the array size to 1. + */ + if (reladdr->file == PROGRAM_UNDEFINED) { + *base = *index; + *array_size = 1; + } + + if (location != 0xffffffff) { + *base += this->shader_program->UniformStorage[location].opaque[shader].index; + *index += this->shader_program->UniformStorage[location].opaque[shader].index; + } +} + void glsl_to_tgsi_visitor::visit(ir_texture *ir) { st_src_reg result_src, coord, cube_sc, lod_info, projector, dx, dy; st_src_reg offset[MAX_GLSL_TEXTURE_OFFSET], sample_index, component; - st_src_reg levels_src; + st_src_reg levels_src, reladdr; st_dst_reg result_dst, coord_dst, cube_sc_dst; glsl_to_tgsi_instruction *inst = NULL; unsigned opcode = TGSI_OPCODE_NOP; const glsl_type *sampler_type = ir->sampler->type; - ir_rvalue *sampler_index = - _mesa_get_sampler_array_nonconst_index(ir->sampler); + unsigned sampler_array_size = 1, sampler_index = 0, sampler_base = 0; bool is_cube_array = false; unsigned i; @@ -2795,14 +3879,14 @@ glsl_to_tgsi_visitor::visit(ir_texture *ir) ir->coordinate->accept(this); /* Put our coords in a temp. We'll need to modify them for shadow, - * projection, or LOD, so the only case we'd use it as is is if + * projection, or LOD, so the only case we'd use it as-is is if * we're doing plain old texturing. The optimization passes on * glsl_to_tgsi_visitor should handle cleaning up our mess in that case. */ coord = get_temp(glsl_type::vec4_type); coord_dst = st_dst_reg(coord); coord_dst.writemask = (1 << ir->coordinate->type->vector_elements) - 1; - emit(ir, TGSI_OPCODE_MOV, coord_dst, this->result); + emit_asm(ir, TGSI_OPCODE_MOV, coord_dst, this->result); } if (ir->projector) { @@ -2818,7 +3902,7 @@ glsl_to_tgsi_visitor::visit(ir_texture *ir) switch (ir->op) { case ir_tex: - opcode = (is_cube_array && ir->shadow_comparitor) ? TGSI_OPCODE_TEX2 : TGSI_OPCODE_TEX; + opcode = (is_cube_array && ir->shadow_comparitor) ? TGSI_OPCODE_TEX2 : TGSI_OPCODE_TEX; if (ir->offset) { ir->offset->accept(this); offset[0] = this->result; @@ -2866,7 +3950,7 @@ glsl_to_tgsi_visitor::visit(ir_texture *ir) break; case ir_query_levels: opcode = TGSI_OPCODE_TXQ; - lod_info = st_src_reg(PROGRAM_IMMEDIATE, 0, GLSL_TYPE_INT); + lod_info = undef_src; levels_src = get_temp(ir->type); break; case ir_txf: @@ -2905,13 +3989,18 @@ glsl_to_tgsi_visitor::visit(ir_texture *ir) case ir_lod: opcode = TGSI_OPCODE_LODQ; break; + case ir_texture_samples: + opcode = TGSI_OPCODE_TXQS; + break; + case ir_samples_identical: + unreachable("Unexpected ir_samples_identical opcode"); } if (ir->projector) { if (opcode == TGSI_OPCODE_TEX) { /* Slot the projector in as the last component of the coord. */ coord_dst.writemask = WRITEMASK_W; - emit(ir, TGSI_OPCODE_MOV, coord_dst, projector); + emit_asm(ir, TGSI_OPCODE_MOV, coord_dst, projector); coord_dst.writemask = WRITEMASK_XYZW; opcode = TGSI_OPCODE_TXP; } else { @@ -2923,7 +4012,7 @@ glsl_to_tgsi_visitor::visit(ir_texture *ir) * projective divide now. */ coord_dst.writemask = WRITEMASK_W; - emit(ir, TGSI_OPCODE_RCP, coord_dst, projector); + emit_asm(ir, TGSI_OPCODE_RCP, coord_dst, projector); /* In the case where we have to project the coordinates "by hand," * the shadow comparator value must also be projected. @@ -2938,18 +4027,18 @@ glsl_to_tgsi_visitor::visit(ir_texture *ir) tmp_src = get_temp(glsl_type::vec4_type); st_dst_reg tmp_dst = st_dst_reg(tmp_src); - /* Projective division not allowed for array samplers. */ - assert(!sampler_type->sampler_array); + /* Projective division not allowed for array samplers. */ + assert(!sampler_type->sampler_array); tmp_dst.writemask = WRITEMASK_Z; - emit(ir, TGSI_OPCODE_MOV, tmp_dst, this->result); + emit_asm(ir, TGSI_OPCODE_MOV, tmp_dst, this->result); tmp_dst.writemask = WRITEMASK_XY; - emit(ir, TGSI_OPCODE_MOV, tmp_dst, coord); + emit_asm(ir, TGSI_OPCODE_MOV, tmp_dst, coord); } coord_dst.writemask = WRITEMASK_XYZ; - emit(ir, TGSI_OPCODE_MUL, coord_dst, tmp_src, coord_w); + emit_asm(ir, TGSI_OPCODE_MUL, coord_dst, tmp_src, coord_w); coord_dst.writemask = WRITEMASK_XYZW; coord.swizzle = SWIZZLE_XYZW; @@ -2970,7 +4059,7 @@ glsl_to_tgsi_visitor::visit(ir_texture *ir) cube_sc = get_temp(glsl_type::float_type); cube_sc_dst = st_dst_reg(cube_sc); cube_sc_dst.writemask = WRITEMASK_X; - emit(ir, TGSI_OPCODE_MOV, cube_sc_dst, this->result); + emit_asm(ir, TGSI_OPCODE_MOV, cube_sc_dst, this->result); cube_sc_dst.writemask = WRITEMASK_X; } else { @@ -2981,68 +4070,66 @@ glsl_to_tgsi_visitor::visit(ir_texture *ir) } else { coord_dst.writemask = WRITEMASK_Z; } - - emit(ir, TGSI_OPCODE_MOV, coord_dst, this->result); + emit_asm(ir, TGSI_OPCODE_MOV, coord_dst, this->result); coord_dst.writemask = WRITEMASK_XYZW; } } if (ir->op == ir_txf_ms) { coord_dst.writemask = WRITEMASK_W; - emit(ir, TGSI_OPCODE_MOV, coord_dst, sample_index); + emit_asm(ir, TGSI_OPCODE_MOV, coord_dst, sample_index); coord_dst.writemask = WRITEMASK_XYZW; } else if (opcode == TGSI_OPCODE_TXL || opcode == TGSI_OPCODE_TXB || opcode == TGSI_OPCODE_TXF) { /* TGSI stores LOD or LOD bias in the last channel of the coords. */ coord_dst.writemask = WRITEMASK_W; - emit(ir, TGSI_OPCODE_MOV, coord_dst, lod_info); + emit_asm(ir, TGSI_OPCODE_MOV, coord_dst, lod_info); coord_dst.writemask = WRITEMASK_XYZW; } - if (sampler_index) { - sampler_index->accept(this); - emit_arl(ir, sampler_reladdr, this->result); - } + get_deref_offsets(ir->sampler, &sampler_array_size, &sampler_base, + &sampler_index, &reladdr); + if (reladdr.file != PROGRAM_UNDEFINED) + emit_arl(ir, sampler_reladdr, reladdr); if (opcode == TGSI_OPCODE_TXD) - inst = emit(ir, opcode, result_dst, coord, dx, dy); + inst = emit_asm(ir, opcode, result_dst, coord, dx, dy); else if (opcode == TGSI_OPCODE_TXQ) { if (ir->op == ir_query_levels) { /* the level is stored in W */ - inst = emit(ir, opcode, st_dst_reg(levels_src), lod_info); + inst = emit_asm(ir, opcode, st_dst_reg(levels_src), lod_info); result_dst.writemask = WRITEMASK_X; levels_src.swizzle = SWIZZLE_WWWW; - emit(ir, TGSI_OPCODE_MOV, result_dst, levels_src); + emit_asm(ir, TGSI_OPCODE_MOV, result_dst, levels_src); } else - inst = emit(ir, opcode, result_dst, lod_info); + inst = emit_asm(ir, opcode, result_dst, lod_info); + } else if (opcode == TGSI_OPCODE_TXQS) { + inst = emit_asm(ir, opcode, result_dst); } else if (opcode == TGSI_OPCODE_TXF) { - inst = emit(ir, opcode, result_dst, coord); + inst = emit_asm(ir, opcode, result_dst, coord); } else if (opcode == TGSI_OPCODE_TXL2 || opcode == TGSI_OPCODE_TXB2) { - inst = emit(ir, opcode, result_dst, coord, lod_info); + inst = emit_asm(ir, opcode, result_dst, coord, lod_info); } else if (opcode == TGSI_OPCODE_TEX2) { - inst = emit(ir, opcode, result_dst, coord, cube_sc); + inst = emit_asm(ir, opcode, result_dst, coord, cube_sc); } else if (opcode == TGSI_OPCODE_TG4) { if (is_cube_array && ir->shadow_comparitor) { - inst = emit(ir, opcode, result_dst, coord, cube_sc); + inst = emit_asm(ir, opcode, result_dst, coord, cube_sc); } else { - inst = emit(ir, opcode, result_dst, coord, component); + inst = emit_asm(ir, opcode, result_dst, coord, component); } } else - inst = emit(ir, opcode, result_dst, coord); + inst = emit_asm(ir, opcode, result_dst, coord); if (ir->shadow_comparitor) inst->tex_shadow = GL_TRUE; - inst->sampler.index = _mesa_get_sampler_uniform_value(ir->sampler, - this->shader_program, - this->prog); - if (sampler_index) { + inst->sampler.index = sampler_index; + inst->sampler_array_size = sampler_array_size; + inst->sampler_base = sampler_base; + + if (reladdr.file != PROGRAM_UNDEFINED) { inst->sampler.reladdr = ralloc(mem_ctx, st_src_reg); - memcpy(inst->sampler.reladdr, &sampler_reladdr, sizeof(sampler_reladdr)); - inst->sampler_array_size = - ir->sampler->as_dereference_array()->array->type->array_size(); - } else { - inst->sampler_array_size = 1; + memcpy(inst->sampler.reladdr, &reladdr, sizeof(reladdr)); } if (ir->offset) { @@ -3084,6 +4171,8 @@ glsl_to_tgsi_visitor::visit(ir_texture *ir) assert(!"Should not get here."); } + inst->tex_type = ir->type->base_type; + this->result = result_src; } @@ -3102,13 +4191,13 @@ glsl_to_tgsi_visitor::visit(ir_return *ir) l = st_dst_reg(current_function->return_reg); for (i = 0; i < type_size(current_function->sig->return_type); i++) { - emit(ir, TGSI_OPCODE_MOV, l, r); + emit_asm(ir, TGSI_OPCODE_MOV, l, r); l.index++; r.index++; } } - emit(ir, TGSI_OPCODE_RET); + emit_asm(ir, TGSI_OPCODE_RET); } void @@ -3121,16 +4210,16 @@ glsl_to_tgsi_visitor::visit(ir_discard *ir) /* Convert the bool condition to a float so we can negate. */ if (native_integers) { st_src_reg temp = get_temp(ir->condition->type); - emit(ir, TGSI_OPCODE_AND, st_dst_reg(temp), + emit_asm(ir, TGSI_OPCODE_AND, st_dst_reg(temp), condition, st_src_reg_for_float(1.0)); condition = temp; } condition.negate = ~condition.negate; - emit(ir, TGSI_OPCODE_KILL_IF, undef_dst, condition); + emit_asm(ir, TGSI_OPCODE_KILL_IF, undef_dst, condition); } else { /* unconditional kil */ - emit(ir, TGSI_OPCODE_KILL); + emit_asm(ir, TGSI_OPCODE_KILL); } } @@ -3145,18 +4234,18 @@ glsl_to_tgsi_visitor::visit(ir_if *ir) if_opcode = native_integers ? TGSI_OPCODE_UIF : TGSI_OPCODE_IF; - if_inst = emit(ir->condition, if_opcode, undef_dst, this->result); + if_inst = emit_asm(ir->condition, if_opcode, undef_dst, this->result); this->instructions.push_tail(if_inst); visit_exec_list(&ir->then_instructions, this); if (!ir->else_instructions.is_empty()) { - emit(ir->condition, TGSI_OPCODE_ELSE); + emit_asm(ir->condition, TGSI_OPCODE_ELSE); visit_exec_list(&ir->else_instructions, this); } - if_inst = emit(ir->condition, TGSI_OPCODE_ENDIF); + if_inst = emit_asm(ir->condition, TGSI_OPCODE_ENDIF); } @@ -3166,7 +4255,7 @@ glsl_to_tgsi_visitor::visit(ir_emit_vertex *ir) assert(this->prog->Target == GL_GEOMETRY_PROGRAM_NV); ir->stream->accept(this); - emit(ir, TGSI_OPCODE_EMIT, undef_dst, this->result); + emit_asm(ir, TGSI_OPCODE_EMIT, undef_dst, this->result); } void @@ -3175,20 +4264,38 @@ glsl_to_tgsi_visitor::visit(ir_end_primitive *ir) assert(this->prog->Target == GL_GEOMETRY_PROGRAM_NV); ir->stream->accept(this); - emit(ir, TGSI_OPCODE_ENDPRIM, undef_dst, this->result); + emit_asm(ir, TGSI_OPCODE_ENDPRIM, undef_dst, this->result); +} + +void +glsl_to_tgsi_visitor::visit(ir_barrier *ir) +{ + assert(this->prog->Target == GL_TESS_CONTROL_PROGRAM_NV || + this->prog->Target == GL_COMPUTE_PROGRAM_NV); + + emit_asm(ir, TGSI_OPCODE_BARRIER); } glsl_to_tgsi_visitor::glsl_to_tgsi_visitor() { + STATIC_ASSERT(sizeof(samplers_used) * 8 >= PIPE_MAX_SAMPLERS); + result.file = PROGRAM_UNDEFINED; next_temp = 1; + array_sizes = NULL; + max_num_arrays = 0; next_array = 0; + num_input_arrays = 0; + num_output_arrays = 0; next_signature_id = 1; num_immediates = 0; current_function = NULL; num_address_regs = 0; samplers_used = 0; + buffers_used = 0; + images_used = 0; indirect_addr_consts = false; + wpos_transform_const = -1; glsl_version = 0; native_integers = false; mem_ctx = ralloc_context(NULL); @@ -3198,10 +4305,13 @@ glsl_to_tgsi_visitor::glsl_to_tgsi_visitor() shader = NULL; options = NULL; have_sqrt = false; + have_fma = false; + use_shared_memory = false; } glsl_to_tgsi_visitor::~glsl_to_tgsi_visitor() { + free(array_sizes); ralloc_free(mem_ctx); } @@ -3219,19 +4329,44 @@ static void count_resources(glsl_to_tgsi_visitor *v, gl_program *prog) { v->samplers_used = 0; + v->buffers_used = 0; + v->images_used = 0; foreach_in_list(glsl_to_tgsi_instruction, inst, &v->instructions) { - if (is_tex_instruction(inst->op)) { + if (inst->info->is_tex) { for (int i = 0; i < inst->sampler_array_size; i++) { - v->samplers_used |= 1 << (inst->sampler.index + i); + unsigned idx = inst->sampler_base + i; + v->samplers_used |= 1u << idx; + + debug_assert(idx < (int)ARRAY_SIZE(v->sampler_types)); + v->sampler_types[idx] = inst->tex_type; + v->sampler_targets[idx] = + st_translate_texture_target(inst->tex_target, inst->tex_shadow); if (inst->tex_shadow) { prog->ShadowSamplers |= 1 << (inst->sampler.index + i); } } } + if (inst->buffer.file != PROGRAM_UNDEFINED && ( + is_resource_instruction(inst->op) || + inst->op == TGSI_OPCODE_STORE)) { + if (inst->buffer.file == PROGRAM_BUFFER) { + v->buffers_used |= 1 << inst->buffer.index; + } else if (inst->buffer.file == PROGRAM_MEMORY) { + v->use_shared_memory = true; + } else { + assert(inst->buffer.file == PROGRAM_IMAGE); + for (int i = 0; i < inst->sampler_array_size; i++) { + unsigned idx = inst->sampler_base + i; + v->images_used |= 1 << idx; + v->image_targets[idx] = + st_translate_texture_target(inst->tex_target, false); + v->image_formats[idx] = inst->image_format; + } + } + } } - prog->SamplersUsed = v->samplers_used; if (v->shader_program != NULL) @@ -3252,7 +4387,7 @@ get_src_arg_mask(st_dst_reg dst, st_src_reg src) */ for (comp = 0; comp < 4; ++comp) { const unsigned coord = GET_SWZ(src.swizzle, comp); - ASSERT(coord < 4); + assert(coord < 4); if (dst.writemask & (1 << comp) && coord <= SWIZZLE_W) read_mask |= 1 << coord; } @@ -3270,9 +4405,9 @@ get_src_arg_mask(st_dst_reg dst, st_src_reg src) * Here is why this conversion is safe: * CMP T0, T1 T2 T0 can be expanded to: * if (T1 < 0.0) - * MOV T0, T2; + * MOV T0, T2; * else - * MOV T0, T0; + * MOV T0, T0; * * If (T1 < 0.0) evaluates to true then our replacement MOV T0, T2 is the same * as the original program. If (T1 < 0.0) evaluates to false, executing @@ -3286,7 +4421,7 @@ glsl_to_tgsi_visitor::simplify_cmp(void) { int tempWritesSize = 0; unsigned *tempWrites = NULL; - unsigned outputWrites[MAX_PROGRAM_OUTPUTS]; + unsigned outputWrites[VARYING_SLOT_TESS_MAX]; memset(outputWrites, 0, sizeof(outputWrites)); @@ -3294,7 +4429,8 @@ glsl_to_tgsi_visitor::simplify_cmp(void) unsigned prevWriteMask = 0; /* Give up if we encounter relative addressing or flow control. */ - if (inst->dst.reladdr || + if (inst->dst[0].reladdr || inst->dst[0].reladdr2 || + inst->dst[1].reladdr || inst->dst[1].reladdr2 || tgsi_get_opcode_info(inst->op)->is_branch || inst->op == TGSI_OPCODE_BGNSUB || inst->op == TGSI_OPCODE_CONT || @@ -3304,12 +4440,12 @@ glsl_to_tgsi_visitor::simplify_cmp(void) break; } - if (inst->dst.file == PROGRAM_OUTPUT) { - assert(inst->dst.index < MAX_PROGRAM_OUTPUTS); - prevWriteMask = outputWrites[inst->dst.index]; - outputWrites[inst->dst.index] |= inst->dst.writemask; - } else if (inst->dst.file == PROGRAM_TEMPORARY) { - if (inst->dst.index >= tempWritesSize) { + if (inst->dst[0].file == PROGRAM_OUTPUT) { + assert(inst->dst[0].index < (signed)ARRAY_SIZE(outputWrites)); + prevWriteMask = outputWrites[inst->dst[0].index]; + outputWrites[inst->dst[0].index] |= inst->dst[0].writemask; + } else if (inst->dst[0].file == PROGRAM_TEMPORARY) { + if (inst->dst[0].index >= tempWritesSize) { const int inc = 4096; tempWrites = (unsigned*) @@ -3322,20 +4458,21 @@ glsl_to_tgsi_visitor::simplify_cmp(void) tempWritesSize += inc; } - prevWriteMask = tempWrites[inst->dst.index]; - tempWrites[inst->dst.index] |= inst->dst.writemask; + prevWriteMask = tempWrites[inst->dst[0].index]; + tempWrites[inst->dst[0].index] |= inst->dst[0].writemask; } else continue; /* For a CMP to be considered a conditional write, the destination * register and source register two must be the same. */ if (inst->op == TGSI_OPCODE_CMP - && !(inst->dst.writemask & prevWriteMask) - && inst->src[2].file == inst->dst.file - && inst->src[2].index == inst->dst.index - && inst->dst.writemask == get_src_arg_mask(inst->dst, inst->src[2])) { + && !(inst->dst[0].writemask & prevWriteMask) + && inst->src[2].file == inst->dst[0].file + && inst->src[2].index == inst->dst[0].index + && inst->dst[0].writemask == get_src_arg_mask(inst->dst[0], inst->src[2])) { inst->op = TGSI_OPCODE_MOV; + inst->info = tgsi_get_opcode_info(inst->op); inst->src[0] = inst->src[1]; } } @@ -3345,52 +4482,54 @@ glsl_to_tgsi_visitor::simplify_cmp(void) /* Replaces all references to a temporary register index with another index. */ void -glsl_to_tgsi_visitor::rename_temp_register(int index, int new_index) +glsl_to_tgsi_visitor::rename_temp_registers(int num_renames, struct rename_reg_pair *renames) { foreach_in_list(glsl_to_tgsi_instruction, inst, &this->instructions) { unsigned j; - - for (j=0; j < num_inst_src_regs(inst->op); j++) { - if (inst->src[j].file == PROGRAM_TEMPORARY && - inst->src[j].index == index) { - inst->src[j].index = new_index; - } + int k; + for (j = 0; j < num_inst_src_regs(inst); j++) { + if (inst->src[j].file == PROGRAM_TEMPORARY) + for (k = 0; k < num_renames; k++) + if (inst->src[j].index == renames[k].old_reg) + inst->src[j].index = renames[k].new_reg; } - for (j=0; j < inst->tex_offset_num_offset; j++) { - if (inst->tex_offsets[j].file == PROGRAM_TEMPORARY && - inst->tex_offsets[j].index == index) { - inst->tex_offsets[j].index = new_index; - } + for (j = 0; j < inst->tex_offset_num_offset; j++) { + if (inst->tex_offsets[j].file == PROGRAM_TEMPORARY) + for (k = 0; k < num_renames; k++) + if (inst->tex_offsets[j].index == renames[k].old_reg) + inst->tex_offsets[j].index = renames[k].new_reg; } - - if (inst->dst.file == PROGRAM_TEMPORARY && inst->dst.index == index) { - inst->dst.index = new_index; + + for (j = 0; j < num_inst_dst_regs(inst); j++) { + if (inst->dst[j].file == PROGRAM_TEMPORARY) + for (k = 0; k < num_renames; k++) + if (inst->dst[j].index == renames[k].old_reg) + inst->dst[j].index = renames[k].new_reg; } } } -int -glsl_to_tgsi_visitor::get_first_temp_read(int index) +void +glsl_to_tgsi_visitor::get_first_temp_read(int *first_reads) { int depth = 0; /* loop depth */ int loop_start = -1; /* index of the first active BGNLOOP (if any) */ unsigned i = 0, j; - + foreach_in_list(glsl_to_tgsi_instruction, inst, &this->instructions) { - for (j=0; j < num_inst_src_regs(inst->op); j++) { - if (inst->src[j].file == PROGRAM_TEMPORARY && - inst->src[j].index == index) { - return (depth == 0) ? i : loop_start; + for (j = 0; j < num_inst_src_regs(inst); j++) { + if (inst->src[j].file == PROGRAM_TEMPORARY) { + if (first_reads[inst->src[j].index] == -1) + first_reads[inst->src[j].index] = (depth == 0) ? i : loop_start; } } - for (j=0; j < inst->tex_offset_num_offset; j++) { - if (inst->tex_offsets[j].file == PROGRAM_TEMPORARY && - inst->tex_offsets[j].index == index) { - return (depth == 0) ? i : loop_start; + for (j = 0; j < inst->tex_offset_num_offset; j++) { + if (inst->tex_offsets[j].file == PROGRAM_TEMPORARY) { + if (first_reads[inst->tex_offsets[j].index] == -1) + first_reads[inst->tex_offsets[j].index] = (depth == 0) ? i : loop_start; } } - if (inst->op == TGSI_OPCODE_BGNLOOP) { if(depth++ == 0) loop_start = i; @@ -3399,97 +4538,77 @@ glsl_to_tgsi_visitor::get_first_temp_read(int index) loop_start = -1; } assert(depth >= 0); - i++; } - - return -1; } -int -glsl_to_tgsi_visitor::get_first_temp_write(int index) +void +glsl_to_tgsi_visitor::get_last_temp_read_first_temp_write(int *last_reads, int *first_writes) { int depth = 0; /* loop depth */ int loop_start = -1; /* index of the first active BGNLOOP (if any) */ - int i = 0; - + unsigned i = 0, j; + int k; foreach_in_list(glsl_to_tgsi_instruction, inst, &this->instructions) { - if (inst->dst.file == PROGRAM_TEMPORARY && inst->dst.index == index) { - return (depth == 0) ? i : loop_start; + for (j = 0; j < num_inst_src_regs(inst); j++) { + if (inst->src[j].file == PROGRAM_TEMPORARY) + last_reads[inst->src[j].index] = (depth == 0) ? i : -2; + } + for (j = 0; j < num_inst_dst_regs(inst); j++) { + if (inst->dst[j].file == PROGRAM_TEMPORARY) { + if (first_writes[inst->dst[j].index] == -1) + first_writes[inst->dst[j].index] = (depth == 0) ? i : loop_start; + last_reads[inst->dst[j].index] = (depth == 0) ? i : -2; + } + } + for (j = 0; j < inst->tex_offset_num_offset; j++) { + if (inst->tex_offsets[j].file == PROGRAM_TEMPORARY) + last_reads[inst->tex_offsets[j].index] = (depth == 0) ? i : -2; } - if (inst->op == TGSI_OPCODE_BGNLOOP) { if(depth++ == 0) loop_start = i; } else if (inst->op == TGSI_OPCODE_ENDLOOP) { - if (--depth == 0) + if (--depth == 0) { loop_start = -1; + for (k = 0; k < this->next_temp; k++) { + if (last_reads[k] == -2) { + last_reads[k] = i; + } + } + } } assert(depth >= 0); - i++; } - - return -1; } -int -glsl_to_tgsi_visitor::get_last_temp_read(int index) +void +glsl_to_tgsi_visitor::get_last_temp_write(int *last_writes) { int depth = 0; /* loop depth */ - int last = -1; /* index of last instruction that reads the temporary */ - unsigned i = 0, j; - + int i = 0, k; + unsigned j; + foreach_in_list(glsl_to_tgsi_instruction, inst, &this->instructions) { - for (j=0; j < num_inst_src_regs(inst->op); j++) { - if (inst->src[j].file == PROGRAM_TEMPORARY && - inst->src[j].index == index) { - last = (depth == 0) ? i : -2; - } - } - for (j=0; j < inst->tex_offset_num_offset; j++) { - if (inst->tex_offsets[j].file == PROGRAM_TEMPORARY && - inst->tex_offsets[j].index == index) - last = (depth == 0) ? i : -2; + for (j = 0; j < num_inst_dst_regs(inst); j++) { + if (inst->dst[j].file == PROGRAM_TEMPORARY) + last_writes[inst->dst[j].index] = (depth == 0) ? i : -2; } - - if (inst->op == TGSI_OPCODE_BGNLOOP) - depth++; - else if (inst->op == TGSI_OPCODE_ENDLOOP) - if (--depth == 0 && last == -2) - last = i; - assert(depth >= 0); - - i++; - } - - assert(last >= -1); - return last; -} -int -glsl_to_tgsi_visitor::get_last_temp_write(int index) -{ - int depth = 0; /* loop depth */ - int last = -1; /* index of last instruction that writes to the temporary */ - int i = 0; - - foreach_in_list(glsl_to_tgsi_instruction, inst, &this->instructions) { - if (inst->dst.file == PROGRAM_TEMPORARY && inst->dst.index == index) - last = (depth == 0) ? i : -2; - if (inst->op == TGSI_OPCODE_BGNLOOP) depth++; else if (inst->op == TGSI_OPCODE_ENDLOOP) - if (--depth == 0 && last == -2) - last = i; + if (--depth == 0) { + for (k = 0; k < this->next_temp; k++) { + if (last_writes[k] == -2) { + last_writes[k] = i; + } + } + } assert(depth >= 0); - i++; } - - assert(last >= -1); - return last; } /* @@ -3516,14 +4635,14 @@ void glsl_to_tgsi_visitor::copy_propagate(void) { glsl_to_tgsi_instruction **acp = rzalloc_array(mem_ctx, - glsl_to_tgsi_instruction *, - this->next_temp * 4); + glsl_to_tgsi_instruction *, + this->next_temp * 4); int *acp_level = rzalloc_array(mem_ctx, int, this->next_temp * 4); int level = 0; foreach_in_list(glsl_to_tgsi_instruction, inst, &this->instructions) { - assert(inst->dst.file != PROGRAM_TEMPORARY - || inst->dst.index < this->next_temp); + assert(inst->dst[0].file != PROGRAM_TEMPORARY + || inst->dst[0].index < this->next_temp); /* First, do any copy propagation possible into the src regs. */ for (int r = 0; r < 3; r++) { @@ -3555,9 +4674,11 @@ glsl_to_tgsi_visitor::copy_propagate(void) first = copy_chan; } else { if (first->src[0].file != copy_chan->src[0].file || - first->src[0].index != copy_chan->src[0].index) { - good = false; - break; + first->src[0].index != copy_chan->src[0].index || + first->src[0].double_reg2 != copy_chan->src[0].double_reg2 || + first->src[0].index2D != copy_chan->src[0].index2D) { + good = false; + break; } } } @@ -3570,13 +4691,14 @@ glsl_to_tgsi_visitor::copy_propagate(void) inst->src[r].index = first->src[0].index; inst->src[r].index2D = first->src[0].index2D; inst->src[r].has_index2 = first->src[0].has_index2; + inst->src[r].double_reg2 = first->src[0].double_reg2; + inst->src[r].array_id = first->src[0].array_id; int swizzle = 0; for (int i = 0; i < 4; i++) { int src_chan = GET_SWZ(inst->src[r].swizzle, i); glsl_to_tgsi_instruction *copy_inst = acp[acp_base + src_chan]; - swizzle |= (GET_SWZ(copy_inst->src[0].swizzle, src_chan) << - (3 * i)); + swizzle |= (GET_SWZ(copy_inst->src[0].swizzle, src_chan) << (3 * i)); } inst->src[r].swizzle = swizzle; } @@ -3602,10 +4724,10 @@ glsl_to_tgsi_visitor::copy_propagate(void) for (int r = 0; r < this->next_temp; r++) { for (int c = 0; c < 4; c++) { if (!acp[4 * r + c]) - continue; + continue; if (acp_level[4 * r + c] >= level) - acp[4 * r + c] = NULL; + acp[4 * r + c] = NULL; } } if (inst->op == TGSI_OPCODE_ENDIF) @@ -3616,50 +4738,50 @@ glsl_to_tgsi_visitor::copy_propagate(void) /* Continuing the block, clear any written channels from * the ACP. */ - if (inst->dst.file == PROGRAM_TEMPORARY && inst->dst.reladdr) { - /* Any temporary might be written, so no copy propagation - * across this instruction. - */ - memset(acp, 0, sizeof(*acp) * this->next_temp * 4); - } else if (inst->dst.file == PROGRAM_OUTPUT && - inst->dst.reladdr) { - /* Any output might be written, so no copy propagation - * from outputs across this instruction. - */ - for (int r = 0; r < this->next_temp; r++) { - for (int c = 0; c < 4; c++) { - if (!acp[4 * r + c]) - continue; - - if (acp[4 * r + c]->src[0].file == PROGRAM_OUTPUT) - acp[4 * r + c] = NULL; + for (int d = 0; d < 2; d++) { + if (inst->dst[d].file == PROGRAM_TEMPORARY && inst->dst[d].reladdr) { + /* Any temporary might be written, so no copy propagation + * across this instruction. + */ + memset(acp, 0, sizeof(*acp) * this->next_temp * 4); + } else if (inst->dst[d].file == PROGRAM_OUTPUT && + inst->dst[d].reladdr) { + /* Any output might be written, so no copy propagation + * from outputs across this instruction. + */ + for (int r = 0; r < this->next_temp; r++) { + for (int c = 0; c < 4; c++) { + if (!acp[4 * r + c]) + continue; + + if (acp[4 * r + c]->src[0].file == PROGRAM_OUTPUT) + acp[4 * r + c] = NULL; + } } - } - } else if (inst->dst.file == PROGRAM_TEMPORARY || - inst->dst.file == PROGRAM_OUTPUT) { - /* Clear where it's used as dst. */ - if (inst->dst.file == PROGRAM_TEMPORARY) { - for (int c = 0; c < 4; c++) { - if (inst->dst.writemask & (1 << c)) { - acp[4 * inst->dst.index + c] = NULL; - } + } else if (inst->dst[d].file == PROGRAM_TEMPORARY || + inst->dst[d].file == PROGRAM_OUTPUT) { + /* Clear where it's used as dst. */ + if (inst->dst[d].file == PROGRAM_TEMPORARY) { + for (int c = 0; c < 4; c++) { + if (inst->dst[d].writemask & (1 << c)) + acp[4 * inst->dst[d].index + c] = NULL; + } } - } - - /* Clear where it's used as src. */ - for (int r = 0; r < this->next_temp; r++) { - for (int c = 0; c < 4; c++) { - if (!acp[4 * r + c]) - continue; - int src_chan = GET_SWZ(acp[4 * r + c]->src[0].swizzle, c); - - if (acp[4 * r + c]->src[0].file == inst->dst.file && - acp[4 * r + c]->src[0].index == inst->dst.index && - inst->dst.writemask & (1 << src_chan)) - { - acp[4 * r + c] = NULL; - } + /* Clear where it's used as src. */ + for (int r = 0; r < this->next_temp; r++) { + for (int c = 0; c < 4; c++) { + if (!acp[4 * r + c]) + continue; + + int src_chan = GET_SWZ(acp[4 * r + c]->src[0].swizzle, c); + + if (acp[4 * r + c]->src[0].file == inst->dst[d].file && + acp[4 * r + c]->src[0].index == inst->dst[d].index && + inst->dst[d].writemask & (1 << src_chan)) { + acp[4 * r + c] = NULL; + } + } } } } @@ -3668,18 +4790,20 @@ glsl_to_tgsi_visitor::copy_propagate(void) /* If this is a copy, add it to the ACP. */ if (inst->op == TGSI_OPCODE_MOV && - inst->dst.file == PROGRAM_TEMPORARY && - !(inst->dst.file == inst->src[0].file && - inst->dst.index == inst->src[0].index) && - !inst->dst.reladdr && + inst->dst[0].file == PROGRAM_TEMPORARY && + !(inst->dst[0].file == inst->src[0].file && + inst->dst[0].index == inst->src[0].index) && + !inst->dst[0].reladdr && + !inst->dst[0].reladdr2 && !inst->saturate && + inst->src[0].file != PROGRAM_ARRAY && !inst->src[0].reladdr && !inst->src[0].reladdr2 && !inst->src[0].negate) { for (int i = 0; i < 4; i++) { - if (inst->dst.writemask & (1 << i)) { - acp[4 * inst->dst.index + i] = inst; - acp_level[4 * inst->dst.index + i] = level; + if (inst->dst[0].writemask & (1 << i)) { + acp[4 * inst->dst[0].index + i] = inst; + acp_level[4 * inst->dst[0].index + i] = level; } } } @@ -3694,7 +4818,7 @@ glsl_to_tgsi_visitor::copy_propagate(void) * code elimination. * * The glsl_to_tgsi_visitor lazily produces code assuming that this pass - * will occur. As an example, a TXP production after copy propagation but + * will occur. As an example, a TXP production after copy propagation but * before this pass: * * 0: MOV TEMP[1], INPUT[4].xyyy; @@ -3716,9 +4840,9 @@ glsl_to_tgsi_visitor::eliminate_dead_code(void) int removed = 0; foreach_in_list(glsl_to_tgsi_instruction, inst, &this->instructions) { - assert(inst->dst.file != PROGRAM_TEMPORARY - || inst->dst.index < this->next_temp); - + assert(inst->dst[0].file != PROGRAM_TEMPORARY + || inst->dst[0].index < this->next_temp); + switch (inst->op) { case TGSI_OPCODE_BGNLOOP: case TGSI_OPCODE_ENDLOOP: @@ -3743,30 +4867,27 @@ glsl_to_tgsi_visitor::eliminate_dead_code(void) for (int r = 0; r < this->next_temp; r++) { for (int c = 0; c < 4; c++) { if (!writes[4 * r + c]) - continue; + continue; if (write_level[4 * r + c] == level) - write_level[4 * r + c] = level-1; + write_level[4 * r + c] = level-1; } } - if(inst->op == TGSI_OPCODE_ENDIF) --level; - break; case TGSI_OPCODE_IF: case TGSI_OPCODE_UIF: ++level; /* fallthrough to default case to mark the condition as read */ - default: /* Continuing the block, clear any channels from the write array that * are read by this instruction. */ - for (unsigned i = 0; i < Elements(inst->src); i++) { + for (unsigned i = 0; i < ARRAY_SIZE(inst->src); i++) { if (inst->src[i].file == PROGRAM_TEMPORARY && inst->src[i].reladdr){ - /* Any temporary might be read, so no dead code elimination + /* Any temporary might be read, so no dead code elimination * across this instruction. */ memset(writes, 0, sizeof(*writes) * this->next_temp * 4); @@ -3776,17 +4897,16 @@ glsl_to_tgsi_visitor::eliminate_dead_code(void) src_chans |= 1 << GET_SWZ(inst->src[i].swizzle, 1); src_chans |= 1 << GET_SWZ(inst->src[i].swizzle, 2); src_chans |= 1 << GET_SWZ(inst->src[i].swizzle, 3); - + for (int c = 0; c < 4; c++) { - if (src_chans & (1 << c)) { - writes[4 * inst->src[i].index + c] = NULL; - } + if (src_chans & (1 << c)) + writes[4 * inst->src[i].index + c] = NULL; } } } for (unsigned i = 0; i < inst->tex_offset_num_offset; i++) { if (inst->tex_offsets[i].file == PROGRAM_TEMPORARY && inst->tex_offsets[i].reladdr){ - /* Any temporary might be read, so no dead code elimination + /* Any temporary might be read, so no dead code elimination * across this instruction. */ memset(writes, 0, sizeof(*writes) * this->next_temp * 4); @@ -3796,11 +4916,10 @@ glsl_to_tgsi_visitor::eliminate_dead_code(void) src_chans |= 1 << GET_SWZ(inst->tex_offsets[i].swizzle, 1); src_chans |= 1 << GET_SWZ(inst->tex_offsets[i].swizzle, 2); src_chans |= 1 << GET_SWZ(inst->tex_offsets[i].swizzle, 3); - + for (int c = 0; c < 4; c++) { - if (src_chans & (1 << c)) { - writes[4 * inst->tex_offsets[i].index + c] = NULL; - } + if (src_chans & (1 << c)) + writes[4 * inst->tex_offsets[i].index + c] = NULL; } } } @@ -3811,19 +4930,20 @@ glsl_to_tgsi_visitor::eliminate_dead_code(void) * If there is already an instruction in the write array for one or more * of the channels, flag that channel write as dead. */ - if (inst->dst.file == PROGRAM_TEMPORARY && - !inst->dst.reladdr && - !inst->saturate) { - for (int c = 0; c < 4; c++) { - if (inst->dst.writemask & (1 << c)) { - if (writes[4 * inst->dst.index + c]) { - if (write_level[4 * inst->dst.index + c] < level) - continue; - else - writes[4 * inst->dst.index + c]->dead_mask |= (1 << c); + for (unsigned i = 0; i < ARRAY_SIZE(inst->dst); i++) { + if (inst->dst[i].file == PROGRAM_TEMPORARY && + !inst->dst[i].reladdr) { + for (int c = 0; c < 4; c++) { + if (inst->dst[i].writemask & (1 << c)) { + if (writes[4 * inst->dst[i].index + c]) { + if (write_level[4 * inst->dst[i].index + c] < level) + continue; + else + writes[4 * inst->dst[i].index + c]->dead_mask |= (1 << c); + } + writes[4 * inst->dst[i].index + c] = inst; + write_level[4 * inst->dst[i].index + c] = level; } - writes[4 * inst->dst.index + c] = inst; - write_level[4 * inst->dst.index + c] = level; } } } @@ -3842,301 +4962,164 @@ glsl_to_tgsi_visitor::eliminate_dead_code(void) * the writemask of other instructions with dead channels. */ foreach_in_list_safe(glsl_to_tgsi_instruction, inst, &this->instructions) { - if (!inst->dead_mask || !inst->dst.writemask) + if (!inst->dead_mask || !inst->dst[0].writemask) continue; - else if ((inst->dst.writemask & ~inst->dead_mask) == 0) { + /* No amount of dead masks should remove memory stores */ + if (inst->info->is_store) + continue; + + if ((inst->dst[0].writemask & ~inst->dead_mask) == 0) { inst->remove(); delete inst; removed++; - } else - inst->dst.writemask &= ~(inst->dead_mask); + } else { + if (glsl_base_type_is_64bit(inst->dst[0].type)) { + if (inst->dead_mask == WRITEMASK_XY || + inst->dead_mask == WRITEMASK_ZW) + inst->dst[0].writemask &= ~(inst->dead_mask); + } else + inst->dst[0].writemask &= ~(inst->dead_mask); + } } - ralloc_free(write_level); - ralloc_free(writes); - - return removed; + ralloc_free(write_level); + ralloc_free(writes); + + return removed; +} + +/* merge DFRACEXP instructions into one. */ +void +glsl_to_tgsi_visitor::merge_two_dsts(void) +{ + foreach_in_list_safe(glsl_to_tgsi_instruction, inst, &this->instructions) { + glsl_to_tgsi_instruction *inst2; + bool merged; + if (num_inst_dst_regs(inst) != 2) + continue; + + if (inst->dst[0].file != PROGRAM_UNDEFINED && + inst->dst[1].file != PROGRAM_UNDEFINED) + continue; + + inst2 = (glsl_to_tgsi_instruction *) inst->next; + do { + + if (inst->src[0].file == inst2->src[0].file && + inst->src[0].index == inst2->src[0].index && + inst->src[0].type == inst2->src[0].type && + inst->src[0].swizzle == inst2->src[0].swizzle) + break; + inst2 = (glsl_to_tgsi_instruction *) inst2->next; + } while (inst2); + + if (!inst2) + continue; + merged = false; + if (inst->dst[0].file == PROGRAM_UNDEFINED) { + merged = true; + inst->dst[0] = inst2->dst[0]; + } else if (inst->dst[1].file == PROGRAM_UNDEFINED) { + inst->dst[1] = inst2->dst[1]; + merged = true; + } + + if (merged) { + inst2->remove(); + delete inst2; + } + } } -/* Merges temporary registers together where possible to reduce the number of +/* Merges temporary registers together where possible to reduce the number of * registers needed to run a program. - * - * Produces optimal code only after copy propagation and dead code elimination + * + * Produces optimal code only after copy propagation and dead code elimination * have been run. */ void glsl_to_tgsi_visitor::merge_registers(void) { int *last_reads = rzalloc_array(mem_ctx, int, this->next_temp); int *first_writes = rzalloc_array(mem_ctx, int, this->next_temp); + struct rename_reg_pair *renames = rzalloc_array(mem_ctx, struct rename_reg_pair, this->next_temp); int i, j; - + int num_renames = 0; + /* Read the indices of the last read and first write to each temp register - * into an array so that we don't have to traverse the instruction list as + * into an array so that we don't have to traverse the instruction list as * much. */ - for (i=0; i < this->next_temp; i++) { - last_reads[i] = get_last_temp_read(i); - first_writes[i] = get_first_temp_write(i); + for (i = 0; i < this->next_temp; i++) { + last_reads[i] = -1; + first_writes[i] = -1; } - - /* Start looking for registers with non-overlapping usages that can be + get_last_temp_read_first_temp_write(last_reads, first_writes); + + /* Start looking for registers with non-overlapping usages that can be * merged together. */ - for (i=0; i < this->next_temp; i++) { + for (i = 0; i < this->next_temp; i++) { /* Don't touch unused registers. */ if (last_reads[i] < 0 || first_writes[i] < 0) continue; - - for (j=0; j < this->next_temp; j++) { + + for (j = 0; j < this->next_temp; j++) { /* Don't touch unused registers. */ if (last_reads[j] < 0 || first_writes[j] < 0) continue; - - /* We can merge the two registers if the first write to j is after or - * in the same instruction as the last read from i. Note that the - * register at index i will always be used earlier or at the same time + + /* We can merge the two registers if the first write to j is after or + * in the same instruction as the last read from i. Note that the + * register at index i will always be used earlier or at the same time * as the register at index j. */ - if (first_writes[i] <= first_writes[j] && - last_reads[i] <= first_writes[j]) - { - rename_temp_register(j, i); /* Replace all references to j with i.*/ - - /* Update the first_writes and last_reads arrays with the new - * values for the merged register index, and mark the newly unused + if (first_writes[i] <= first_writes[j] && + last_reads[i] <= first_writes[j]) { + renames[num_renames].old_reg = j; + renames[num_renames].new_reg = i; + num_renames++; + + /* Update the first_writes and last_reads arrays with the new + * values for the merged register index, and mark the newly unused * register index as such. */ + assert(last_reads[j] >= last_reads[i]); last_reads[i] = last_reads[j]; first_writes[j] = -1; last_reads[j] = -1; } } } - + + rename_temp_registers(num_renames, renames); + ralloc_free(renames); ralloc_free(last_reads); ralloc_free(first_writes); } -/* Reassign indices to temporary registers by reusing unused indices created +/* Reassign indices to temporary registers by reusing unused indices created * by optimization passes. */ void glsl_to_tgsi_visitor::renumber_registers(void) { int i = 0; int new_index = 0; - - for (i=0; i < this->next_temp; i++) { - if (get_first_temp_read(i) < 0) continue; - if (i != new_index) - rename_temp_register(i, new_index); - new_index++; + int *first_reads = rzalloc_array(mem_ctx, int, this->next_temp); + struct rename_reg_pair *renames = rzalloc_array(mem_ctx, struct rename_reg_pair, this->next_temp); + int num_renames = 0; + for (i = 0; i < this->next_temp; i++) { + first_reads[i] = -1; } - - this->next_temp = new_index; -} - -/** - * Returns a fragment program which implements the current pixel transfer ops. - * Based on get_pixel_transfer_program in st_atom_pixeltransfer.c. - */ -extern "C" void -get_pixel_transfer_visitor(struct st_fragment_program *fp, - glsl_to_tgsi_visitor *original, - int scale_and_bias, int pixel_maps) -{ - glsl_to_tgsi_visitor *v = new glsl_to_tgsi_visitor(); - struct st_context *st = st_context(original->ctx); - struct gl_program *prog = &fp->Base.Base; - struct gl_program_parameter_list *params = _mesa_new_parameter_list(); - st_src_reg coord, src0; - st_dst_reg dst0; - glsl_to_tgsi_instruction *inst; - - /* Copy attributes of the glsl_to_tgsi_visitor in the original shader. */ - v->ctx = original->ctx; - v->prog = prog; - v->shader_program = NULL; - v->shader = NULL; - v->glsl_version = original->glsl_version; - v->native_integers = original->native_integers; - v->options = original->options; - v->next_temp = original->next_temp; - v->num_address_regs = original->num_address_regs; - v->samplers_used = prog->SamplersUsed = original->samplers_used; - v->indirect_addr_consts = original->indirect_addr_consts; - memcpy(&v->immediates, &original->immediates, sizeof(v->immediates)); - v->num_immediates = original->num_immediates; - - /* - * Get initial pixel color from the texture. - * TEX colorTemp, fragment.texcoord[0], texture[0], 2D; - */ - coord = st_src_reg(PROGRAM_INPUT, VARYING_SLOT_TEX0, glsl_type::vec2_type); - src0 = v->get_temp(glsl_type::vec4_type); - dst0 = st_dst_reg(src0); - inst = v->emit(NULL, TGSI_OPCODE_TEX, dst0, coord); - inst->sampler_array_size = 1; - inst->tex_target = TEXTURE_2D_INDEX; - - prog->InputsRead |= VARYING_BIT_TEX0; - prog->SamplersUsed |= (1 << 0); /* mark sampler 0 as used */ - v->samplers_used |= (1 << 0); - - if (scale_and_bias) { - static const gl_state_index scale_state[STATE_LENGTH] = - { STATE_INTERNAL, STATE_PT_SCALE, - (gl_state_index) 0, (gl_state_index) 0, (gl_state_index) 0 }; - static const gl_state_index bias_state[STATE_LENGTH] = - { STATE_INTERNAL, STATE_PT_BIAS, - (gl_state_index) 0, (gl_state_index) 0, (gl_state_index) 0 }; - GLint scale_p, bias_p; - st_src_reg scale, bias; - - scale_p = _mesa_add_state_reference(params, scale_state); - bias_p = _mesa_add_state_reference(params, bias_state); - - /* MAD colorTemp, colorTemp, scale, bias; */ - scale = st_src_reg(PROGRAM_STATE_VAR, scale_p, GLSL_TYPE_FLOAT); - bias = st_src_reg(PROGRAM_STATE_VAR, bias_p, GLSL_TYPE_FLOAT); - inst = v->emit(NULL, TGSI_OPCODE_MAD, dst0, src0, scale, bias); - } - - if (pixel_maps) { - st_src_reg temp = v->get_temp(glsl_type::vec4_type); - st_dst_reg temp_dst = st_dst_reg(temp); - - assert(st->pixel_xfer.pixelmap_texture); - - /* With a little effort, we can do four pixel map look-ups with - * two TEX instructions: - */ + get_first_temp_read(first_reads); - /* TEX temp.rg, colorTemp.rgba, texture[1], 2D; */ - temp_dst.writemask = WRITEMASK_XY; /* write R,G */ - inst = v->emit(NULL, TGSI_OPCODE_TEX, temp_dst, src0); - inst->sampler.index = 1; - inst->sampler_array_size = 1; - inst->tex_target = TEXTURE_2D_INDEX; - - /* TEX temp.ba, colorTemp.baba, texture[1], 2D; */ - src0.swizzle = MAKE_SWIZZLE4(SWIZZLE_Z, SWIZZLE_W, SWIZZLE_Z, SWIZZLE_W); - temp_dst.writemask = WRITEMASK_ZW; /* write B,A */ - inst = v->emit(NULL, TGSI_OPCODE_TEX, temp_dst, src0); - inst->sampler.index = 1; - inst->sampler_array_size = 1; - inst->tex_target = TEXTURE_2D_INDEX; - - prog->SamplersUsed |= (1 << 1); /* mark sampler 1 as used */ - v->samplers_used |= (1 << 1); - - /* MOV colorTemp, temp; */ - inst = v->emit(NULL, TGSI_OPCODE_MOV, dst0, temp); - } - - /* Now copy the instructions from the original glsl_to_tgsi_visitor into the - * new visitor. */ - foreach_in_list(glsl_to_tgsi_instruction, inst, &original->instructions) { - glsl_to_tgsi_instruction *newinst; - st_src_reg src_regs[3]; - - if (inst->dst.file == PROGRAM_OUTPUT) - prog->OutputsWritten |= BITFIELD64_BIT(inst->dst.index); - - for (int i=0; i<3; i++) { - src_regs[i] = inst->src[i]; - if (src_regs[i].file == PROGRAM_INPUT && - src_regs[i].index == VARYING_SLOT_COL0) - { - src_regs[i].file = PROGRAM_TEMPORARY; - src_regs[i].index = src0.index; - } - else if (src_regs[i].file == PROGRAM_INPUT) - prog->InputsRead |= BITFIELD64_BIT(src_regs[i].index); + for (i = 0; i < this->next_temp; i++) { + if (first_reads[i] < 0) continue; + if (i != new_index) { + renames[num_renames].old_reg = i; + renames[num_renames].new_reg = new_index; + num_renames++; } - - newinst = v->emit(NULL, inst->op, inst->dst, src_regs[0], src_regs[1], src_regs[2]); - newinst->tex_target = inst->tex_target; - newinst->sampler_array_size = inst->sampler_array_size; + new_index++; } - /* Make modifications to fragment program info. */ - prog->Parameters = _mesa_combine_parameter_lists(params, - original->prog->Parameters); - _mesa_free_parameter_list(params); - count_resources(v, prog); - fp->glsl_to_tgsi = v; -} - -/** - * Make fragment program for glBitmap: - * Sample the texture and kill the fragment if the bit is 0. - * This program will be combined with the user's fragment program. - * - * Based on make_bitmap_fragment_program in st_cb_bitmap.c. - */ -extern "C" void -get_bitmap_visitor(struct st_fragment_program *fp, - glsl_to_tgsi_visitor *original, int samplerIndex) -{ - glsl_to_tgsi_visitor *v = new glsl_to_tgsi_visitor(); - struct st_context *st = st_context(original->ctx); - struct gl_program *prog = &fp->Base.Base; - st_src_reg coord, src0; - st_dst_reg dst0; - glsl_to_tgsi_instruction *inst; - - /* Copy attributes of the glsl_to_tgsi_visitor in the original shader. */ - v->ctx = original->ctx; - v->prog = prog; - v->shader_program = NULL; - v->shader = NULL; - v->glsl_version = original->glsl_version; - v->native_integers = original->native_integers; - v->options = original->options; - v->next_temp = original->next_temp; - v->num_address_regs = original->num_address_regs; - v->samplers_used = prog->SamplersUsed = original->samplers_used; - v->indirect_addr_consts = original->indirect_addr_consts; - memcpy(&v->immediates, &original->immediates, sizeof(v->immediates)); - v->num_immediates = original->num_immediates; - - /* TEX tmp0, fragment.texcoord[0], texture[0], 2D; */ - coord = st_src_reg(PROGRAM_INPUT, VARYING_SLOT_TEX0, glsl_type::vec2_type); - src0 = v->get_temp(glsl_type::vec4_type); - dst0 = st_dst_reg(src0); - inst = v->emit(NULL, TGSI_OPCODE_TEX, dst0, coord); - inst->sampler.index = samplerIndex; - inst->sampler_array_size = 1; - inst->tex_target = TEXTURE_2D_INDEX; - - prog->InputsRead |= VARYING_BIT_TEX0; - prog->SamplersUsed |= (1 << samplerIndex); /* mark sampler as used */ - v->samplers_used |= (1 << samplerIndex); - - /* KIL if -tmp0 < 0 # texel=0 -> keep / texel=0 -> discard */ - src0.negate = NEGATE_XYZW; - if (st->bitmap.tex_format == PIPE_FORMAT_L8_UNORM) - src0.swizzle = SWIZZLE_XXXX; - inst = v->emit(NULL, TGSI_OPCODE_KILL_IF, undef_dst, src0); - - /* Now copy the instructions from the original glsl_to_tgsi_visitor into the - * new visitor. */ - foreach_in_list(glsl_to_tgsi_instruction, inst, &original->instructions) { - glsl_to_tgsi_instruction *newinst; - st_src_reg src_regs[3]; - - if (inst->dst.file == PROGRAM_OUTPUT) - prog->OutputsWritten |= BITFIELD64_BIT(inst->dst.index); - - for (int i=0; i<3; i++) { - src_regs[i] = inst->src[i]; - if (src_regs[i].file == PROGRAM_INPUT) - prog->InputsRead |= BITFIELD64_BIT(src_regs[i].index); - } - - newinst = v->emit(NULL, inst->op, inst->dst, src_regs[0], src_regs[1], src_regs[2]); - newinst->tex_target = inst->tex_target; - newinst->sampler_array_size = inst->sampler_array_size; - } - - /* Make modifications to fragment program info. */ - prog->Parameters = _mesa_clone_parameter_list(original->prog->Parameters); - count_resources(v, prog); - fp->glsl_to_tgsi = v; + rename_temp_registers(num_renames, renames); + this->next_temp = new_index; + ralloc_free(renames); + ralloc_free(first_reads); } /* ------------------------- TGSI conversion stuff -------------------------- */ @@ -4154,16 +5137,24 @@ struct st_translate { unsigned temps_size; struct ureg_dst *temps; - struct ureg_dst arrays[MAX_ARRAYS]; + struct ureg_dst *arrays; + unsigned num_temp_arrays; struct ureg_src *constants; + int num_constants; struct ureg_src *immediates; + int num_immediates; struct ureg_dst outputs[PIPE_MAX_SHADER_OUTPUTS]; struct ureg_src inputs[PIPE_MAX_SHADER_INPUTS]; struct ureg_dst address[3]; struct ureg_src samplers[PIPE_MAX_SAMPLERS]; + struct ureg_src buffers[PIPE_MAX_SHADER_BUFFERS]; + struct ureg_src images[PIPE_MAX_SHADER_IMAGES]; struct ureg_src systemValues[SYSTEM_VALUE_MAX]; + struct ureg_src shared_memory; struct tgsi_texture_offset tex_offsets[MAX_GLSL_TEXTURE_OFFSET]; - unsigned array_sizes[MAX_ARRAYS]; + unsigned *array_sizes; + struct array_decl *input_arrays; + struct array_decl *output_arrays; const GLuint *inputMapping; const GLuint *outputMapping; @@ -4184,31 +5175,78 @@ struct st_translate { unsigned insn_size; unsigned insn_count; - unsigned procType; /**< TGSI_PROCESSOR_VERTEX/FRAGMENT */ + unsigned procType; /**< PIPE_SHADER_VERTEX/FRAGMENT */ boolean error; }; /** Map Mesa's SYSTEM_VALUE_x to TGSI_SEMANTIC_x */ -const unsigned _mesa_sysval_to_semantic[SYSTEM_VALUE_MAX] = { - /* Vertex shader - */ - TGSI_SEMANTIC_VERTEXID, - TGSI_SEMANTIC_INSTANCEID, - TGSI_SEMANTIC_VERTEXID_NOBASE, - TGSI_SEMANTIC_BASEVERTEX, - - /* Geometry shader - */ - TGSI_SEMANTIC_INVOCATIONID, +unsigned +_mesa_sysval_to_semantic(unsigned sysval) +{ + switch (sysval) { + /* Vertex shader */ + case SYSTEM_VALUE_VERTEX_ID: + return TGSI_SEMANTIC_VERTEXID; + case SYSTEM_VALUE_INSTANCE_ID: + return TGSI_SEMANTIC_INSTANCEID; + case SYSTEM_VALUE_VERTEX_ID_ZERO_BASE: + return TGSI_SEMANTIC_VERTEXID_NOBASE; + case SYSTEM_VALUE_BASE_VERTEX: + return TGSI_SEMANTIC_BASEVERTEX; + case SYSTEM_VALUE_BASE_INSTANCE: + return TGSI_SEMANTIC_BASEINSTANCE; + case SYSTEM_VALUE_DRAW_ID: + return TGSI_SEMANTIC_DRAWID; + + /* Geometry shader */ + case SYSTEM_VALUE_INVOCATION_ID: + return TGSI_SEMANTIC_INVOCATIONID; + + /* Fragment shader */ + case SYSTEM_VALUE_FRAG_COORD: + return TGSI_SEMANTIC_POSITION; + case SYSTEM_VALUE_FRONT_FACE: + return TGSI_SEMANTIC_FACE; + case SYSTEM_VALUE_SAMPLE_ID: + return TGSI_SEMANTIC_SAMPLEID; + case SYSTEM_VALUE_SAMPLE_POS: + return TGSI_SEMANTIC_SAMPLEPOS; + case SYSTEM_VALUE_SAMPLE_MASK_IN: + return TGSI_SEMANTIC_SAMPLEMASK; + case SYSTEM_VALUE_HELPER_INVOCATION: + return TGSI_SEMANTIC_HELPER_INVOCATION; + + /* Tessellation shader */ + case SYSTEM_VALUE_TESS_COORD: + return TGSI_SEMANTIC_TESSCOORD; + case SYSTEM_VALUE_VERTICES_IN: + return TGSI_SEMANTIC_VERTICESIN; + case SYSTEM_VALUE_PRIMITIVE_ID: + return TGSI_SEMANTIC_PRIMID; + case SYSTEM_VALUE_TESS_LEVEL_OUTER: + return TGSI_SEMANTIC_TESSOUTER; + case SYSTEM_VALUE_TESS_LEVEL_INNER: + return TGSI_SEMANTIC_TESSINNER; + + /* Compute shader */ + case SYSTEM_VALUE_LOCAL_INVOCATION_ID: + return TGSI_SEMANTIC_THREAD_ID; + case SYSTEM_VALUE_WORK_GROUP_ID: + return TGSI_SEMANTIC_BLOCK_ID; + case SYSTEM_VALUE_NUM_WORK_GROUPS: + return TGSI_SEMANTIC_GRID_SIZE; + + /* Unhandled */ + case SYSTEM_VALUE_LOCAL_INVOCATION_INDEX: + case SYSTEM_VALUE_GLOBAL_INVOCATION_ID: + case SYSTEM_VALUE_VERTEX_CNT: + default: + assert(!"Unexpected SYSTEM_VALUE_ enum"); + return TGSI_SEMANTIC_COUNT; + } +} - /* Fragment shader - */ - TGSI_SEMANTIC_FACE, - TGSI_SEMANTIC_SAMPLEID, - TGSI_SEMANTIC_SAMPLEPOS, - TGSI_SEMANTIC_SAMPLEMASK, -}; /** * Make note of a branch to a label in the TGSI code. @@ -4222,7 +5260,7 @@ static unsigned *get_label(struct st_translate *t, unsigned branch_target) if (t->labels_count + 1 >= t->labels_size) { t->labels_size = 1 << (util_logbase2(t->labels_size) + 1); - t->labels = (struct label *)realloc(t->labels, + t->labels = (struct label *)realloc(t->labels, t->labels_size * sizeof(struct label)); if (t->labels == NULL) { static unsigned dummy; @@ -4270,6 +5308,8 @@ emit_immediate(struct st_translate *t, { case GL_FLOAT: return ureg_DECL_immediate(ureg, &values[0].f, size); + case GL_DOUBLE: + return ureg_DECL_immediate_f64(ureg, (double *)&values[0].f, size); case GL_INT: return ureg_DECL_immediate_int(ureg, &values[0].i, size); case GL_UNSIGNED_INT: @@ -4285,9 +5325,8 @@ emit_immediate(struct st_translate *t, * Map a glsl_to_tgsi dst register to a TGSI ureg_dst register. */ static struct ureg_dst -dst_register(struct st_translate *t, - gl_register_file file, - GLuint index) +dst_register(struct st_translate *t, gl_register_file file, unsigned index, + unsigned array_id) { unsigned array; @@ -4298,7 +5337,7 @@ dst_register(struct st_translate *t, case PROGRAM_TEMPORARY: /* Allocate space for temporaries on demand. */ if (index >= t->temps_size) { - const int inc = 4096; + const int inc = align(index - t->temps_size + 1, 4096); t->temps = (struct ureg_dst*) realloc(t->temps, @@ -4318,7 +5357,7 @@ dst_register(struct st_translate *t, case PROGRAM_ARRAY: array = index >> 16; - assert(array < Elements(t->arrays)); + assert(array < t->num_temp_arrays); if (ureg_dst_is_undef(t->arrays[array])) t->arrays[array] = ureg_DECL_array_temporary( @@ -4328,16 +5367,28 @@ dst_register(struct st_translate *t, (int)(index & 0xFFFF) - 0x8000); case PROGRAM_OUTPUT: - if (t->procType == TGSI_PROCESSOR_VERTEX) - assert(index < VARYING_SLOT_MAX); - else if (t->procType == TGSI_PROCESSOR_FRAGMENT) - assert(index < FRAG_RESULT_MAX); - else - assert(index < VARYING_SLOT_MAX); + if (!array_id) { + if (t->procType == PIPE_SHADER_FRAGMENT) + assert(index < FRAG_RESULT_MAX); + else if (t->procType == PIPE_SHADER_TESS_CTRL || + t->procType == PIPE_SHADER_TESS_EVAL) + assert(index < VARYING_SLOT_TESS_MAX); + else + assert(index < VARYING_SLOT_MAX); - assert(t->outputMapping[index] < Elements(t->outputs)); + assert(t->outputMapping[index] < ARRAY_SIZE(t->outputs)); + assert(t->outputs[t->outputMapping[index]].File != TGSI_FILE_NULL); + return t->outputs[t->outputMapping[index]]; + } + else { + struct array_decl *decl = &t->output_arrays[array_id-1]; + unsigned mesa_index = decl->mesa_index; + int slot = t->outputMapping[mesa_index]; - return t->outputs[t->outputMapping[index]]; + assert(slot != -1 && t->outputs[slot].File == TGSI_FILE_OUTPUT); + assert(t->outputs[slot].ArrayID == array_id); + return ureg_dst_array_offset(t->outputs[slot], index - mesa_index); + } case PROGRAM_ADDRESS: return t->address[index]; @@ -4352,44 +5403,61 @@ dst_register(struct st_translate *t, * Map a glsl_to_tgsi src register to a TGSI ureg_src register. */ static struct ureg_src -src_register(struct st_translate *t, const struct st_src_reg *reg) +src_register(struct st_translate *t, const st_src_reg *reg) { + int index = reg->index; + int double_reg2 = reg->double_reg2 ? 1 : 0; + switch(reg->file) { case PROGRAM_UNDEFINED: - return ureg_src_undef(); + return ureg_imm4f(t->ureg, 0, 0, 0, 0); case PROGRAM_TEMPORARY: case PROGRAM_ARRAY: - return ureg_src(dst_register(t, reg->file, reg->index)); + case PROGRAM_OUTPUT: + return ureg_src(dst_register(t, reg->file, reg->index, reg->array_id)); case PROGRAM_UNIFORM: assert(reg->index >= 0); - return t->constants[reg->index]; + return reg->index < t->num_constants ? + t->constants[reg->index] : ureg_imm4f(t->ureg, 0, 0, 0, 0); case PROGRAM_STATE_VAR: case PROGRAM_CONSTANT: /* ie, immediate */ if (reg->has_index2) return ureg_src_register(TGSI_FILE_CONSTANT, reg->index); - else if (reg->index < 0) - return ureg_DECL_constant(t->ureg, 0); else - return t->constants[reg->index]; + return reg->index >= 0 && reg->index < t->num_constants ? + t->constants[reg->index] : ureg_imm4f(t->ureg, 0, 0, 0, 0); case PROGRAM_IMMEDIATE: + assert(reg->index >= 0 && reg->index < t->num_immediates); return t->immediates[reg->index]; case PROGRAM_INPUT: - assert(t->inputMapping[reg->index] < Elements(t->inputs)); - return t->inputs[t->inputMapping[reg->index]]; + /* GLSL inputs are 64-bit containers, so we have to + * map back to the original index and add the offset after + * mapping. */ + index -= double_reg2; + if (!reg->array_id) { + assert(t->inputMapping[index] < ARRAY_SIZE(t->inputs)); + assert(t->inputs[t->inputMapping[index]].File != TGSI_FILE_NULL); + return t->inputs[t->inputMapping[index] + double_reg2]; + } + else { + struct array_decl *decl = &t->input_arrays[reg->array_id-1]; + unsigned mesa_index = decl->mesa_index; + int slot = t->inputMapping[mesa_index]; - case PROGRAM_OUTPUT: - assert(t->outputMapping[reg->index] < Elements(t->outputs)); - return ureg_src(t->outputs[t->outputMapping[reg->index]]); /* not needed? */ + assert(slot != -1 && t->inputs[slot].File == TGSI_FILE_INPUT); + assert(t->inputs[slot].ArrayID == reg->array_id); + return ureg_src_array_offset(t->inputs[slot], index + double_reg2 - mesa_index); + } case PROGRAM_ADDRESS: return ureg_src(t->address[reg->index]); case PROGRAM_SYSTEM_VALUE: - assert(reg->index < (int) Elements(t->systemValues)); + assert(reg->index < (int) ARRAY_SIZE(t->systemValues)); return t->systemValues[reg->index]; default: @@ -4404,44 +5472,32 @@ src_register(struct st_translate *t, const struct st_src_reg *reg) static struct ureg_dst translate_dst(struct st_translate *t, const st_dst_reg *dst_reg, - bool saturate, bool clamp_color) + bool saturate) { - struct ureg_dst dst = dst_register(t, - dst_reg->file, - dst_reg->index); + struct ureg_dst dst = dst_register(t, dst_reg->file, dst_reg->index, + dst_reg->array_id); + + if (dst.File == TGSI_FILE_NULL) + return dst; dst = ureg_writemask(dst, dst_reg->writemask); - + if (saturate) dst = ureg_saturate(dst); - else if (clamp_color && dst_reg->file == PROGRAM_OUTPUT) { - /* Clamp colors for ARB_color_buffer_float. */ - switch (t->procType) { - case TGSI_PROCESSOR_VERTEX: - /* XXX if the geometry shader is present, this must be done there - * instead of here. */ - if (dst_reg->index == VARYING_SLOT_COL0 || - dst_reg->index == VARYING_SLOT_COL1 || - dst_reg->index == VARYING_SLOT_BFC0 || - dst_reg->index == VARYING_SLOT_BFC1) { - dst = ureg_saturate(dst); - } - break; - - case TGSI_PROCESSOR_FRAGMENT: - if (dst_reg->index == FRAG_RESULT_COLOR || - dst_reg->index >= FRAG_RESULT_DATA0) { - dst = ureg_saturate(dst); - } - break; - } - } if (dst_reg->reladdr != NULL) { assert(dst_reg->file != PROGRAM_TEMPORARY); dst = ureg_dst_indirect(dst, ureg_src(t->address[0])); } + if (dst_reg->has_index2) { + if (dst_reg->reladdr2) + dst = ureg_dst_dimension_indirect(dst, ureg_src(t->address[1]), + dst_reg->index2D); + else + dst = ureg_dst_dimension(dst, dst_reg->index2D); + } + return dst; } @@ -4492,6 +5548,7 @@ translate_tex_offset(struct st_translate *t, switch (in_offset->file) { case PROGRAM_IMMEDIATE: + assert(in_offset->index >= 0 && in_offset->index < t->num_immediates); imm_src = t->immediates[in_offset->index]; offset.File = imm_src.File; @@ -4501,6 +5558,15 @@ translate_tex_offset(struct st_translate *t, offset.SwizzleZ = imm_src.SwizzleZ; offset.Padding = 0; break; + case PROGRAM_INPUT: + imm_src = t->inputs[t->inputMapping[in_offset->index]]; + offset.File = imm_src.File; + offset.Index = imm_src.Index; + offset.SwizzleX = GET_SWZ(in_offset->swizzle, 0); + offset.SwizzleY = GET_SWZ(in_offset->swizzle, 1); + offset.SwizzleZ = GET_SWZ(in_offset->swizzle, 2); + offset.Padding = 0; + break; case PROGRAM_TEMPORARY: imm_src = ureg_src(t->temps[in_offset->index]); offset.File = imm_src.File; @@ -4514,7 +5580,7 @@ translate_tex_offset(struct st_translate *t, array = in_offset->index >> 16; assert(array >= 0); - assert(array < (int) Elements(t->arrays)); + assert(array < (int)t->num_temp_arrays); dst = t->arrays[array]; offset.File = dst.File; @@ -4532,32 +5598,28 @@ translate_tex_offset(struct st_translate *t, static void compile_tgsi_instruction(struct st_translate *t, - const glsl_to_tgsi_instruction *inst, - bool clamp_dst_color_output) + const glsl_to_tgsi_instruction *inst) { struct ureg_program *ureg = t->ureg; - GLuint i; - struct ureg_dst dst[1]; + int i; + struct ureg_dst dst[2]; struct ureg_src src[4]; struct tgsi_texture_offset texoffsets[MAX_GLSL_TEXTURE_OFFSET]; - unsigned num_dst; - unsigned num_src; - unsigned tex_target; + int num_dst; + int num_src; + unsigned tex_target = 0; - num_dst = num_inst_dst_regs(inst->op); - num_src = num_inst_src_regs(inst->op); + num_dst = num_inst_dst_regs(inst); + num_src = num_inst_src_regs(inst); - if (num_dst) - dst[0] = translate_dst(t, - &inst->dst, - inst->saturate, - clamp_dst_color_output); + for (i = 0; i < num_dst; i++) + dst[i] = translate_dst(t, + &inst->dst[i], + inst->saturate); - for (i = 0; i < num_src; i++) { - assert(inst->src[i].file != PROGRAM_UNDEFINED); + for (i = 0; i < num_src; i++) src[i] = translate_src(t, &inst->src[i]); - } switch(inst->op) { case TGSI_OPCODE_BGNLOOP: @@ -4570,7 +5632,7 @@ compile_tgsi_instruction(struct st_translate *t, ureg_label_insn(ureg, inst->op, src, num_src, - get_label(t, + get_label(t, inst->op == TGSI_OPCODE_CAL ? inst->function->sig_id : 0)); return; @@ -4580,6 +5642,7 @@ compile_tgsi_instruction(struct st_translate *t, case TGSI_OPCODE_TXL: case TGSI_OPCODE_TXP: case TGSI_OPCODE_TXQ: + case TGSI_OPCODE_TXQS: case TGSI_OPCODE_TXF: case TGSI_OPCODE_TEX2: case TGSI_OPCODE_TXB2: @@ -4592,7 +5655,7 @@ compile_tgsi_instruction(struct st_translate *t, src[num_src] = ureg_src_indirect(src[num_src], ureg_src(t->address[2])); num_src++; - for (i = 0; i < inst->tex_offset_num_offset; i++) { + for (i = 0; i < (int)inst->tex_offset_num_offset; i++) { texoffsets[i] = translate_tex_offset(t, &inst->tex_offsets[i], i); } tex_target = st_translate_texture_target(inst->tex_target, inst->tex_shadow); @@ -4605,6 +5668,55 @@ compile_tgsi_instruction(struct st_translate *t, src, num_src); return; + case TGSI_OPCODE_RESQ: + case TGSI_OPCODE_LOAD: + case TGSI_OPCODE_ATOMUADD: + case TGSI_OPCODE_ATOMXCHG: + case TGSI_OPCODE_ATOMCAS: + case TGSI_OPCODE_ATOMAND: + case TGSI_OPCODE_ATOMOR: + case TGSI_OPCODE_ATOMXOR: + case TGSI_OPCODE_ATOMUMIN: + case TGSI_OPCODE_ATOMUMAX: + case TGSI_OPCODE_ATOMIMIN: + case TGSI_OPCODE_ATOMIMAX: + for (i = num_src - 1; i >= 0; i--) + src[i + 1] = src[i]; + num_src++; + if (inst->buffer.file == PROGRAM_MEMORY) { + src[0] = t->shared_memory; + } else if (inst->buffer.file == PROGRAM_BUFFER) { + src[0] = t->buffers[inst->buffer.index]; + } else { + src[0] = t->images[inst->buffer.index]; + tex_target = st_translate_texture_target(inst->tex_target, inst->tex_shadow); + } + if (inst->buffer.reladdr) + src[0] = ureg_src_indirect(src[0], ureg_src(t->address[2])); + assert(src[0].File != TGSI_FILE_NULL); + ureg_memory_insn(ureg, inst->op, dst, num_dst, src, num_src, + inst->buffer_access, + tex_target, inst->image_format); + break; + + case TGSI_OPCODE_STORE: + if (inst->buffer.file == PROGRAM_MEMORY) { + dst[0] = ureg_dst(t->shared_memory); + } else if (inst->buffer.file == PROGRAM_BUFFER) { + dst[0] = ureg_dst(t->buffers[inst->buffer.index]); + } else { + dst[0] = ureg_dst(t->images[inst->buffer.index]); + tex_target = st_translate_texture_target(inst->tex_target, inst->tex_shadow); + } + dst[0] = ureg_writemask(dst[0], inst->dst[0].writemask); + if (inst->buffer.reladdr) + dst[0] = ureg_dst_indirect(dst[0], ureg_src(t->address[2])); + assert(dst[0].File != TGSI_FILE_NULL); + ureg_memory_insn(ureg, inst->op, dst, num_dst, src, num_src, + inst->buffer_access, + tex_target, inst->image_format); + break; + case TGSI_OPCODE_SCS: dst[0] = ureg_writemask(dst[0], TGSI_WRITEMASK_XY); ureg_insn(ureg, inst->op, dst, num_dst, src, num_src); @@ -4625,31 +5737,27 @@ compile_tgsi_instruction(struct st_translate *t, * a FBO is bound (STATE_FB_WPOS_Y_TRANSFORM). */ static void -emit_wpos_adjustment( struct st_translate *t, - const struct gl_program *program, - boolean invert, - GLfloat adjX, GLfloat adjY[2]) +emit_wpos_adjustment(struct gl_context *ctx, + struct st_translate *t, + int wpos_transform_const, + boolean invert, + GLfloat adjX, GLfloat adjY[2]) { struct ureg_program *ureg = t->ureg; + assert(wpos_transform_const >= 0); + /* Fragment program uses fragment position input. * Need to replace instances of INPUT[WPOS] with temp T - * where T = INPUT[WPOS] by y is inverted. - */ - static const gl_state_index wposTransformState[STATE_LENGTH] - = { STATE_INTERNAL, STATE_FB_WPOS_Y_TRANSFORM, - (gl_state_index)0, (gl_state_index)0, (gl_state_index)0 }; - - /* XXX: note we are modifying the incoming shader here! Need to - * do this before emitting the constant decls below, or this - * will be missed: + * where T = INPUT[WPOS] is inverted by Y. */ - unsigned wposTransConst = _mesa_add_state_reference(program->Parameters, - wposTransformState); - - struct ureg_src wpostrans = ureg_DECL_constant( ureg, wposTransConst ); + struct ureg_src wpostrans = ureg_DECL_constant(ureg, wpos_transform_const); struct ureg_dst wpos_temp = ureg_DECL_temporary( ureg ); - struct ureg_src wpos_input = t->inputs[t->inputMapping[VARYING_SLOT_POS]]; + struct ureg_src *wpos = + ctx->Const.GLSLFragCoordIsSysVal ? + &t->systemValues[SYSTEM_VALUE_FRAG_COORD] : + &t->inputs[t->inputMapping[VARYING_SLOT_POS]]; + struct ureg_src wpos_input = *wpos; /* First, apply the coordinate shift: */ if (adjX || adjY[0] || adjY[1]) { @@ -4700,7 +5808,7 @@ emit_wpos_adjustment( struct st_translate *t, /* Use wpos_temp as position input from here on: */ - t->inputs[t->inputMapping[VARYING_SLOT_POS]] = ureg_src(wpos_temp); + *wpos = ureg_src(wpos_temp); } @@ -4711,7 +5819,8 @@ static void emit_wpos(struct st_context *st, struct st_translate *t, const struct gl_program *program, - struct ureg_program *ureg) + struct ureg_program *ureg, + int wpos_transform_const) { const struct gl_fragment_program *fp = (const struct gl_fragment_program *) program; @@ -4725,7 +5834,7 @@ emit_wpos(struct st_context *st, * * The bias of the y-coordinate depends on whether y-inversion takes place * (adjY[1]) or not (adjY[0]), which is in turn dependent on whether we are - * drawing to an FBO (causes additional inversion), and whether the the pipe + * drawing to an FBO (causes additional inversion), and whether the pipe * driver origin and the requested origin differ (the latter condition is * stored in the 'invert' variable). * @@ -4773,7 +5882,7 @@ emit_wpos(struct st_context *st, else assert(0); } - + if (fp->PixelCenterInteger) { /* Fragment shader wants pixel center integer */ if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER)) { @@ -4808,7 +5917,7 @@ emit_wpos(struct st_context *st, /* we invert after adjustment so that we avoid the MOV to temporary, * and reuse the adjustment ADD instead */ - emit_wpos_adjustment(t, program, invert, adjX, adjY); + emit_wpos_adjustment(st->ctx, t, wpos_transform_const, invert, adjX, adjY); } /** @@ -4836,14 +5945,37 @@ emit_face_var(struct gl_context *ctx, struct st_translate *t) t->inputs[t->inputMapping[VARYING_SLOT_FACE]] = ureg_src(face_temp); } -static void -emit_edgeflags(struct st_translate *t) +static bool +find_array(unsigned attr, struct array_decl *arrays, unsigned count, + unsigned *array_id, unsigned *array_size) { - struct ureg_program *ureg = t->ureg; - struct ureg_dst edge_dst = t->outputs[t->outputMapping[VARYING_SLOT_EDGE]]; - struct ureg_src edge_src = t->inputs[t->inputMapping[VERT_ATTRIB_EDGEFLAG]]; + unsigned i; + + for (i = 0; i < count; i++) { + struct array_decl *decl = &arrays[i]; + + if (attr == decl->mesa_index) { + *array_id = decl->array_id; + *array_size = decl->array_size; + assert(*array_size); + return true; + } + } + return false; +} - ureg_MOV(ureg, edge_dst, edge_src); +static void +emit_compute_block_size(const struct gl_program *program, + struct ureg_program *ureg) { + const struct gl_compute_program *cp = + (const struct gl_compute_program *)program; + + ureg_property(ureg, TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH, + cp->LocalSize[0]); + ureg_property(ureg, TGSI_PROPERTY_CS_FIXED_BLOCK_HEIGHT, + cp->LocalSize[1]); + ureg_property(ureg, TGSI_PROPERTY_CS_FIXED_BLOCK_DEPTH, + cp->LocalSize[2]); } /** @@ -4875,42 +6007,25 @@ st_translate_program( const struct gl_program *proginfo, GLuint numInputs, const GLuint inputMapping[], + const GLuint inputSlotToAttr[], const ubyte inputSemanticName[], const ubyte inputSemanticIndex[], const GLuint interpMode[], const GLuint interpLocation[], GLuint numOutputs, const GLuint outputMapping[], + const GLuint outputSlotToAttr[], const ubyte outputSemanticName[], - const ubyte outputSemanticIndex[], - boolean passthrough_edgeflags, - boolean clamp_color) + const ubyte outputSemanticIndex[]) { struct st_translate *t; unsigned i; + struct gl_program_constants *frag_const = + &ctx->Const.Program[MESA_SHADER_FRAGMENT]; enum pipe_error ret = PIPE_OK; - assert(numInputs <= Elements(t->inputs)); - assert(numOutputs <= Elements(t->outputs)); - - assert(_mesa_sysval_to_semantic[SYSTEM_VALUE_FRONT_FACE] == - TGSI_SEMANTIC_FACE); - assert(_mesa_sysval_to_semantic[SYSTEM_VALUE_VERTEX_ID] == - TGSI_SEMANTIC_VERTEXID); - assert(_mesa_sysval_to_semantic[SYSTEM_VALUE_INSTANCE_ID] == - TGSI_SEMANTIC_INSTANCEID); - assert(_mesa_sysval_to_semantic[SYSTEM_VALUE_SAMPLE_ID] == - TGSI_SEMANTIC_SAMPLEID); - assert(_mesa_sysval_to_semantic[SYSTEM_VALUE_SAMPLE_POS] == - TGSI_SEMANTIC_SAMPLEPOS); - assert(_mesa_sysval_to_semantic[SYSTEM_VALUE_SAMPLE_MASK_IN] == - TGSI_SEMANTIC_SAMPLEMASK); - assert(_mesa_sysval_to_semantic[SYSTEM_VALUE_INVOCATION_ID] == - TGSI_SEMANTIC_INVOCATIONID); - assert(_mesa_sysval_to_semantic[SYSTEM_VALUE_VERTEX_ID_ZERO_BASE] == - TGSI_SEMANTIC_VERTEXID_NOBASE); - assert(_mesa_sysval_to_semantic[SYSTEM_VALUE_BASE_VERTEX] == - TGSI_SEMANTIC_BASEVERTEX); + assert(numInputs <= ARRAY_SIZE(t->inputs)); + assert(numOutputs <= ARRAY_SIZE(t->outputs)); t = CALLOC_STRUCT(st_translate); if (!t) { @@ -4918,47 +6033,120 @@ st_translate_program( goto out; } - memset(t, 0, sizeof *t); - t->procType = procType; t->inputMapping = inputMapping; t->outputMapping = outputMapping; t->ureg = ureg; + t->num_temp_arrays = program->next_array; + if (t->num_temp_arrays) + t->arrays = (struct ureg_dst*) + calloc(1, sizeof(t->arrays[0]) * t->num_temp_arrays); - if (program->shader_program) { - for (i = 0; i < program->shader_program->NumUserUniformStorage; i++) { - struct gl_uniform_storage *const storage = - &program->shader_program->UniformStorage[i]; - - _mesa_uniform_detach_all_driver_storage(storage); + /* + * Declare input attributes. + */ + switch (procType) { + case PIPE_SHADER_FRAGMENT: + for (i = 0; i < numInputs; i++) { + unsigned array_id = 0; + unsigned array_size; + + if (find_array(inputSlotToAttr[i], program->input_arrays, + program->num_input_arrays, &array_id, &array_size)) { + /* We've found an array. Declare it so. */ + t->inputs[i] = ureg_DECL_fs_input_cyl_centroid(ureg, + inputSemanticName[i], inputSemanticIndex[i], + interpMode[i], 0, interpLocation[i], + array_id, array_size); + i += array_size - 1; + } + else { + t->inputs[i] = ureg_DECL_fs_input_cyl_centroid(ureg, + inputSemanticName[i], inputSemanticIndex[i], + interpMode[i], 0, interpLocation[i], 0, 1); + } + } + break; + case PIPE_SHADER_GEOMETRY: + case PIPE_SHADER_TESS_EVAL: + case PIPE_SHADER_TESS_CTRL: + for (i = 0; i < numInputs; i++) { + unsigned array_id = 0; + unsigned array_size; + + if (find_array(inputSlotToAttr[i], program->input_arrays, + program->num_input_arrays, &array_id, &array_size)) { + /* We've found an array. Declare it so. */ + t->inputs[i] = ureg_DECL_input(ureg, inputSemanticName[i], + inputSemanticIndex[i], + array_id, array_size); + i += array_size - 1; + } + else { + t->inputs[i] = ureg_DECL_input(ureg, inputSemanticName[i], + inputSemanticIndex[i], 0, 1); + } + } + break; + case PIPE_SHADER_VERTEX: + for (i = 0; i < numInputs; i++) { + t->inputs[i] = ureg_DECL_vs_input(ureg, i); } + break; + case PIPE_SHADER_COMPUTE: + break; + default: + assert(0); } /* - * Declare input attributes. + * Declare output attributes. */ - if (procType == TGSI_PROCESSOR_FRAGMENT) { - for (i = 0; i < numInputs; i++) { - t->inputs[i] = ureg_DECL_fs_input_cyl_centroid(ureg, - inputSemanticName[i], - inputSemanticIndex[i], - interpMode[i], 0, - interpLocation[i]); + switch (procType) { + case PIPE_SHADER_FRAGMENT: + case PIPE_SHADER_COMPUTE: + break; + case PIPE_SHADER_GEOMETRY: + case PIPE_SHADER_TESS_EVAL: + case PIPE_SHADER_TESS_CTRL: + case PIPE_SHADER_VERTEX: + for (i = 0; i < numOutputs; i++) { + unsigned array_id = 0; + unsigned array_size; + + if (find_array(outputSlotToAttr[i], program->output_arrays, + program->num_output_arrays, &array_id, &array_size)) { + /* We've found an array. Declare it so. */ + t->outputs[i] = ureg_DECL_output_array(ureg, + outputSemanticName[i], + outputSemanticIndex[i], + array_id, array_size); + i += array_size - 1; + } + else { + t->outputs[i] = ureg_DECL_output(ureg, + outputSemanticName[i], + outputSemanticIndex[i]); + } } + break; + default: + assert(0); + } + + if (procType == PIPE_SHADER_FRAGMENT) { + if (program->shader->info.EarlyFragmentTests) + ureg_property(ureg, TGSI_PROPERTY_FS_EARLY_DEPTH_STENCIL, 1); if (proginfo->InputsRead & VARYING_BIT_POS) { - /* Must do this after setting up t->inputs, and before - * emitting constant references, below: - */ - emit_wpos(st_context(ctx), t, proginfo, ureg); + /* Must do this after setting up t->inputs. */ + emit_wpos(st_context(ctx), t, proginfo, ureg, + program->wpos_transform_const); } if (proginfo->InputsRead & VARYING_BIT_FACE) emit_face_var(ctx, t); - /* - * Declare output attributes. - */ for (i = 0; i < numOutputs; i++) { switch (outputSemanticName[i]) { case TGSI_SEMANTIC_POSITION: @@ -4994,41 +6182,20 @@ st_translate_program( } } } - else if (procType == TGSI_PROCESSOR_GEOMETRY) { - for (i = 0; i < numInputs; i++) { - t->inputs[i] = ureg_DECL_gs_input(ureg, - i, - inputSemanticName[i], - inputSemanticIndex[i]); - } - - for (i = 0; i < numOutputs; i++) { - t->outputs[i] = ureg_DECL_output(ureg, - outputSemanticName[i], - outputSemanticIndex[i]); - } - } - else { - assert(procType == TGSI_PROCESSOR_VERTEX); - - for (i = 0; i < numInputs; i++) { - t->inputs[i] = ureg_DECL_vs_input(ureg, i); - } - + else if (procType == PIPE_SHADER_VERTEX) { for (i = 0; i < numOutputs; i++) { - t->outputs[i] = ureg_DECL_output(ureg, - outputSemanticName[i], - outputSemanticIndex[i]); if (outputSemanticName[i] == TGSI_SEMANTIC_FOG) { /* force register to contain a fog coordinate in the form (F, 0, 0, 1). */ ureg_MOV(ureg, ureg_writemask(t->outputs[i], TGSI_WRITEMASK_YZW), ureg_imm4f(ureg, 0.0f, 0.0f, 0.0f, 1.0f)); t->outputs[i] = ureg_writemask(t->outputs[i], TGSI_WRITEMASK_X); - } + } } - if (passthrough_edgeflags) - emit_edgeflags(t); + } + + if (procType == PIPE_SHADER_COMPUTE) { + emit_compute_block_size(proginfo, ureg); } /* Declare address register. @@ -5043,11 +6210,13 @@ st_translate_program( */ { GLbitfield sysInputs = proginfo->SystemValuesRead; - unsigned numSys = 0; + for (i = 0; sysInputs; i++) { if (sysInputs & (1 << i)) { - unsigned semName = _mesa_sysval_to_semantic[i]; - t->systemValues[i] = ureg_DECL_system_value(ureg, numSys, semName, 0); + unsigned semName = _mesa_sysval_to_semantic(i); + + t->systemValues[i] = ureg_DECL_system_value(ureg, semName, 0); + if (semName == TGSI_SEMANTIC_INSTANCEID || semName == TGSI_SEMANTIC_VERTEXID) { /* From Gallium perspective, these system values are always @@ -5059,25 +6228,31 @@ st_translate_program( */ struct st_context *st = st_context(ctx); struct pipe_screen *pscreen = st->pipe->screen; - assert(procType == TGSI_PROCESSOR_VERTEX); + assert(procType == PIPE_SHADER_VERTEX); assert(pscreen->get_shader_param(pscreen, PIPE_SHADER_VERTEX, PIPE_SHADER_CAP_INTEGERS)); + (void) pscreen; if (!ctx->Const.NativeIntegers) { struct ureg_dst temp = ureg_DECL_local_temporary(t->ureg); ureg_U2F( t->ureg, ureg_writemask(temp, TGSI_WRITEMASK_X), t->systemValues[i]); t->systemValues[i] = ureg_scalar(ureg_src(temp), 0); } } - numSys++; + + if (procType == PIPE_SHADER_FRAGMENT && + semName == TGSI_SEMANTIC_POSITION) + emit_wpos(st_context(ctx), t, proginfo, ureg, + program->wpos_transform_const); + sysInputs &= ~(1 << i); } } } - /* Copy over array sizes - */ - memcpy(t->array_sizes, program->array_sizes, sizeof(unsigned) * program->next_array); + t->array_sizes = program->array_sizes; + t->input_arrays = program->input_arrays; + t->output_arrays = program->output_arrays; - /* Emit constants and uniforms. TGSI uses a single index space for these, + /* Emit constants and uniforms. TGSI uses a single index space for these, * so we put all the translated regs in t->constants. */ if (proginfo->Parameters) { @@ -5087,6 +6262,7 @@ st_translate_program( ret = PIPE_ERROR_OUT_OF_MEMORY; goto out; } + t->num_constants = proginfo->Parameters->NumParameters; for (i = 0; i < proginfo->Parameters->NumParameters; i++) { switch (proginfo->Parameters->Parameters[i].Type) { @@ -5120,7 +6296,7 @@ st_translate_program( unsigned num_ubos = program->shader->NumUniformBlocks; for (i = 0; i < num_ubos; i++) { - unsigned size = program->shader->UniformBlocks[i].UniformBufferSize; + unsigned size = program->shader->UniformBlocks[i]->UniformBufferSize; unsigned num_const_vecs = (size + 15) / 16; unsigned first, last; assert(num_const_vecs > 0); @@ -5129,7 +6305,7 @@ st_translate_program( ureg_DECL_constant2D(t->ureg, first, last, i + 1); } } - + /* Emit immediate values. */ t->immediates = (struct ureg_src *) @@ -5138,17 +6314,63 @@ st_translate_program( ret = PIPE_ERROR_OUT_OF_MEMORY; goto out; } + t->num_immediates = program->num_immediates; + i = 0; foreach_in_list(immediate_storage, imm, &program->immediates) { assert(i < program->num_immediates); - t->immediates[i++] = emit_immediate(t, imm->values, imm->type, imm->size); + t->immediates[i++] = emit_immediate(t, imm->values, imm->type, imm->size32); } assert(i == program->num_immediates); /* texture samplers */ - for (i = 0; i < ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxTextureImageUnits; i++) { - if (program->samplers_used & (1 << i)) { + for (i = 0; i < frag_const->MaxTextureImageUnits; i++) { + if (program->samplers_used & (1u << i)) { + unsigned type; + t->samplers[i] = ureg_DECL_sampler(ureg, i); + + switch (program->sampler_types[i]) { + case GLSL_TYPE_INT: + type = TGSI_RETURN_TYPE_SINT; + break; + case GLSL_TYPE_UINT: + type = TGSI_RETURN_TYPE_UINT; + break; + case GLSL_TYPE_FLOAT: + type = TGSI_RETURN_TYPE_FLOAT; + break; + default: + unreachable("not reached"); + } + + ureg_DECL_sampler_view( ureg, i, program->sampler_targets[i], + type, type, type, type ); + } + } + + for (i = 0; i < frag_const->MaxAtomicBuffers; i++) { + if (program->buffers_used & (1 << i)) { + t->buffers[i] = ureg_DECL_buffer(ureg, i, true); + } + } + + for (; i < frag_const->MaxAtomicBuffers + frag_const->MaxShaderStorageBlocks; + i++) { + if (program->buffers_used & (1 << i)) { + t->buffers[i] = ureg_DECL_buffer(ureg, i, false); + } + } + + if (program->use_shared_memory) + t->shared_memory = ureg_DECL_memory(ureg, TGSI_MEMORY_TYPE_SHARED); + + for (i = 0; i < program->shader->NumImages; i++) { + if (program->images_used & (1 << i)) { + t->images[i] = ureg_DECL_image(ureg, i, + program->image_targets[i], + program->image_formats[i], + true, false); } } @@ -5156,7 +6378,7 @@ st_translate_program( */ foreach_in_list(glsl_to_tgsi_instruction, inst, &program->instructions) { set_insn_start(t, ureg_get_instruction_number(ureg)); - compile_tgsi_instruction(t, inst, clamp_color); + compile_tgsi_instruction(t, inst); } /* Fix up all emitted labels: @@ -5166,33 +6388,58 @@ st_translate_program( t->insn[t->labels[i].branch_target]); } - if (program->shader_program) { - /* This has to be done last. Any operation the can cause - * prog->ParameterValues to get reallocated (e.g., anything that adds a - * program constant) has to happen before creating this linkage. - */ - for (unsigned i = 0; i < MESA_SHADER_STAGES; i++) { - if (program->shader_program->_LinkedShaders[i] == NULL) - continue; + /* Set the next shader stage hint for VS and TES. */ + switch (procType) { + case PIPE_SHADER_VERTEX: + case PIPE_SHADER_TESS_EVAL: + if (program->shader_program->SeparateShader) + break; + + for (i = program->shader->Stage+1; i <= MESA_SHADER_FRAGMENT; i++) { + if (program->shader_program->_LinkedShaders[i]) { + unsigned next; + + switch (i) { + case MESA_SHADER_TESS_CTRL: + next = PIPE_SHADER_TESS_CTRL; + break; + case MESA_SHADER_TESS_EVAL: + next = PIPE_SHADER_TESS_EVAL; + break; + case MESA_SHADER_GEOMETRY: + next = PIPE_SHADER_GEOMETRY; + break; + case MESA_SHADER_FRAGMENT: + next = PIPE_SHADER_FRAGMENT; + break; + default: + assert(0); + continue; + } - _mesa_associate_uniform_storage(ctx, program->shader_program, - program->shader_program->_LinkedShaders[i]->Program->Parameters); + ureg_set_next_shader_processor(ureg, next); + break; + } } + break; } out: if (t) { + free(t->arrays); free(t->temps); free(t->insn); free(t->labels); free(t->constants); + t->num_constants = 0; free(t->immediates); + t->num_immediates = 0; if (t->error) { - debug_printf("%s: translate error flag set\n", __FUNCTION__); + debug_printf("%s: translate error flag set\n", __func__); } - free(t); + FREE(t); } return ret; @@ -5200,42 +6447,23 @@ out: /* ----------------------------- End TGSI code ------------------------------ */ -static unsigned -shader_stage_to_ptarget(gl_shader_stage stage) -{ - switch (stage) { - case MESA_SHADER_VERTEX: - return PIPE_SHADER_VERTEX; - case MESA_SHADER_FRAGMENT: - return PIPE_SHADER_FRAGMENT; - case MESA_SHADER_GEOMETRY: - return PIPE_SHADER_GEOMETRY; - case MESA_SHADER_COMPUTE: - return PIPE_SHADER_COMPUTE; - } - - assert(!"should not be reached"); - return PIPE_SHADER_VERTEX; -} - - /** - * Convert a shader's GLSL IR into a Mesa gl_program, although without + * Convert a shader's GLSL IR into a Mesa gl_program, although without * generating Mesa IR. */ static struct gl_program * -get_mesa_program(struct gl_context *ctx, - struct gl_shader_program *shader_program, - struct gl_shader *shader) +get_mesa_program_tgsi(struct gl_context *ctx, + struct gl_shader_program *shader_program, + struct gl_linked_shader *shader) { glsl_to_tgsi_visitor* v; struct gl_program *prog; GLenum target = _mesa_shader_stage_to_program(shader->Stage); bool progress; struct gl_shader_compiler_options *options = - &ctx->Const.ShaderCompilerOptions[_mesa_shader_enum_to_shader_stage(shader->Type)]; + &ctx->Const.ShaderCompilerOptions[shader->Stage]; struct pipe_screen *pscreen = ctx->st->pipe->screen; - unsigned ptarget = shader_stage_to_ptarget(shader->Stage); + unsigned ptarget = st_shader_stage_to_ptarget(shader->Stage); validate_ir_tree(shader->ir); @@ -5254,13 +6482,15 @@ get_mesa_program(struct gl_context *ctx, v->have_sqrt = pscreen->get_shader_param(pscreen, ptarget, PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED); + v->have_fma = pscreen->get_shader_param(pscreen, ptarget, + PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED); _mesa_copy_linked_program_data(shader->Stage, shader_program, prog); _mesa_generate_parameters_list_for_uniforms(shader_program, shader, - prog->Parameters); + prog->Parameters); /* Remove reads from output registers. */ - lower_output_reads(shader->ir); + lower_output_reads(shader->Stage, shader->ir); /* Emit intermediate IR for main(). */ visit_exec_list(shader->ir, v); @@ -5273,7 +6503,7 @@ get_mesa_program(struct gl_context *ctx, if (!entry->bgn_inst) { v->current_function = entry; - entry->bgn_inst = v->emit(NULL, TGSI_OPCODE_BGNSUB); + entry->bgn_inst = v->emit_asm(NULL, TGSI_OPCODE_BGNSUB); entry->bgn_inst->function = entry; visit_exec_list(&entry->sig->body, v); @@ -5281,10 +6511,10 @@ get_mesa_program(struct gl_context *ctx, glsl_to_tgsi_instruction *last; last = (glsl_to_tgsi_instruction *)v->instructions.get_tail(); if (last->op != TGSI_OPCODE_RET) - v->emit(NULL, TGSI_OPCODE_RET); + v->emit_asm(NULL, TGSI_OPCODE_RET); glsl_to_tgsi_instruction *end; - end = v->emit(NULL, TGSI_OPCODE_ENDSUB); + end = v->emit_asm(NULL, TGSI_OPCODE_ENDSUB); end->function = entry; progress = GL_TRUE; @@ -5293,75 +6523,137 @@ get_mesa_program(struct gl_context *ctx, } while (progress); #if 0 - /* Print out some information (for debugging purposes) used by the + /* Print out some information (for debugging purposes) used by the * optimization passes. */ - for (i=0; i < v->next_temp; i++) { - int fr = v->get_first_temp_read(i); - int fw = v->get_first_temp_write(i); - int lr = v->get_last_temp_read(i); - int lw = v->get_last_temp_write(i); - - printf("Temp %d: FR=%3d FW=%3d LR=%3d LW=%3d\n", i, fr, fw, lr, lw); - assert(fw <= fr); + { + int i; + int *first_writes = rzalloc_array(v->mem_ctx, int, v->next_temp); + int *first_reads = rzalloc_array(v->mem_ctx, int, v->next_temp); + int *last_writes = rzalloc_array(v->mem_ctx, int, v->next_temp); + int *last_reads = rzalloc_array(v->mem_ctx, int, v->next_temp); + + for (i = 0; i < v->next_temp; i++) { + first_writes[i] = -1; + first_reads[i] = -1; + last_writes[i] = -1; + last_reads[i] = -1; + } + v->get_first_temp_read(first_reads); + v->get_last_temp_read_first_temp_write(last_reads, first_writes); + v->get_last_temp_write(last_writes); + for (i = 0; i < v->next_temp; i++) + printf("Temp %d: FR=%3d FW=%3d LR=%3d LW=%3d\n", i, first_reads[i], + first_writes[i], + last_reads[i], + last_writes[i]); + ralloc_free(first_writes); + ralloc_free(first_reads); + ralloc_free(last_writes); + ralloc_free(last_reads); } #endif /* Perform optimizations on the instructions in the glsl_to_tgsi_visitor. */ v->simplify_cmp(); - v->copy_propagate(); + + if (shader->Stage != MESA_SHADER_TESS_CTRL && + shader->Stage != MESA_SHADER_TESS_EVAL) + v->copy_propagate(); + while (v->eliminate_dead_code()); + v->merge_two_dsts(); v->merge_registers(); v->renumber_registers(); - + /* Write the END instruction. */ - v->emit(NULL, TGSI_OPCODE_END); + v->emit_asm(NULL, TGSI_OPCODE_END); if (ctx->_Shader->Flags & GLSL_DUMP) { - printf("\n"); - printf("GLSL IR for linked %s program %d:\n", + _mesa_log("\n"); + _mesa_log("GLSL IR for linked %s program %d:\n", _mesa_shader_stage_to_string(shader->Stage), shader_program->Name); - _mesa_print_ir(stdout, shader->ir, NULL); - printf("\n"); - printf("\n"); - fflush(stdout); + _mesa_print_ir(_mesa_get_log_file(), shader->ir, NULL); + _mesa_log("\n\n"); } prog->Instructions = NULL; prog->NumInstructions = 0; do_set_program_inouts(shader->ir, prog, shader->Stage); + shrink_array_declarations(v->input_arrays, v->num_input_arrays, + prog->InputsRead, prog->DoubleInputsRead, prog->PatchInputsRead); + shrink_array_declarations(v->output_arrays, v->num_output_arrays, + prog->OutputsWritten, 0ULL, prog->PatchOutputsWritten); count_resources(v, prog); + /* The GLSL IR won't be needed anymore. */ + ralloc_free(shader->ir); + shader->ir = NULL; + + /* This must be done before the uniform storage is associated. */ + if (shader->Stage == MESA_SHADER_FRAGMENT && + (prog->InputsRead & VARYING_BIT_POS || + prog->SystemValuesRead & (1 << SYSTEM_VALUE_FRAG_COORD))) { + static const gl_state_index wposTransformState[STATE_LENGTH] = { + STATE_INTERNAL, STATE_FB_WPOS_Y_TRANSFORM + }; + + v->wpos_transform_const = _mesa_add_state_reference(prog->Parameters, + wposTransformState); + } + _mesa_reference_program(ctx, &shader->Program, prog); - + + /* Avoid reallocation of the program parameter list, because the uniform + * storage is only associated with the original parameter list. + * This should be enough for Bitmap and DrawPixels constants. + */ + _mesa_reserve_parameter_storage(prog->Parameters, 8); + /* This has to be done last. Any operation the can cause * prog->ParameterValues to get reallocated (e.g., anything that adds a * program constant) has to happen before creating this linkage. */ _mesa_associate_uniform_storage(ctx, shader_program, prog->Parameters); if (!shader_program->LinkStatus) { + free_glsl_to_tgsi_visitor(v); return NULL; } struct st_vertex_program *stvp; struct st_fragment_program *stfp; struct st_geometry_program *stgp; - - switch (shader->Type) { - case GL_VERTEX_SHADER: + struct st_tessctrl_program *sttcp; + struct st_tesseval_program *sttep; + struct st_compute_program *stcp; + + switch (shader->Stage) { + case MESA_SHADER_VERTEX: stvp = (struct st_vertex_program *)prog; stvp->glsl_to_tgsi = v; break; - case GL_FRAGMENT_SHADER: + case MESA_SHADER_FRAGMENT: stfp = (struct st_fragment_program *)prog; stfp->glsl_to_tgsi = v; break; - case GL_GEOMETRY_SHADER: + case MESA_SHADER_GEOMETRY: stgp = (struct st_geometry_program *)prog; stgp->glsl_to_tgsi = v; break; + case MESA_SHADER_TESS_CTRL: + sttcp = (struct st_tessctrl_program *)prog; + sttcp->glsl_to_tgsi = v; + break; + case MESA_SHADER_TESS_EVAL: + sttep = (struct st_tesseval_program *)prog; + sttep->glsl_to_tgsi = v; + break; + case MESA_SHADER_COMPUTE: + stcp = (struct st_compute_program *)prog; + stcp->glsl_to_tgsi = v; + break; default: assert(!"should not be reached"); return NULL; @@ -5370,12 +6662,35 @@ get_mesa_program(struct gl_context *ctx, return prog; } +static struct gl_program * +get_mesa_program(struct gl_context *ctx, + struct gl_shader_program *shader_program, + struct gl_linked_shader *shader) +{ + struct pipe_screen *pscreen = ctx->st->pipe->screen; + unsigned ptarget = st_shader_stage_to_ptarget(shader->Stage); + enum pipe_shader_ir preferred_ir = (enum pipe_shader_ir) + pscreen->get_shader_param(pscreen, ptarget, PIPE_SHADER_CAP_PREFERRED_IR); + if (preferred_ir == PIPE_SHADER_IR_NIR) { + /* TODO only for GLSL VS/FS for now: */ + switch (shader->Stage) { + case MESA_SHADER_VERTEX: + case MESA_SHADER_FRAGMENT: + return st_nir_get_mesa_program(ctx, shader_program, shader); + default: + break; + } + } + return get_mesa_program_tgsi(ctx, shader_program, shader); +} + + extern "C" { /** * Link a shader. * Called via ctx->Driver.LinkShader() - * This actually involves converting GLSL IR into an intermediate TGSI-like IR + * This actually involves converting GLSL IR into an intermediate TGSI-like IR * with code lowering and other optimizations. */ GLboolean @@ -5390,15 +6705,21 @@ st_link_shader(struct gl_context *ctx, struct gl_shader_program *prog) bool progress; exec_list *ir = prog->_LinkedShaders[i]->ir; + gl_shader_stage stage = prog->_LinkedShaders[i]->Stage; const struct gl_shader_compiler_options *options = - &ctx->Const.ShaderCompilerOptions[_mesa_shader_enum_to_shader_stage(prog->_LinkedShaders[i]->Type)]; + &ctx->Const.ShaderCompilerOptions[stage]; + unsigned ptarget = st_shader_stage_to_ptarget(stage); + bool have_dround = pscreen->get_shader_param(pscreen, ptarget, + PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED); + bool have_dfrexp = pscreen->get_shader_param(pscreen, ptarget, + PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED); /* If there are forms of indirect addressing that the driver * cannot handle, perform the lowering pass. */ if (options->EmitNoIndirectInput || options->EmitNoIndirectOutput || options->EmitNoIndirectTemp || options->EmitNoIndirectUniform) { - lower_variable_index_to_cond_assign(ir, + lower_variable_index_to_cond_assign(prog->_LinkedShaders[i]->Stage, ir, options->EmitNoIndirectInput, options->EmitNoIndirectOutput, options->EmitNoIndirectTemp, @@ -5413,9 +6734,14 @@ st_link_shader(struct gl_context *ctx, struct gl_shader_program *prog) LOWER_PACK_SNORM_4x8 | LOWER_UNPACK_SNORM_4x8 | LOWER_UNPACK_UNORM_4x8 | - LOWER_PACK_UNORM_4x8 | - LOWER_PACK_HALF_2x16 | - LOWER_UNPACK_HALF_2x16; + LOWER_PACK_UNORM_4x8; + + if (ctx->Extensions.ARB_gpu_shader5) + lower_inst |= LOWER_PACK_USE_BFI | + LOWER_PACK_USE_BFE; + if (!ctx->st->has_half_float_packing) + lower_inst |= LOWER_PACK_HALF_2x16 | + LOWER_UNPACK_HALF_2x16; lower_packing_builtins(ir, lower_inst); } @@ -5424,18 +6750,33 @@ st_link_shader(struct gl_context *ctx, struct gl_shader_program *prog) lower_offset_arrays(ir); do_mat_op_to_vec(ir); lower_instructions(ir, - MOD_TO_FRACT | + MOD_TO_FLOOR | DIV_TO_MUL_RCP | EXP_TO_EXP2 | LOG_TO_LOG2 | LDEXP_TO_ARITH | + (have_dfrexp ? 0 : DFREXP_DLDEXP_TO_ARITH) | CARRY_TO_ARITH | BORROW_TO_ARITH | + (have_dround ? 0 : DOPS_TO_DFRAC) | (options->EmitNoPow ? POW_TO_EXP2 : 0) | (!ctx->Const.NativeIntegers ? INT_DIV_TO_MUL_RCP : 0) | - (options->EmitNoSat ? SAT_TO_CLAMP : 0)); + (options->EmitNoSat ? SAT_TO_CLAMP : 0) | + /* Assume that if ARB_gpu_shader5 is not supported + * then all of the extended integer functions need + * lowering. It may be necessary to add some caps + * for individual instructions. + */ + (!ctx->Extensions.ARB_gpu_shader5 + ? BIT_COUNT_TO_MATH | + EXTRACT_TO_SHIFTS | + INSERT_TO_SHIFTS | + REVERSE_TO_SHIFTS | + FIND_LSB_TO_FLOAT_CAST | + FIND_MSB_TO_FLOAT_CAST | + IMUL_HIGH_TO_MUL + : 0)); - lower_ubo_reference(prog->_LinkedShaders[i], ir); do_vec_index_to_cond_assign(ir); lower_vector_insert(ir, true); lower_quadop_vector(ir, false); @@ -5451,7 +6792,7 @@ st_link_shader(struct gl_context *ctx, struct gl_shader_program *prog) progress = do_common_optimization(ir, true, true, options, ctx->Const.NativeIntegers) - || progress; + || progress; progress = lower_if_to_cond_assign(ir, options->MaxIfDepth) || progress; @@ -5460,6 +6801,8 @@ st_link_shader(struct gl_context *ctx, struct gl_shader_program *prog) validate_ir_tree(ir); } + build_program_resource_list(ctx, prog); + for (unsigned i = 0; i < MESA_SHADER_STAGES; i++) { struct gl_program *linked_prog; @@ -5469,13 +6812,13 @@ st_link_shader(struct gl_context *ctx, struct gl_shader_program *prog) linked_prog = get_mesa_program(ctx, prog, prog->_LinkedShaders[i]); if (linked_prog) { - _mesa_reference_program(ctx, &prog->_LinkedShaders[i]->Program, - linked_prog); + _mesa_reference_program(ctx, &prog->_LinkedShaders[i]->Program, + linked_prog); if (!ctx->Driver.ProgramStringNotify(ctx, _mesa_shader_stage_to_program(i), linked_prog)) { - _mesa_reference_program(ctx, &prog->_LinkedShaders[i]->Program, - NULL); + _mesa_reference_program(ctx, &prog->_LinkedShaders[i]->Program, + NULL); _mesa_reference_program(ctx, &linked_prog, NULL); return GL_FALSE; } @@ -5492,9 +6835,17 @@ st_translate_stream_output_info(glsl_to_tgsi_visitor *glsl_to_tgsi, const GLuint outputMapping[], struct pipe_stream_output_info *so) { - unsigned i; struct gl_transform_feedback_info *info = &glsl_to_tgsi->shader_program->LinkedTransformFeedback; + st_translate_stream_output_info2(info, outputMapping, so); +} + +void +st_translate_stream_output_info2(struct gl_transform_feedback_info *info, + const GLuint outputMapping[], + struct pipe_stream_output_info *so) +{ + unsigned i; for (i = 0; i < info->NumOutputs; i++) { so->output[i].register_index = @@ -5507,7 +6858,7 @@ st_translate_stream_output_info(glsl_to_tgsi_visitor *glsl_to_tgsi, } for (i = 0; i < PIPE_MAX_SO_BUFFERS; i++) { - so->stride[i] = info->BufferStride[i]; + so->stride[i] = info->Buffers[i].Stride; } so->num_outputs = info->NumOutputs; }