X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=src%2Fopenpower%2Fsimulator%2Ftest_sim.py;h=03d7d8290a8da80e8346d386d790276d5062e066;hb=9c558fbf490bc4d94a63b92230b5bd50bc81a530;hp=8c02081925d47669480c9fbeee37f48af3932478;hpb=c8d94f1d538860d80606701d15beecb308bbbcc2;p=openpower-isa.git

diff --git a/src/openpower/simulator/test_sim.py b/src/openpower/simulator/test_sim.py
index 8c020819..03d7d829 100644
--- a/src/openpower/simulator/test_sim.py
+++ b/src/openpower/simulator/test_sim.py
@@ -549,7 +549,7 @@ class DecoderBase:
         print("sim xer", hex(sim_xer))
         self.assertEqual(qpc, sim_pc)
         for reg in regs:
-            qemu_val = qemu.get_register(reg)
+            qemu_val = qemu.get_gpr(reg)
             sim_val = sim.gpr(reg).value
             self.assertEqual(qemu_val, sim_val,
                              "expect %x got %x" % (qemu_val, sim_val))