X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=src%2Fpanfrost%2Fmidgard%2Fmidgard_ra_pipeline.c;h=a5c1025ee275ec6995a4f3158f1bb9859a11c029;hb=29416a85993a7352c7c575e43ffd6a70a7d8e3ef;hp=7bbf8a937591a7678d6d456486f0beab2e1c55f1;hpb=3e47a1181b7c5bc962380553c8c99a49a49f45d9;p=mesa.git

diff --git a/src/panfrost/midgard/midgard_ra_pipeline.c b/src/panfrost/midgard/midgard_ra_pipeline.c
index 7bbf8a93759..a5c1025ee27 100644
--- a/src/panfrost/midgard/midgard_ra_pipeline.c
+++ b/src/panfrost/midgard/midgard_ra_pipeline.c
@@ -48,11 +48,6 @@ mir_pipeline_ins(
         midgard_instruction *ins = bundle->instructions[i];
         unsigned dest = ins->ssa_args.dest;
 
-        /* Check to make sure we're legal */
-
-        if (ins->compact_branch)
-                return false;
-
         /* We could be pipelining a register, so we need to make sure that all
          * of the components read in this bundle are written in this bundle,
          * and that no components are written before this bundle */