X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=src%2Fpinmux_generator.py;h=b8afe99d69ccff76eb55a4ec58d77ed49233d882;hb=aaf02ca9531349d644e059f7cac9a11fcf6d25d2;hp=3d05526184dbbab9a9d1db253ee6dcd28280df73;hpb=976642ef4ff6fc521516d08fcdef3bc55cb5c872;p=pinmux.git diff --git a/src/pinmux_generator.py b/src/pinmux_generator.py index 3d05526..b8afe99 100644 --- a/src/pinmux_generator.py +++ b/src/pinmux_generator.py @@ -16,292 +16,89 @@ # ======================================================================== # default module imports -import os +import getopt +import os.path import sys -import time -import math - -# project module imports -from interface_decl import * -from interface_def import * -from parse import * -from wire_def import * -from actual_pinmux import * -from bus_transactors import * - -if not os.path.exists("bsv_src"): - os.makedirs("bsv_src") - -copyright = ''' -/* - This BSV file has been generated by the PinMux tool available at: - https://bitbucket.org/casl/pinmux. - - Authors: Neel Gala, Luke - Date of generation: ''' + time.strftime("%c") + ''' -*/ -''' -header = copyright+''' -package pinmux; - - typedef struct{ - Bit#(1) outputval; // output from core to pad bit7 - Bit#(1) output_en; // output enable from core to pad bit6 - Bit#(1) input_en; // input enable from core to io_cell bit5 - Bit#(1) pullup_en; // pullup enable from core to io_cell bit4 - Bit#(1) pulldown_en; // pulldown enable from core to io_cell bit3 - Bit#(1) drivestrength; // drivestrength from core to io_cell bit2 - Bit#(1) pushpull_en; // pushpull enable from core to io_cell bit1 - Bit#(1) opendrain_en; // opendrain enable form core to io_cell bit0 - } GenericIOType deriving(Eq,Bits,FShow); - - interface MuxSelectionLines; -''' -footer = ''' - endinterface; - endmodule -endpackage -''' -# ============================================# -# ==== populating the file with the code =====# -# ============================================# - -# package and interface declaration followed by the generic io_cell definition -with open("./bsv_src/pinmux.bsv", "w") as bsv_file: - bsv_file.write(header) - - bsv_file.write(''' - - // declare the method which will capture the user pin-mux - // selection values.The width of the input is dependent on the number - // of muxes happening per IO. For now we have a generalized width - // where each IO will have the same number of muxes.''') - - for cell in muxed_cells: - bsv_file.write(mux_interface.ifacefmt(cell[0], - int(math.log(len(cell) - 1, 2)))) - - bsv_file.write(''' - endinterface - - interface PeripheralSide; - // declare the interface to the IO cells. - // Each IO cell will have 8 input field (output from pin mux - // and on output field (input to pinmux)''') - for i in range(0, N_IO): - bsv_file.write('''\n // interface for IO CEll-{0}''') - bsv_file.write(io_interface.ifacefmt(i)) - # ============================================================== - - # == create method definitions for all peripheral interfaces ==# - for i in range(0, N_UART): - bsv_file.write(''' - // interface declaration between UART-{0} and pinmux'''.format(i)) - bsv_file.write(uartinterface_decl.ifacefmt(i)) - - for i in range(0, N_SPI): - bsv_file.write(''' - // interface declaration between SPI-{0} and pinmux'''.format(i)) - bsv_file.write(spiinterface_decl.ifacefmt(i)) - - for i in range(0, N_TWI): - bsv_file.write(''' - // interface declaration between TWI-{0} and pinmux'''.format(i)) - bsv_file.write(twiinterface_decl.ifacefmt(i)) - - for i in range(0, N_SD): - bsv_file.write(''' - // interface declaration between SD-{0} and pinmux'''.format(i)) - bsv_file.write(sdinterface_decl.ifacefmt(i)) - - for i in range(0, N_JTAG): - bsv_file.write(''' - // interface declaration between JTAG-{0} and pinmux'''.format(i)) - bsv_file.write(jtaginterface_decl.ifacefmt(i)) - - for i in range(0, N_PWM): - bsv_file.write(''' - // interface declaration between PWM-{0} and pinmux'''.format(i)) - bsv_file.write(pwminterface_decl.ifacefmt(i)) - # ============================================================== - - # ===== finish interface definition and start module definition======= - bsv_file.write(''' - endinterface - - interface Ifc_pinmux; - interface MuxSelectionLines mux_lines; - interface PeripheralSide peripheral_side; - endinterface - (*synthesize*) - module mkpinmux(Ifc_pinmux); -''') - # ==================================================================== - - # ======================= create wire and registers =================# - bsv_file.write(''' - // the followins wires capture the pin-mux selection - // values for each mux assigned to a CELL -''') - for cell in muxed_cells: - bsv_file.write(muxwire.format(cell[0], int(math.log(len(cell) - 1, 2)))) - - - bsv_file.write( - '''\n // following wires capture the values sent to the IO Cell''') - for i in range(0, N_IO): - bsv_file.write(generic_io.format(i)) - - for i in range(0, N_UART): - bsv_file.write( - '''\n // following wires capture signals to IO CELL if uart-{0} is - // allotted to it'''.format(i)) - bsv_file.write(uartwires.format(i)) - - for i in range(0, N_SPI): - bsv_file.write( - '''\n // following wires capture signals to IO CELL if spi-{0} is - // allotted to it'''.format(i)) - bsv_file.write(spiwires.format(i)) - - for i in range(0, N_TWI): - bsv_file.write( - '''\n // following wires capture signals to IO CELL if twi-{0} is - // allotted to it'''.format(i)) - bsv_file.write(twiwires.format(i)) - - for i in range(0, N_SD): - bsv_file.write( - '''\n // following wires capture signals to IO CELL if sd-{0} is - // allotted to it'''.format(i)) - bsv_file.write(sdwires.format(i)) - - for i in range(0, N_JTAG): - bsv_file.write( - '''\n // following wires capture signals to IO CELL if jtag-{0} is - // allotted to it'''.format(i)) - bsv_file.write(jtagwires.format(i)) - - for i in range(0, N_PWM): - bsv_file.write( - '''\n // following wires capture signals to IO CELL if pwm-{0} is - // allotted to it'''.format(i)) - bsv_file.write(pwmwires.format(i)) - bsv_file.write("\n") - # ==================================================================== - # ========================= Actual pinmuxing ========================# - bsv_file.write(''' - /*====== This where the muxing starts for each io-cell======*/ -''') - bsv_file.write(pinmux) - bsv_file.write(''' - /*============================================================*/ -''') - # ==================================================================== - # ================= interface definitions for each method =============# - bsv_file.write(''' - interface mux_lines = interface MuxSelectionLines -''') - for cell in muxed_cells: - bsv_file.write(mux_interface.ifacedef(cell[0], - int(math.log(len(cell) - 1, 2)))) - bsv_file.write(''' - endinterface; - interface peripheral_side = interface PeripheralSide -''') - for i in range(0, N_IO): - bsv_file.write(io_interface.ifacedef(i)) - for i in range(0, N_UART): - bsv_file.write(uartinterface_decl.ifacedef(i)) - for i in range(0, N_SPI): - bsv_file.write(spiinterface_decl.ifacedef(i)) - for i in range(0, N_TWI): - bsv_file.write(twiinterface_decl.ifacedef(i)) - for i in range(0, N_SD): - bsv_file.write(sdinterface_decl.ifacedef(i)) - for i in range(0, N_JTAG): - bsv_file.write(jtaginterface_decl.ifacedef(i)) - for i in range(0, N_PWM): - bsv_file.write(pwminterface_decl.ifacedef(i)) - bsv_file.write(footer) - print("BSV file successfully generated: bsv_src/pinmux.bsv") - # ====================================================================== - -with open('bsv_src/PinTop.bsv', 'w') as bsv_file: - bsv_file.write(copyright+''' -package PinTop; - import pinmux::*; - interface Ifc_PintTop; - method ActionValue#(Bool) write(Bit#({0}) addr, Bit#({1}) data); - method Tuple2#(Bool,Bit#({1})) read(Bit#({0}) addr); - interface PeripheralSide peripheral_side; - endinterface - - module mkPinTop(Ifc_PintTop); - // instantiate the pin-mux module here - Ifc_pinmux pinmux <-mkpinmux; - - // declare the registers which will be used to mux the IOs -'''.format(ADDR_WIDTH, DATA_WIDTH)) - - for cell in muxed_cells: - bsv_file.write(''' - Reg#(Bit#({0})) rg_muxio_{1} <-mkReg(0);'''.format( - int(math.log(len(cell) - 1, 2)), cell[0])) - - bsv_file.write(''' - // rule to connect the registers to the selection lines of the - // pin-mux module - rule connect_selection_registers;''') - - for cell in muxed_cells: - bsv_file.write(''' - pinmux.mux_lines.cell{0}_mux(rg_muxio_{0});'''.format(cell[0])) - - bsv_file.write(''' - endrule - // method definitions for the write user interface - method ActionValue#(Bool) write(Bit#({2}) addr, Bit#({3}) data); - Bool err=False; - case (addr[{0}:{1}])'''.format(upper_offset, lower_offset, - ADDR_WIDTH, DATA_WIDTH)) - index = 0 - for cell in muxed_cells: - bsv_file.write(''' - {0}: rg_muxio_{1}<=truncate(data);'''.format(index, cell[0])) - index = index + 1 - - bsv_file.write(''' - default: err=True; - endcase - return err; - endmethod''') - - bsv_file.write(''' - // method definitions for the read user interface - method Tuple2#(Bool,Bit#({3})) read(Bit#({2}) addr); - Bool err=False; - Bit#(32) data=0; - case (addr[{0}:{1}])'''.format(upper_offset, lower_offset, - ADDR_WIDTH, DATA_WIDTH)) - index = 0 - for cell in muxed_cells: - bsv_file.write(''' - {0}: data=zeroExtend(rg_muxio_{1});'''.format(index, cell[0])) - index = index + 1 - - bsv_file.write(''' - default:err=True; - endcase - return tuple2(err,data); - endmethod - interface peripheral_side=pinmux.peripheral_side; - endmodule -endpackage +from spec import modules, specgen, dummytest + + +def printhelp(): + print ('''pinmux_generator.py [-o outputdir] [-v|--validate] [-h|--help] + [-t outputtype] [-s|--spec spec] + -s | spec : generate from spec (python module) + -t | outputtype : outputtype, defaults to bsv + -o outputdir : defaults to bsv_src. also location for reading pinmux.txt + interfaces.txt and *.txt + -v | --validate : runs some validation on the pinmux + -h | --help : this help message ''') -# ######## Generate bus transactors ################ -with open('bsv_src/bus.bsv', 'w') as bsv_file: - bsv_file.write(axi4_lite.format(ADDR_WIDTH, DATA_WIDTH)) -# ################################################## +if __name__ == '__main__': + try: + options, remainder = getopt.getopt( + sys.argv[1:], + 'o:vht:s:', + ['output=', + 'validate', + 'test', + 'outputtype=', + 'spec=', + 'help', + 'version=', + ]) + except getopt.GetoptError as err: + print ("ERROR: %s" % str(err)) + printhelp() + sys.exit(1) + + output_type = 'bsv' + output_dir = None + validate = False + spec = None + pinspec = None + testing = False + for opt, arg in options: + if opt in ('-o', '--output'): + output_dir = arg + elif opt in ('-s', '--spec'): + pinspec = arg + elif opt in ('-t', '--outputtype'): + output_type = arg + elif opt in ('-v', '--validate'): + validate = True + elif opt in ('--test',): + testing = True + elif opt in ('-h', '--help'): + printhelp() + sys.exit(0) + + if pinspec: + if pinspec not in modules: + print ("ERROR: spec type '%s' does not exist" % pinspec) + printhelp() + sys.exit(1) + module = modules[pinspec] + + fname = os.path.join(output_dir or '', "%s.mdwn" % pinspec) + d = os.path.split(fname)[0] + if not os.path.exists(d): + os.makedirs(d) + with open(fname, "w") as of: + ps = module.pinspec() + pinout, bankspec, pinspec, fixedpins = ps.write(of) + if testing: + dummytest(ps, output_dir, output_type) + else: + specgen(of, output_dir, pinout, bankspec, pinspec, fixedpins) + else: + if output_type == 'bsv': + from bsv.pinmux_generator import pinmuxgen as gentypes + elif output_type == 'myhdl': + from myhdlgen.pinmux_generator import pinmuxgen as gentypes + else: + print ("ERROR: output type '%s' does not exist" % output_type) + printhelp() + sys.exit(0) + + gentypes(output_dir, validate)