X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=src%2Fsim%2Fsyscall_emul_buf.hh;h=e930846be3f1fb00d8d9a3c4861aaa7f148db521;hb=abd33d6fd26bb69d3bf53ceb6c2dc8f90d893e34;hp=cbd10f2f67790d878886f4a15ed2673a59d6814c;hpb=44af2c6a6913d35a2c34bd928dbfdef3c16dcaf9;p=gem5.git

diff --git a/src/sim/syscall_emul_buf.hh b/src/sim/syscall_emul_buf.hh
index cbd10f2f6..e930846be 100644
--- a/src/sim/syscall_emul_buf.hh
+++ b/src/sim/syscall_emul_buf.hh
@@ -70,12 +70,12 @@ class BaseBufferArg {
         memset(bufPtr, 0, size);
     }
 
-    virtual ~BaseBufferArg() { delete [] bufPtr; }
+    ~BaseBufferArg() { delete [] bufPtr; }
 
     /**
      * copy data into simulator space (read from target memory)
      */
-    virtual bool copyIn(SETranslatingPortProxy &memproxy)
+    bool copyIn(SETranslatingPortProxy &memproxy)
     {
         memproxy.readBlob(addr, bufPtr, size);
         return true;    // no EFAULT detection for now
@@ -84,7 +84,7 @@ class BaseBufferArg {
     /**
      * copy data out of simulator space (write to target memory)
      */
-    virtual bool copyOut(SETranslatingPortProxy &memproxy)
+    bool copyOut(SETranslatingPortProxy &memproxy)
     {
         memproxy.writeBlob(addr, bufPtr, size);
         return true;    // no EFAULT detection for now