X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=src%2Fsoc%2Fexperiment%2Ftestmem.py;h=d4a13557283e05784b06f16299c0c284bfc6b19d;hb=32442fcb5a70a9b038700381514d04ea3e58ee4c;hp=05101d0e3f8bbb9456dfbfc2dfd5a623dd13a923;hpb=64806776581720bc8e92e0c2d0aa087e5910d345;p=soc.git

diff --git a/src/soc/experiment/testmem.py b/src/soc/experiment/testmem.py
index 05101d0e..d4a13557 100644
--- a/src/soc/experiment/testmem.py
+++ b/src/soc/experiment/testmem.py
@@ -5,7 +5,8 @@ class TestMemory(Elaboratable):
     def __init__(self, regwid, addrw):
         self.ddepth = 1 # regwid //8
         depth = (1<<addrw) // self.ddepth
-        self.mem   = Memory(width=regwid, depth=depth, init=range(0, depth))
+        self.mem   = Memory(width=regwid, depth=depth,
+                            init=range(0, depth*2, 2))
         self.rdport = self.mem.read_port() # not now transparent=False)
         self.wrport = self.mem.write_port()