X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=techlibs%2Fgreenpak4%2Fcells_sim_digital.v;h=43d35d08f33c4c3c66ee49e585c756139de0bdf4;hb=ff785cdb46d6b1ddc19d5acc21b4d1236b3adf3f;hp=30fbef9f295a6641dc78d1319047e7ee5708d7d4;hpb=0a6c702c41154e15046ea9bcc1568e5250da7299;p=yosys.git diff --git a/techlibs/greenpak4/cells_sim_digital.v b/techlibs/greenpak4/cells_sim_digital.v index 30fbef9f2..43d35d08f 100644 --- a/techlibs/greenpak4/cells_sim_digital.v +++ b/techlibs/greenpak4/cells_sim_digital.v @@ -58,29 +58,31 @@ module GP_COUNT14(input CLK, input wire RST, output reg OUT); "RISING": begin always @(posedge CLK, posedge RST) begin - count <= count - 1'd1; - if(count == 0) - count <= COUNT_TO; - if(RST) - count <= 0; + count <= 0; + else begin + count <= count - 1'd1; + if(count == 0) + count <= COUNT_TO; + end end end "FALLING": begin always @(posedge CLK, negedge RST) begin - count <= count - 1'd1; - if(count == 0) - count <= COUNT_TO; - if(!RST) - count <= 0; + count <= 0; + else begin + count <= count - 1'd1; + if(count == 0) + count <= COUNT_TO; + end end end "BOTH": begin initial begin - $display("Both-edge reset mode for GP_COUNT8 not implemented"); + $display("Both-edge reset mode for GP_COUNT14 not implemented"); $finish; end end @@ -88,7 +90,7 @@ module GP_COUNT14(input CLK, input wire RST, output reg OUT); "LEVEL": begin always @(posedge CLK, posedge RST) begin if(RST) - count <= 0; + count <= 0; else begin count <= count - 1'd1; @@ -100,7 +102,7 @@ module GP_COUNT14(input CLK, input wire RST, output reg OUT); default: begin initial begin - $display("Invalid RESET_MODE on GP_COUNT8"); + $display("Invalid RESET_MODE on GP_COUNT14"); $finish; end end @@ -145,20 +147,6 @@ module GP_COUNT14_ADV(input CLK, input RST, output reg OUT, "RISING": begin always @(posedge CLK, posedge RST) begin - //Main counter - if(KEEP) begin - end - else if(UP) - count <= count + 1'd1; - else - count <= count - 1'd1; - - //Wrapping - if(count == 0 && !UP) - count <= COUNT_TO; - if(count == 14'h3fff && UP) - count <= COUNT_TO; - //Resets if(RST) begin if(RESET_VALUE == "ZERO") @@ -167,26 +155,26 @@ module GP_COUNT14_ADV(input CLK, input RST, output reg OUT, count <= COUNT_TO; end + else if(KEEP) begin + end + else if(UP) begin + count <= count + 1'd1; + if(count == 14'h3fff) + count <= COUNT_TO; + end + else begin + count <= count - 1'd1; + + if(count == 0) + count <= COUNT_TO; + end + end end "FALLING": begin always @(posedge CLK, negedge RST) begin - //Main counter - if(KEEP) begin - end - else if(UP) - count <= count + 1'd1; - else - count <= count - 1'd1; - - //Wrapping - if(count == 0 && !UP) - count <= COUNT_TO; - if(count == 14'h3fff && UP) - count <= COUNT_TO; - //Resets if(!RST) begin if(RESET_VALUE == "ZERO") @@ -195,6 +183,20 @@ module GP_COUNT14_ADV(input CLK, input RST, output reg OUT, count <= COUNT_TO; end + else if(KEEP) begin + end + else if(UP) begin + count <= count + 1'd1; + if(count == 14'h3fff) + count <= COUNT_TO; + end + else begin + count <= count - 1'd1; + + if(count == 0) + count <= COUNT_TO; + end + end end @@ -218,19 +220,19 @@ module GP_COUNT14_ADV(input CLK, input RST, output reg OUT, else begin - //Main counter if(KEEP) begin end - else if(UP) + else if(UP) begin count <= count + 1'd1; - else + if(count == 14'h3fff) + count <= COUNT_TO; + end + else begin count <= count - 1'd1; - //Wrapping - if(count == 0 && !UP) - count <= COUNT_TO; - if(count == 14'h3fff && UP) - count <= COUNT_TO; + if(count == 0) + count <= COUNT_TO; + end end @@ -284,20 +286,6 @@ module GP_COUNT8_ADV(input CLK, input RST, output reg OUT, "RISING": begin always @(posedge CLK, posedge RST) begin - //Main counter - if(KEEP) begin - end - else if(UP) - count <= count + 1'd1; - else - count <= count - 1'd1; - - //Wrapping - if(count == 0 && !UP) - count <= COUNT_TO; - if(count == 8'hff && UP) - count <= COUNT_TO; - //Resets if(RST) begin if(RESET_VALUE == "ZERO") @@ -306,25 +294,26 @@ module GP_COUNT8_ADV(input CLK, input RST, output reg OUT, count <= COUNT_TO; end - end - end - - "FALLING": begin - always @(posedge CLK, negedge RST) begin - //Main counter - if(KEEP) begin + else if(KEEP) begin end - else if(UP) + else if(UP) begin count <= count + 1'd1; - else + if(count == 8'hff) + count <= COUNT_TO; + end + else begin count <= count - 1'd1; - //Wrapping - if(count == 0 && !UP) - count <= COUNT_TO; - if(count == 8'hff && UP) - count <= COUNT_TO; + if(count == 0) + count <= COUNT_TO; + end + + end + end + + "FALLING": begin + always @(posedge CLK, negedge RST) begin //Resets if(!RST) begin @@ -334,6 +323,21 @@ module GP_COUNT8_ADV(input CLK, input RST, output reg OUT, count <= COUNT_TO; end + //Main counter + else if(KEEP) begin + end + else if(UP) begin + count <= count + 1'd1; + if(count == 8'hff) + count <= COUNT_TO; + end + else begin + count <= count - 1'd1; + + if(count == 0) + count <= COUNT_TO; + end + end end @@ -357,20 +361,19 @@ module GP_COUNT8_ADV(input CLK, input RST, output reg OUT, else begin - //Main counter if(KEEP) begin end - else if(UP) + else if(UP) begin count <= count + 1'd1; - else + if(count == 8'hff) + count <= COUNT_TO; + end + else begin count <= count - 1'd1; - //Wrapping - if(count == 0 && !UP) - count <= COUNT_TO; - if(count == 8'hff && UP) - count <= COUNT_TO; - + if(count == 0) + count <= COUNT_TO; + end end end @@ -411,7 +414,7 @@ module GP_COUNT8( //Combinatorially output underflow flag whenever we wrap low always @(*) begin OUT <= (count == 8'h0); - OUT <= count; + POUT <= count; end //POR or SYSRST reset value is COUNT_TO. Datasheet is unclear but conversations w/ Silego confirm. @@ -421,23 +424,25 @@ module GP_COUNT8( "RISING": begin always @(posedge CLK, posedge RST) begin - count <= count - 1'd1; - if(count == 0) - count <= COUNT_TO; - if(RST) count <= 0; + else begin + count <= count - 1'd1; + if(count == 0) + count <= COUNT_TO; + end end end "FALLING": begin always @(posedge CLK, negedge RST) begin - count <= count - 1'd1; - if(count == 0) - count <= COUNT_TO; - if(!RST) count <= 0; + else begin + count <= count - 1'd1; + if(count == 0) + count <= COUNT_TO; + end end end @@ -737,20 +742,24 @@ module GP_PGEN(input wire nRST, input wire CLK, output reg OUT); parameter PATTERN_DATA = 16'h0; parameter PATTERN_LEN = 5'd16; + localparam COUNT_MAX = PATTERN_LEN - 1'h1; + reg[3:0] count = 0; - always @(posedge CLK) begin + always @(posedge CLK, negedge nRST) begin + if(!nRST) - OUT <= PATTERN_DATA[0]; + count <= 0; else begin - count <= count + 1; - OUT <= PATTERN_DATA[count]; - - if( (count + 1) == PATTERN_LEN) - count <= 0; + count <= count - 1'h1; + if(count == 0) + count <= COUNT_MAX; end end + always @(*) + OUT = PATTERN_DATA[count]; + endmodule module GP_SHREG(input nRST, input CLK, input IN, output OUTA, output OUTB);