X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=techlibs%2Fgreenpak4%2Fcells_sim_digital.v;h=43d35d08f33c4c3c66ee49e585c756139de0bdf4;hb=ff785cdb46d6b1ddc19d5acc21b4d1236b3adf3f;hp=6fba941a013a19b761252db15ae45608eefaef90;hpb=3a404be62a7b7fcc435857e20aa6c528f373b81c;p=yosys.git diff --git a/techlibs/greenpak4/cells_sim_digital.v b/techlibs/greenpak4/cells_sim_digital.v index 6fba941a0..43d35d08f 100644 --- a/techlibs/greenpak4/cells_sim_digital.v +++ b/techlibs/greenpak4/cells_sim_digital.v @@ -58,23 +58,25 @@ module GP_COUNT14(input CLK, input wire RST, output reg OUT); "RISING": begin always @(posedge CLK, posedge RST) begin - count <= count - 1'd1; - if(count == 0) - count <= COUNT_TO; - if(RST) - count <= 0; + count <= 0; + else begin + count <= count - 1'd1; + if(count == 0) + count <= COUNT_TO; + end end end "FALLING": begin always @(posedge CLK, negedge RST) begin - count <= count - 1'd1; - if(count == 0) - count <= COUNT_TO; - if(!RST) - count <= 0; + count <= 0; + else begin + count <= count - 1'd1; + if(count == 0) + count <= COUNT_TO; + end end end @@ -88,7 +90,7 @@ module GP_COUNT14(input CLK, input wire RST, output reg OUT); "LEVEL": begin always @(posedge CLK, posedge RST) begin if(RST) - count <= 0; + count <= 0; else begin count <= count - 1'd1; @@ -100,7 +102,7 @@ module GP_COUNT14(input CLK, input wire RST, output reg OUT); default: begin initial begin - $display("Invalid RESET_MODE on GP_COUNT8"); + $display("Invalid RESET_MODE on GP_COUNT14"); $finish; end end @@ -145,7 +147,15 @@ module GP_COUNT14_ADV(input CLK, input RST, output reg OUT, "RISING": begin always @(posedge CLK, posedge RST) begin - if(KEEP) begin + //Resets + if(RST) begin + if(RESET_VALUE == "ZERO") + count <= 0; + else + count <= COUNT_TO; + end + + else if(KEEP) begin end else if(UP) begin count <= count + 1'd1; @@ -159,21 +169,21 @@ module GP_COUNT14_ADV(input CLK, input RST, output reg OUT, count <= COUNT_TO; end + end + end + + "FALLING": begin + always @(posedge CLK, negedge RST) begin + //Resets - if(RST) begin + if(!RST) begin if(RESET_VALUE == "ZERO") count <= 0; else count <= COUNT_TO; end - end - end - - "FALLING": begin - always @(posedge CLK, negedge RST) begin - - if(KEEP) begin + else if(KEEP) begin end else if(UP) begin count <= count + 1'd1; @@ -187,14 +197,6 @@ module GP_COUNT14_ADV(input CLK, input RST, output reg OUT, count <= COUNT_TO; end - //Resets - if(!RST) begin - if(RESET_VALUE == "ZERO") - count <= 0; - else - count <= COUNT_TO; - end - end end @@ -284,8 +286,16 @@ module GP_COUNT8_ADV(input CLK, input RST, output reg OUT, "RISING": begin always @(posedge CLK, posedge RST) begin + //Resets + if(RST) begin + if(RESET_VALUE == "ZERO") + count <= 0; + else + count <= COUNT_TO; + end + //Main counter - if(KEEP) begin + else if(KEEP) begin end else if(UP) begin count <= count + 1'd1; @@ -299,22 +309,22 @@ module GP_COUNT8_ADV(input CLK, input RST, output reg OUT, count <= COUNT_TO; end + end + end + + "FALLING": begin + always @(posedge CLK, negedge RST) begin + //Resets - if(RST) begin + if(!RST) begin if(RESET_VALUE == "ZERO") count <= 0; else count <= COUNT_TO; end - end - end - - "FALLING": begin - always @(posedge CLK, negedge RST) begin - //Main counter - if(KEEP) begin + else if(KEEP) begin end else if(UP) begin count <= count + 1'd1; @@ -328,14 +338,6 @@ module GP_COUNT8_ADV(input CLK, input RST, output reg OUT, count <= COUNT_TO; end - //Resets - if(!RST) begin - if(RESET_VALUE == "ZERO") - count <= 0; - else - count <= COUNT_TO; - end - end end @@ -422,23 +424,25 @@ module GP_COUNT8( "RISING": begin always @(posedge CLK, posedge RST) begin - count <= count - 1'd1; - if(count == 0) - count <= COUNT_TO; - if(RST) count <= 0; + else begin + count <= count - 1'd1; + if(count == 0) + count <= COUNT_TO; + end end end "FALLING": begin always @(posedge CLK, negedge RST) begin - count <= count - 1'd1; - if(count == 0) - count <= COUNT_TO; - if(!RST) count <= 0; + else begin + count <= count - 1'd1; + if(count == 0) + count <= COUNT_TO; + end end end