X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=test%2Fcocotb%2Fdual_parallel%2FMakefile;fp=test%2Fcocotb%2Fdual_parallel%2FMakefile;h=383a1ba0b1feb57bdcbfcdde02ced33464b6c9db;hb=1fae20c5f3991187c13a80326c5f27ab8afc5f83;hp=e7da7cd5d00507f10bd4bb50164845760bc38093;hpb=2af9a2c55b5a5e5e17c484ebfc9bcaabf6cb6781;p=c4m-jtag.git

diff --git a/test/cocotb/dual_parallel/Makefile b/test/cocotb/dual_parallel/Makefile
index e7da7cd..383a1ba 100644
--- a/test/cocotb/dual_parallel/Makefile
+++ b/test/cocotb/dual_parallel/Makefile
@@ -1,6 +1,14 @@
-PWD=$(realpath .)
+CURDIR=$(realpath .)
 TOPDIR=$(realpath ../../..)
-VHDLDIR=$(TOPDIR)/rtl/vhdl
+
+ifeq ($(PYTHONPATH),)
+  PYTHONPATH := $(TOPDIR)
+else
+  PYTHONPATH := $(TOPDIR):$(PYTHONPATH)
+endif
+export PYTHONPATH
+
+VHDLDIR=$(TOPDIR)/c4m/vhdl/jtag
 VHDL_SOURCES = \
   $(VHDLDIR)/c4m_jtag_pkg.vhdl \
   $(VHDLDIR)/c4m_jtag_tap_fsm.vhdl \
@@ -9,7 +17,7 @@ VHDL_SOURCES = \
   $(VHDLDIR)/c4m_jtag_ioblock.vhdl \
   $(VHDLDIR)/c4m_jtag_idblock.vhdl \
   $(VHDLDIR)/c4m_jtag_tap_controller.vhdl \
-  $(PWD)/dual_parallel.vhdl
+  $(CURDIR)/dual_parallel.vhdl
 TOPLEVEL=dual_parallel
 TOPLEVEL_LANG=vhdl
 MODULE=test
@@ -17,7 +25,7 @@ SIM=ghdl
 GPI_IMPL=vhpi
 SIM_ARGS=--wave=test.ghw
 
-COCOTBDIR=$(shell cocotb-path)
+COCOTBMAKEFILESDIR=$(shell cocotb-config --makefiles)
 
-include $(COCOTBDIR)/makefiles/Makefile.inc
-include $(COCOTBDIR)/makefiles/Makefile.sim
+include $(COCOTBMAKEFILESDIR)/Makefile.inc
+include $(COCOTBMAKEFILESDIR)/Makefile.sim