X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=tests%2Fquick%2Fse%2F00.hello%2Fref%2Fsparc%2Flinux%2Fsimple-timing%2Fconfig.ini;h=e38847653edc38089ba26d647cd785abda2adc9f;hb=1efe42fa97ed03662666cafee1b9dec9dfe524e9;hp=a618274661f5276104733dc1f29ac40497f887b4;hpb=4f8d1a4cef2b23b423ea083078cd933c66c88e2a;p=gem5.git diff --git a/tests/quick/se/00.hello/ref/sparc/linux/simple-timing/config.ini b/tests/quick/se/00.hello/ref/sparc/linux/simple-timing/config.ini index a61827466..e38847653 100644 --- a/tests/quick/se/00.hello/ref/sparc/linux/simple-timing/config.ini +++ b/tests/quick/se/00.hello/ref/sparc/linux/simple-timing/config.ini @@ -1,22 +1,29 @@ [root] type=Root children=system +eventq_index=0 full_system=false +sim_quantum=0 time_sync_enable=false time_sync_period=100000000000 time_sync_spin_threshold=100000000 [system] type=System -children=cpu membus physmem +children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain boot_osflags=a +cache_line_size=64 +clk_domain=system.clk_domain +eventq_index=0 init_param=0 kernel= +kernel_addr_check=true load_addr_mask=1099511627775 -mem_mode=atomic +load_offset=0 +mem_mode=timing +mem_ranges= memories=system.physmem num_work_ids=16 -physmem=system.physmem readfile= symbolfile= work_begin_ckpt_count=0 @@ -26,31 +33,43 @@ work_cpus_ckpt_count=0 work_end_ckpt_count=0 work_end_exit_count=0 work_item_id=-1 -system_port=system.membus.port[0] +system_port=system.membus.slave[0] + +[system.clk_domain] +type=SrcClockDomain +clock=1000 +domain_id=-1 +eventq_index=0 +init_perf_level=0 +voltage_domain=system.voltage_domain [system.cpu] type=TimingSimpleCPU -children=dcache dtb icache interrupts itb l2cache toL2Bus tracer workload +children=dcache dtb icache interrupts isa itb l2cache toL2Bus tracer workload +branchPred=Null checker=Null -clock=500 +clk_domain=system.cpu_clk_domain cpu_id=0 -defer_registration=false do_checkpoint_insts=true do_quiesce=true do_statistics_insts=true dtb=system.cpu.dtb +eventq_index=0 function_trace=false function_trace_start=0 interrupts=system.cpu.interrupts +isa=system.cpu.isa itb=system.cpu.itb max_insts_all_threads=0 max_insts_any_thread=0 max_loads_all_threads=0 max_loads_any_thread=0 numThreads=1 -phase=0 profile=0 progress_interval=0 +simpoint_start_insts= +socket_id=0 +switched_out=false system=system tracer=system.cpu.tracer workload=system.cpu.workload @@ -59,102 +78,142 @@ icache_port=system.cpu.icache.cpu_side [system.cpu.dcache] type=BaseCache -addr_range=0:18446744073709551615 +children=tags +addr_ranges=0:18446744073709551615 assoc=2 -block_size=64 +clk_domain=system.cpu_clk_domain +eventq_index=0 forward_snoops=true -hash_delay=1 +hit_latency=2 is_top_level=true -latency=1000 max_miss_count=0 -mshrs=10 +mshrs=4 prefetch_on_access=false prefetcher=Null -prioritizeRequests=false -repl=Null +response_latency=2 +sequential_access=false size=262144 -subblock_size=0 system=system -tgts_per_mshr=5 -trace_addr=0 +tags=system.cpu.dcache.tags +tgts_per_mshr=20 two_queue=false write_buffers=8 cpu_side=system.cpu.dcache_port -mem_side=system.cpu.toL2Bus.port[1] +mem_side=system.cpu.toL2Bus.slave[1] + +[system.cpu.dcache.tags] +type=LRU +assoc=2 +block_size=64 +clk_domain=system.cpu_clk_domain +eventq_index=0 +hit_latency=2 +sequential_access=false +size=262144 [system.cpu.dtb] type=SparcTLB +eventq_index=0 size=64 [system.cpu.icache] type=BaseCache -addr_range=0:18446744073709551615 +children=tags +addr_ranges=0:18446744073709551615 assoc=2 -block_size=64 +clk_domain=system.cpu_clk_domain +eventq_index=0 forward_snoops=true -hash_delay=1 +hit_latency=2 is_top_level=true -latency=1000 max_miss_count=0 -mshrs=10 +mshrs=4 prefetch_on_access=false prefetcher=Null -prioritizeRequests=false -repl=Null +response_latency=2 +sequential_access=false size=131072 -subblock_size=0 system=system -tgts_per_mshr=5 -trace_addr=0 +tags=system.cpu.icache.tags +tgts_per_mshr=20 two_queue=false write_buffers=8 cpu_side=system.cpu.icache_port -mem_side=system.cpu.toL2Bus.port[0] +mem_side=system.cpu.toL2Bus.slave[0] + +[system.cpu.icache.tags] +type=LRU +assoc=2 +block_size=64 +clk_domain=system.cpu_clk_domain +eventq_index=0 +hit_latency=2 +sequential_access=false +size=131072 [system.cpu.interrupts] type=SparcInterrupts +eventq_index=0 + +[system.cpu.isa] +type=SparcISA +eventq_index=0 [system.cpu.itb] type=SparcTLB +eventq_index=0 size=64 [system.cpu.l2cache] type=BaseCache -addr_range=0:18446744073709551615 -assoc=2 -block_size=64 +children=tags +addr_ranges=0:18446744073709551615 +assoc=8 +clk_domain=system.cpu_clk_domain +eventq_index=0 forward_snoops=true -hash_delay=1 +hit_latency=20 is_top_level=false -latency=10000 max_miss_count=0 -mshrs=10 +mshrs=20 prefetch_on_access=false prefetcher=Null -prioritizeRequests=false -repl=Null +response_latency=20 +sequential_access=false size=2097152 -subblock_size=0 system=system -tgts_per_mshr=5 -trace_addr=0 +tags=system.cpu.l2cache.tags +tgts_per_mshr=12 two_queue=false write_buffers=8 -cpu_side=system.cpu.toL2Bus.port[2] -mem_side=system.membus.port[2] +cpu_side=system.cpu.toL2Bus.master[0] +mem_side=system.membus.slave[1] -[system.cpu.toL2Bus] -type=Bus +[system.cpu.l2cache.tags] +type=LRU +assoc=8 block_size=64 -bus_id=0 -clock=1000 +clk_domain=system.cpu_clk_domain +eventq_index=0 +hit_latency=20 +sequential_access=false +size=2097152 + +[system.cpu.toL2Bus] +type=CoherentXBar +clk_domain=system.cpu_clk_domain +eventq_index=0 header_cycles=1 +snoop_filter=Null +system=system use_default_range=false -width=64 -port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.l2cache.cpu_side +width=32 +master=system.cpu.l2cache.cpu_side +slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side [system.cpu.tracer] type=ExeTracer +eventq_index=0 [system.cpu.workload] type=LiveProcess @@ -164,7 +223,8 @@ egid=100 env= errout=cerr euid=100 -executable=/dist/m5/regression/test-progs/hello/bin/sparc/linux/hello +eventq_index=0 +executable=/scratch/nilay/GEM5/gem5/tests/test-progs/hello/bin/sparc/linux/hello gid=100 input=cin max_stack_size=67108864 @@ -174,24 +234,51 @@ ppid=99 simpoint=0 system=system uid=100 +useArchPT=false + +[system.cpu_clk_domain] +type=SrcClockDomain +clock=500 +domain_id=-1 +eventq_index=0 +init_perf_level=0 +voltage_domain=system.voltage_domain + +[system.dvfs_handler] +type=DVFSHandler +domains= +enable=false +eventq_index=0 +sys_clk_domain=system.clk_domain +transition_latency=100000000 [system.membus] -type=Bus -block_size=64 -bus_id=0 -clock=1000 +type=CoherentXBar +clk_domain=system.clk_domain +eventq_index=0 header_cycles=1 +snoop_filter=Null +system=system use_default_range=false -width=64 -port=system.system_port system.physmem.port[0] system.cpu.l2cache.mem_side +width=8 +master=system.physmem.port +slave=system.system_port system.cpu.l2cache.mem_side [system.physmem] -type=PhysicalMemory -file= +type=SimpleMemory +bandwidth=73.000000 +clk_domain=system.clk_domain +conf_table_reported=true +eventq_index=0 +in_addr_map=true latency=30000 latency_var=0 null=false range=0:134217727 -zero=false -port=system.membus.port[1] +port=system.membus.master[0] + +[system.voltage_domain] +type=VoltageDomain +eventq_index=0 +voltage=1.000000