X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=util%2Fmake_release.py;h=5a47f06587c517eb829d32083e1b790b68773ee8;hb=df163284fc29805d4eb3745b9a4dca49a3688b4c;hp=fafea133c02b2d02db659cde0b889aaffbee2bd6;hpb=71b033f4dcd2b34a01256139e280489b8f0f69ee;p=gem5.git

diff --git a/util/make_release.py b/util/make_release.py
index fafea133c..5a47f0658 100755
--- a/util/make_release.py
+++ b/util/make_release.py
@@ -1,5 +1,5 @@
 #!/usr/bin/env python
-# Copyright (c) 2006-2007 The Regents of The University of Michigan
+# Copyright (c) 2006-2008 The Regents of The University of Michigan
 # All rights reserved.
 #
 # Redistribution and use in source and binary forms, with or without
@@ -122,7 +122,6 @@ when = int(time.time()) + 120
 # get rid of non-shipping code
 #rmtree(release_dir, 'src/encumbered/dev')
 rmtree(release_dir, 'src/cpu/ozone')
-rmtree(release_dir, 'src/arch/x86')
 #rmtree(release_dir, 'src/mem/cache/tags/split*.cc')
 #rmtree(release_dir, 'src/mem/cache/tags/split*.hh')
 #rmtree(release_dir, 'src/mem/cache/prefetch/ghb_*.cc')
@@ -131,17 +130,14 @@ rmtree(release_dir, 'src/arch/x86')
 #rmtree(release_dir, 'src/mem/cache/prefetch/stride_*.hh')
 rmtree(release_dir, 'configs/fullsys')
 rmtree(release_dir, 'configs/test')
-rmtree(release_dir, 'configs/splash2')
 rmtree(release_dir, 'tests/long/*/ref')
 rmtree(release_dir, 'tests/old')
 rmtree(release_dir, 'tests/quick/00.hello/ref/x86')
+rmtree(release_dir, 'tests/quick/02.insttest')
 rmtree(release_dir, 'tests/test-progs/hello/bin/x86')
-rmtree(release_dir, 'src/dev/x86')
 
 remove(release_dir, 'src/cpu/nativetrace.hh')
 remove(release_dir, 'src/cpu/nativetrace.cc')
-remove(release_dir, 'build_opts/X86_SE')
-remove(release_dir, 'build_opts/X86_FS')
 
 # get rid of some of private scripts
 remove(release_dir, 'util/chgcopyright')
@@ -198,21 +194,6 @@ def replace_line(s_regex, f, rl):
 #remove_sources(r'.*(ghb|stride)_prefetcher\.cc', 'src/mem/cache/prefetch')
 remove_sources(r'.*nativetrace.*', 'src/cpu')
 
-remove_lines(r'.*X86.*', None,  'src/arch/isa_specific.hh')
-remove_lines(r'.*X86.*', None,  'src/base/traceflags.py')
-remove_lines(r'.*X86.*', None,  'src/base/loader/object_file.hh')
-remove_lines(r'.*_X86_.*', '.*else.*', 'src/base/loader/elf_object.cc')
-remove_lines(r'.*X86_ISA.*', r'^.el.*','src/sim/process.cc')
-remove_lines(r'.*x86.*', r'.*mips.*','src/cpu/BaseCPU.py')
-remove_lines(r'.*X86_ISA.*', r'^.*else.*','src/cpu/o3/dyn_inst.hh')
-remove_lines(r'.*X86_ISA.*', r'.*stay.*','src/cpu/simple/base.cc')
-remove_lines(r'.*x86.*', r'^if.*','src/cpu/SConscript')
-
-remove_lines(r'.*makeX86System.*', r'.*makeDualRoot.*','configs/common/FSConfig.py')
-remove_lines(r'.*X86.*', None,  'configs/example/fs.py')
-remove_lines(r'.*x86.*', None,  'configs/example/fs.py')
-
-replace_line(r'.*X86_SE.*', 'util/regress', "                     'SPARC_SE,SPARC_FS',")
 benches = [ 'bzip2', 'eon', 'gzip', 'mcf', 'parser', 'perlbmk',
             'twolf', 'vortex' ]
 for bench in benches:
@@ -222,6 +203,11 @@ for bench in benches:
 rmtree(release_dir, 'tests/test-progs/anagram')
 rmtree(release_dir, 'tests/quick/20.eio-short')
 
+f = open('src/cpu/SConsopts', 'w+')
+f.writelines(("Import('*')\n", "all_cpu_list.append('DummyCPUMakeSconsHappy')\n"))
+f.close()
+
+
 def taritup(directory, destdir, filename):
     basedir = dirname(directory)
     tarball = joinpath(destdir, filename)