X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=veera.mdwn;h=1c3bd588df40bf6e5f79bbffc8001d3e401478e2;hb=38b1ce26ccf8449d908d7a5c2e89c878472ab427;hp=1256b18acc7479b1f665e4441a72b0eccd943972;hpb=7e85c5a357bbb9b89f0b41c9d2132a7f0e6d73a9;p=libreriscv.git diff --git a/veera.mdwn b/veera.mdwn index 1256b18ac..1c3bd588d 100644 --- a/veera.mdwn +++ b/veera.mdwn @@ -1,33 +1,92 @@ -# Veera Kumar +# R Veera Kumar Helping Core Hardware developers. -# Status tracking +* [Bugtracker assignments](https://bugs.libre-soc.org/buglist.cgi?email1=vklr&emailassigned_to1=1&emailtype1=substring&resolution=---) -Currently System Administrator work. +# Status tracking ## Currently working on - - Installation instructions for nextpnr with ecp5 support - -## Completed but not yet submitted: +## Currently deffered -### Project Documentation + - Low performance bare minimum functionality SIMD emulator required - - Convert bitmap images to svg - - (total EUR 200) +## Completed but not yet submitted: ## Submitted for NLNet RFP submitted but not confirmed paid: -### + - structure packing SVG + - (EUR 400) ## Paid donation from NLNet confirmed received: -### +### NLNet.2019.10.043.Wishbone + + - Convert bitmap images to svg + - (total EUR 200) + + - Installation instructions for nextpnr with ecp5 support + - (EUR 150) + + - dev-env-setup script for verilator, ghdl, iverilog and cocotb + - (EUR 250) + + - sphinx - build, install and interface with projects + - (EUR 150) + + - Convert bitmap images to vector svg - multi i/o dep cell and multi func unit + - (EUR 300) + + * [Bug #654](https://bugs.libre-soc.org/show_bug.cgi?id=654): + dev\-env\-setup script for symbiflow \(arty A7\-100T\) + * €600 out of total of €750 + +* [Bug #878](https://bugs.libre-soc.org/show_bug.cgi?id=878): + image conversion explaining multi-issue + * €400 which is the total amount + +### NLNet.2019.10.046.Standards + +* [Bug #730](https://bugs.libre-soc.org/show_bug.cgi?id=730): + adapt ALU test cases to include expected results + * €700 out of total of €1000 + +* [Bug #839](https://bugs.libre-soc.org/show_bug.cgi?id=839): + SVP64 / Extra-V / ZOLC whitepaper + * €700 out of total of €2000 + +### NLNet.2019.02 + +* [Bug #750](https://bugs.libre-soc.org/show_bug.cgi?id=750): + Convert pinmux gpio, jtag\-block bitmap diagrams to svg vector + * €500 out of total of €500 + +* [Bug #790](https://bugs.libre-soc.org/show_bug.cgi?id=790): + dev-env-setup script for nextpnr\-xilinx + * €450 out of total of €600 + +* [Bug #791](https://bugs.libre-soc.org/show_bug.cgi?id=791): + dev-env-setup script for dfutil, openFPGALoader, ujprog and fujprog + * €600 out of total of €600 + +* [Bug #802](https://bugs.libre-soc.org/show_bug.cgi?id=802): + Document steps for ls2 microwatt hello world for fpga boards + * €450 out of total of €600 + +### NLNet.2019.10.032.Formal + +* [Bug #847](https://bugs.libre-soc.org/show_bug.cgi?id=847): + dev\-env\-setup script for binutils-gdb for target powerpc64le\-linux\-gnu + * €450 out of total of €650 + +* [Bug #883](https://bugs.libre-soc.org/show_bug.cgi?id=883): + add cvc5 and bitwuzla to hdl-yosys-tools + * €800 which is the total amount ## Completed