X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=veera.mdwn;h=1c3bd588df40bf6e5f79bbffc8001d3e401478e2;hb=HEAD;hp=f10e62e3357c7f40cf883db535f61d23916fb502;hpb=1bb0b510a7b6176a84ef5c0f5880ef1d247adf86;p=libreriscv.git diff --git a/veera.mdwn b/veera.mdwn index f10e62e33..1c3bd588d 100644 --- a/veera.mdwn +++ b/veera.mdwn @@ -18,11 +18,14 @@ Helping Core Hardware developers. submitted but not confirmed paid: + - structure packing SVG + - (EUR 400) + ## Paid donation from NLNet confirmed received: -### NLNet.2019.10.Wishbone +### NLNet.2019.10.043.Wishbone - Convert bitmap images to svg - (total EUR 200) @@ -43,12 +46,20 @@ donation from NLNet confirmed received: dev\-env\-setup script for symbiflow \(arty A7\-100T\) * €600 out of total of €750 -### NLNet.2019.10.Standards +* [Bug #878](https://bugs.libre-soc.org/show_bug.cgi?id=878): + image conversion explaining multi-issue + * €400 which is the total amount + +### NLNet.2019.10.046.Standards * [Bug #730](https://bugs.libre-soc.org/show_bug.cgi?id=730): adapt ALU test cases to include expected results * €700 out of total of €1000 +* [Bug #839](https://bugs.libre-soc.org/show_bug.cgi?id=839): + SVP64 / Extra-V / ZOLC whitepaper + * €700 out of total of €2000 + ### NLNet.2019.02 * [Bug #750](https://bugs.libre-soc.org/show_bug.cgi?id=750): @@ -67,6 +78,16 @@ donation from NLNet confirmed received: Document steps for ls2 microwatt hello world for fpga boards * €450 out of total of €600 +### NLNet.2019.10.032.Formal + +* [Bug #847](https://bugs.libre-soc.org/show_bug.cgi?id=847): + dev\-env\-setup script for binutils-gdb for target powerpc64le\-linux\-gnu + * €450 out of total of €650 + +* [Bug #883](https://bugs.libre-soc.org/show_bug.cgi?id=883): + add cvc5 and bitwuzla to hdl-yosys-tools + * €800 which is the total amount + ## Completed - test and install public-inbox