X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=veera.mdwn;h=8356a29404a9698cd808bc08da11f0515458b4c8;hb=ac5edf3dbba33a72efff39953e0de5f897201a5f;hp=502b592f4a68547bdd312925c0593f7066f6e74e;hpb=2c2b5ad3c3ca070348d1b2ef8ad6bae4d5981492;p=libreriscv.git diff --git a/veera.mdwn b/veera.mdwn index 502b592f4..8356a2940 100644 --- a/veera.mdwn +++ b/veera.mdwn @@ -2,31 +2,90 @@ Helping Core Hardware developers. +* [Bugtracker assignments](https://bugs.libre-soc.org/buglist.cgi?email1=vklr&emailassigned_to1=1&emailtype1=substring&resolution=---) + # Status tracking ## Currently working on -## Completed but not yet submitted: + - structure packing SVG -### Project NLNet 2019-10 Wishbone +## Currently deffered - - Installation instructions for nextpnr with ecp5 support - - (EUR 150) + - Low performance bare minimum functionality SIMD emulator required + +## Completed but not yet submitted: ## Submitted for NLNet RFP submitted but not confirmed paid: -### Project 2019-10-043 06dec2020 wishbone +## Paid + +donation from NLNet confirmed received: + +### NLNet.2019.10.043.Wishbone - Convert bitmap images to svg - (total EUR 200) -## Paid + - Installation instructions for nextpnr with ecp5 support + - (EUR 150) -donation from NLNet confirmed received: + - dev-env-setup script for verilator, ghdl, iverilog and cocotb + - (EUR 250) + + - sphinx - build, install and interface with projects + - (EUR 150) + + - Convert bitmap images to vector svg - multi i/o dep cell and multi func unit + - (EUR 300) + + * [Bug #654](https://bugs.libre-soc.org/show_bug.cgi?id=654): + dev\-env\-setup script for symbiflow \(arty A7\-100T\) + * €600 out of total of €750 + +* [Bug #878](https://bugs.libre-soc.org/show_bug.cgi?id=878): + image conversion explaining multi-issue + * €400 which is the total amount + +### NLNet.2019.10.046.Standards + +* [Bug #730](https://bugs.libre-soc.org/show_bug.cgi?id=730): + adapt ALU test cases to include expected results + * €700 out of total of €1000 + +* [Bug #839](https://bugs.libre-soc.org/show_bug.cgi?id=839): + SVP64 / Extra-V / ZOLC whitepaper + * €700 out of total of €2000 + +### NLNet.2019.02 + +* [Bug #750](https://bugs.libre-soc.org/show_bug.cgi?id=750): + Convert pinmux gpio, jtag\-block bitmap diagrams to svg vector + * €500 out of total of €500 + +* [Bug #790](https://bugs.libre-soc.org/show_bug.cgi?id=790): + dev-env-setup script for nextpnr\-xilinx + * €450 out of total of €600 + +* [Bug #791](https://bugs.libre-soc.org/show_bug.cgi?id=791): + dev-env-setup script for dfutil, openFPGALoader, ujprog and fujprog + * €600 out of total of €600 + +* [Bug #802](https://bugs.libre-soc.org/show_bug.cgi?id=802): + Document steps for ls2 microwatt hello world for fpga boards + * €450 out of total of €600 + +### NLNet.2019.10.032.Formal + +* [Bug #847](https://bugs.libre-soc.org/show_bug.cgi?id=847): + dev\-env\-setup script for binutils-gdb for target powerpc64le\-linux\-gnu + * €450 out of total of €650 -### +* [Bug #883](https://bugs.libre-soc.org/show_bug.cgi?id=883): + add cvc5 and bitwuzla to hdl-yosys-tools + * €800 which is the total amount ## Completed