CPU/ARM: Add SIMD op classes to CPU models and ARM ISA.
authorGiacomo Gabrielli <Giacomo.Gabrielli@arm.com>
Mon, 15 Nov 2010 20:04:04 +0000 (14:04 -0600)
committerGiacomo Gabrielli <Giacomo.Gabrielli@arm.com>
Mon, 15 Nov 2010 20:04:04 +0000 (14:04 -0600)
commit005892719047c3b4b383d9aeeeb481039518f661
treeb2d967a9ffea13f73e092804ae141d9520ff109c
parent2a3cefe15115a094eadd74a659a2f919a83ac6a4
CPU/ARM: Add SIMD op classes to CPU models and ARM ISA.
src/arch/arm/isa/insts/div.isa
src/arch/arm/isa/insts/fp.isa
src/arch/arm/isa/insts/mult.isa
src/arch/arm/isa/insts/neon.isa
src/cpu/FuncUnit.py
src/cpu/o3/FUPool.py
src/cpu/o3/FuncUnitConfig.py
src/cpu/op_class.hh