RISC-V: Add T-Head Int vendor extension
authorChristoph Müllner <christoph.muellner@vrull.eu>
Sun, 13 Nov 2022 15:59:21 +0000 (16:59 +0100)
committerNelson Chu <nelson@rivosinc.com>
Thu, 17 Nov 2022 08:43:55 +0000 (16:43 +0800)
commit01804a098dea7d08857eee82bcaad04676dd8ea1
tree69ec5662e29df0e9632fca8f788acb0383440ef2
parent4a3bc79bf4c0e89c876c930a1e95a02213277460
RISC-V: Add T-Head Int vendor extension

This patch adds the XTheadInt extension, which provides interrupt
stack management instructions.

The XTheadFmv extension is documented in the RISC-V toolchain
contentions:
  https://github.com/riscv-non-isa/riscv-toolchain-conventions

Co-developed-by: Lifang Xia <lifang_xia@linux.alibaba.com>
Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu>
bfd/elfxx-riscv.c
gas/NEWS
gas/doc/c-riscv.texi
gas/testsuite/gas/riscv/x-thead-int.d [new file with mode: 0644]
gas/testsuite/gas/riscv/x-thead-int.s [new file with mode: 0644]
include/opcode/riscv-opc.h
include/opcode/riscv.h
opcodes/riscv-opc.c